code
stringlengths 1
1.05M
| repo_name
stringlengths 6
83
| path
stringlengths 3
242
| language
stringclasses 222
values | license
stringclasses 20
values | size
int64 1
1.05M
|
|---|---|---|---|---|---|
/** @brief configuration */
unsigned char rtlbt_config[] =
{
0x55, 0xab, 0x23, 0x87,
0x19, 0x00,
0xD6, 0x00, 0x02, 0x8C, 0x8C, /*LE trx on delay*/
};
/** @brief The length of configuration */
unsigned int rtlbt_config_len = sizeof(rtlbt_config);
extern unsigned char rtlbt_fw[];
const unsigned char *rltk_bt_get_normal_patch(void)
{
return rtlbt_fw;
}
extern unsigned char rtlbt_mp_fw[];
const unsigned char *rltk_bt_get_mp_patch(void)
{
return rtlbt_mp_fw;
}
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/hci/bt_fwconfig.c
|
C
|
apache-2.0
| 501
|
/**
*******************************************************************************
* Copyright(c) 2019, Realtek Semiconductor Corporation. All rights reserved.
*******************************************************************************
* @file amebaD_MP_bt40_fw_asic_rom_patch_210205_1105_new.bin
* @date 2021-02-05 11:05
* @patch3 HCI ver: 0x82A8, LMP ver: 0x28DE, BTCOEX Version: 20151130-0202, SVN ver: 24723
*/
const unsigned char rtlbt_mp_fw[] = {
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0x40, 0xea, 0x01, 0x6c, 0x0e, 0xb2, 0x10, 0x10, 0x11, 0xb4, 0x40, 0x9c,
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0x04, 0xd2, 0xe2, 0x67, 0x0c, 0xb5, 0x0d, 0xb6, 0x0a, 0xb2, 0x40, 0xea,
0x01, 0x6c, 0x0a, 0xb2, 0x80, 0x9a, 0xe0, 0xf3, 0x08, 0x6d, 0x0a, 0xb2,
0x40, 0xea, 0x00, 0x65, 0x07, 0x97, 0x00, 0xef, 0x04, 0x63, 0x00, 0x65,
0x04, 0x5c, 0x12, 0x80, 0x75, 0x0c, 0x01, 0x80, 0x55, 0x4d, 0x10, 0x80,
0xc9, 0x0c, 0x01, 0x80, 0x08, 0x5c, 0x12, 0x80, 0x45, 0x55, 0x10, 0x80,
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0x13, 0xd5, 0x44, 0xa4, 0x24, 0x67, 0x83, 0xa4, 0x40, 0x32, 0xff, 0xf7,
0x1f, 0x6b, 0x89, 0xe2, 0x6c, 0xea, 0xff, 0xf4, 0x05, 0x4b, 0x4e, 0xeb,
0x00, 0xa5, 0xc0, 0xf0, 0x14, 0x23, 0xff, 0xf4, 0x05, 0x6b, 0x63, 0xea,
0x0a, 0x60, 0x7f, 0xf4, 0x0f, 0x72, 0x19, 0x60, 0xcc, 0x4b, 0x4e, 0xeb,
0x6e, 0x23, 0x5f, 0xf4, 0x00, 0x72, 0x5c, 0x60, 0xf4, 0x10, 0xff, 0xf4,
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0xfc, 0x4b, 0x4e, 0xeb, 0x6a, 0x23, 0xe9, 0x10, 0xff, 0xf4, 0x0d, 0x72,
0x16, 0x60, 0x1f, 0xf5, 0x14, 0x72, 0x04, 0x60, 0xe2, 0x10, 0x05, 0xe1,
0x0f, 0x6a, 0x4d, 0x10, 0x73, 0xb2, 0x40, 0xa2, 0x05, 0xe1, 0x04, 0x48,
0x42, 0xc1, 0x72, 0xb2, 0x60, 0xaa, 0x63, 0xc1, 0x40, 0xaa, 0x42, 0x32,
0x44, 0xc1, 0x70, 0xb2, 0x40, 0xa2, 0x45, 0xc1, 0xce, 0x10, 0x6f, 0xb2,
0x62, 0xa2, 0x13, 0x2b, 0x6e, 0xb3, 0xc0, 0xf1, 0x5f, 0xa3, 0x05, 0xe1,
0x07, 0x48, 0x42, 0xc1, 0x01, 0x6a, 0x4b, 0xea, 0x43, 0xc1, 0x44, 0xc1,
0x45, 0xc1, 0x80, 0xf1, 0x9f, 0xa3, 0x86, 0xc1, 0xa0, 0xf1, 0x60, 0xa3,
0x48, 0xc1, 0x67, 0xc1, 0xb8, 0x10, 0x03, 0x73, 0xa0, 0xf0, 0x17, 0x61,
0x63, 0xa2, 0x01, 0x73, 0xa0, 0xf0, 0x13, 0x61, 0xc4, 0x82, 0x62, 0xb3,
0x40, 0x9b, 0x86, 0x67, 0x00, 0x6d, 0x0d, 0xd3, 0x40, 0xea, 0x0c, 0xd6,
0x05, 0xe1, 0x42, 0xc1, 0x0d, 0x93, 0x0c, 0x96, 0x01, 0x6d, 0x40, 0x9b,
0x86, 0x67, 0x40, 0xea, 0x03, 0x48, 0x43, 0xc1, 0x0d, 0x93, 0x0c, 0x96,
0x00, 0x6d, 0x40, 0x9b, 0x40, 0xea, 0x86, 0x67, 0x44, 0xc1, 0x97, 0x10,
0x56, 0xb2, 0x40, 0x9a, 0x40, 0xea, 0x05, 0xe1, 0x55, 0xb2, 0x40, 0xea,
0x00, 0x65, 0x42, 0xc1, 0x01, 0x48, 0x8d, 0x10, 0x4f, 0xb2, 0x05, 0xe1,
0xc0, 0xf1, 0x5a, 0xa2, 0xf8, 0x17, 0x51, 0xb2, 0x80, 0xaa, 0x05, 0xe1,
0x02, 0x48, 0x82, 0xc1, 0x80, 0xaa, 0x82, 0x34, 0x83, 0xc1, 0x60, 0xca,
0x7e, 0x10, 0x09, 0xe1, 0x4c, 0xb1, 0x85, 0x99, 0xfc, 0x6d, 0xc0, 0xf4,
0x02, 0x6e, 0x82, 0xc2, 0x85, 0x99, 0x06, 0xf2, 0x0b, 0x6f, 0x11, 0x48,
0x82, 0x34, 0x83, 0xc2, 0x8b, 0xa9, 0x84, 0xc2, 0x97, 0xa1, 0x85, 0xc2,
0x84, 0x99, 0x86, 0xc2, 0x84, 0x99, 0x82, 0x34, 0x87, 0xc2, 0x89, 0xa9,
0x88, 0xc2, 0x93, 0xa1, 0x89, 0xc2, 0x86, 0x99, 0x8a, 0xc2, 0x86, 0x99,
0x82, 0x34, 0x8b, 0xc2, 0x8d, 0xa9, 0x8c, 0xc2, 0x9b, 0xa1, 0x8d, 0xc2,
0x8e, 0xa9, 0x8e, 0xc2, 0x8e, 0xa9, 0x82, 0x34, 0x8f, 0xc2, 0x8f, 0xa9,
0x90, 0xc2, 0x8f, 0xa9, 0x82, 0x34, 0x91, 0xc2, 0x20, 0xf0, 0x80, 0xa1,
0x92, 0xc2, 0x06, 0x6a, 0x04, 0xd2, 0x35, 0xb2, 0x05, 0xd2, 0x45, 0x99,
0x06, 0xd2, 0x44, 0x99, 0x07, 0xd2, 0x46, 0x99, 0x08, 0xd2, 0x4e, 0xa9,
0x09, 0xd2, 0x4f, 0xa9, 0x0a, 0xd2, 0x20, 0xf0, 0x40, 0x81, 0x0d, 0xd3,
0x0b, 0xd2, 0x2e, 0xb2, 0x40, 0xea, 0x01, 0x6c, 0x0d, 0x93, 0x00, 0x6a,
0x20, 0xf0, 0x40, 0xc1, 0x2b, 0xb2, 0x60, 0xda, 0x2b, 0xb2, 0x65, 0xd9,
0x64, 0xd9, 0x66, 0xd9, 0x6f, 0xc9, 0x60, 0xda, 0x2c, 0x10, 0x09, 0xe1,
0x23, 0xb1, 0x81, 0x99, 0xfc, 0x6d, 0xc0, 0xf4, 0x18, 0x6e, 0x82, 0xc2,
0x81, 0x99, 0x06, 0xf2, 0x0a, 0x6f, 0x82, 0x34, 0x83, 0xc2, 0x83, 0xa9,
0x84, 0xc2, 0x87, 0xa1, 0x85, 0xc2, 0x80, 0x99, 0x86, 0xc2, 0x80, 0x99,
0x82, 0x34, 0x87, 0xc2, 0x81, 0xa9, 0x88, 0xc2, 0x83, 0xa1, 0x89, 0xc2,
0x02, 0x6a, 0x04, 0xd2, 0x17, 0xb2, 0x05, 0xd2, 0x41, 0x99, 0x06, 0xd2,
0x40, 0x99, 0x0d, 0xd3, 0x07, 0xd2, 0x15, 0xb2, 0x40, 0xea, 0x01, 0x6c,
0x16, 0xb2, 0x40, 0xa2, 0x0d, 0x93, 0x02, 0x22, 0x60, 0xd9, 0x61, 0xd9,
0x08, 0x48, 0xff, 0x6a, 0x4c, 0xe8, 0x13, 0x92, 0x00, 0xc2, 0x11, 0x97,
0x10, 0x91, 0x0f, 0x90, 0x00, 0xef, 0x09, 0x63, 0x6c, 0x5c, 0x12, 0x80,
0x6e, 0x5c, 0x12, 0x80, 0x70, 0x5c, 0x12, 0x80, 0x74, 0x5c, 0x12, 0x80,
0x08, 0x02, 0x12, 0x80, 0xac, 0x01, 0x12, 0x80, 0x60, 0x01, 0x12, 0x80,
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0xcc, 0x6d, 0x10, 0x80, 0xc9, 0x59, 0x01, 0x80, 0x10, 0x5c, 0x12, 0x80,
0x14, 0x5c, 0x12, 0x80, 0x0c, 0x5c, 0x12, 0x80, 0xfc, 0x63, 0x07, 0x62,
0x06, 0xd1, 0x05, 0xd0, 0x22, 0xb2, 0x23, 0xb0, 0x40, 0xea, 0x00, 0x6c,
0x40, 0x98, 0x01, 0x6c, 0xc4, 0x67, 0x40, 0xea, 0x60, 0x6d, 0x20, 0xb1,
0x00, 0xf4, 0x01, 0x6f, 0xeb, 0xef, 0x60, 0x99, 0x4c, 0xef, 0x01, 0x6c,
0xff, 0xf7, 0x1f, 0x6a, 0x4c, 0xef, 0x60, 0x6d, 0x40, 0xeb, 0xc4, 0x67,
0x1a, 0xb2, 0x4d, 0xa2, 0x09, 0x22, 0x40, 0x98, 0x00, 0x6c, 0x59, 0x6d,
0x40, 0xea, 0x01, 0x6e, 0x00, 0xf2, 0x00, 0x6f, 0x4d, 0xef, 0x09, 0x10,
0x40, 0x98, 0x00, 0x6c, 0x59, 0x6d, 0x40, 0xea, 0x01, 0x6e, 0x00, 0xf2,
0x01, 0x6f, 0xeb, 0xef, 0x4c, 0xef, 0x60, 0x99, 0xff, 0xf7, 0x1f, 0x6a,
0x4c, 0xef, 0x00, 0x6c, 0x59, 0x6d, 0x40, 0xeb, 0x01, 0x6e, 0x0b, 0xb2,
0x40, 0x9a, 0x30, 0x6f, 0x00, 0x6c, 0x57, 0x6d, 0x40, 0xea, 0x01, 0x6e,
0x00, 0x6c, 0xa4, 0x67, 0x08, 0xb2, 0x40, 0xea, 0xc4, 0x67, 0x07, 0x97,
0x06, 0x91, 0x05, 0x90, 0x00, 0xef, 0x04, 0x63, 0xe5, 0x4d, 0x10, 0x80,
0x48, 0x00, 0x12, 0x80, 0x4c, 0x00, 0x12, 0x80, 0x50, 0x5c, 0x12, 0x80,
0xb1, 0x8d, 0x00, 0x80, 0xfc, 0x63, 0x07, 0x62, 0x06, 0xd1, 0x05, 0xd0,
0x27, 0xb2, 0x40, 0x9a, 0x27, 0xb0, 0x40, 0xea, 0x00, 0x65, 0x40, 0xa8,
0xff, 0xf7, 0x1f, 0x72, 0x1b, 0x60, 0x25, 0xb2, 0x40, 0x9a, 0x03, 0x6c,
0x5f, 0x6d, 0x40, 0xea, 0x01, 0x6e, 0x60, 0xa8, 0x00, 0xf2, 0x00, 0x6f,
0xeb, 0xef, 0x4c, 0xef, 0xe0, 0xf1, 0x1f, 0x6a, 0x6c, 0xea, 0x4d, 0xef,
0x1e, 0xb2, 0x60, 0x9a, 0xff, 0xf7, 0x1f, 0x6a, 0x4c, 0xef, 0x03, 0x6c,
0x5f, 0x6d, 0x40, 0xeb, 0x01, 0x6e, 0x01, 0x6a, 0x4b, 0xea, 0x40, 0xc8,
0x17, 0xb0, 0x40, 0x98, 0x17, 0xb1, 0x00, 0x6c, 0x57, 0x6d, 0x40, 0xea,
0x01, 0x6e, 0x60, 0x99, 0xfd, 0xf7, 0x1f, 0x6f, 0x4c, 0xef, 0x00, 0x6c,
0x57, 0x6d, 0x40, 0xeb, 0x01, 0x6e, 0x40, 0x98, 0x00, 0x6c, 0x57, 0x6d,
0x40, 0xea, 0x01, 0x6e, 0x60, 0x99, 0xff, 0xf6, 0x1f, 0x6f, 0x4c, 0xef,
0x00, 0x6c, 0x57, 0x6d, 0x40, 0xeb, 0x01, 0x6e, 0x0b, 0xb2, 0x40, 0xea,
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0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x00, 0xef, 0x04, 0x63, 0x00, 0x65,
0x7c, 0x5d, 0x12, 0x80, 0x72, 0x5c, 0x12, 0x80, 0x48, 0x00, 0x12, 0x80,
0x4c, 0x00, 0x12, 0x80, 0xa5, 0x48, 0x10, 0x80, 0xb1, 0x8d, 0x00, 0x80,
0xfb, 0x63, 0x09, 0x62, 0x08, 0xd1, 0x07, 0xd0, 0xff, 0x6a, 0x04, 0x67,
0x4c, 0xed, 0x4c, 0xe8, 0x46, 0xb2, 0x40, 0x9a, 0x46, 0xb1, 0x40, 0xea,
0x04, 0xd5, 0x46, 0xb2, 0x40, 0xea, 0x90, 0x67, 0x45, 0xb3, 0x40, 0x9b,
0x00, 0x6c, 0x40, 0xea, 0x05, 0xd3, 0xe1, 0xf7, 0x1f, 0x6d, 0x4c, 0xed,
0x42, 0xb2, 0xc0, 0x9a, 0x02, 0xf0, 0x00, 0x6a, 0x41, 0xb0, 0x4d, 0xed,
0x40, 0xee, 0x00, 0x6c, 0x40, 0x98, 0x03, 0x6c, 0x5f, 0x6d, 0x40, 0xea,
0x01, 0x6e, 0x3e, 0xb4, 0x40, 0xcc, 0x40, 0x98, 0x03, 0x6c, 0x5f, 0x6d,
0x40, 0xea, 0x01, 0x6e, 0x80, 0x99, 0x1f, 0xf6, 0x00, 0x6f, 0x4c, 0xef,
0x0c, 0x65, 0x48, 0x67, 0x01, 0x6e, 0x5f, 0x6d, 0x40, 0xea, 0x03, 0x6c,
0x05, 0x93, 0x40, 0x9b, 0x40, 0xea, 0x3f, 0x6c, 0xff, 0x6d, 0x04, 0x93,
0x01, 0x4d, 0xab, 0xed, 0x4c, 0xed, 0x2f, 0xb4, 0x7f, 0x6a, 0x6c, 0xea,
0x60, 0x9c, 0x4d, 0xed, 0xff, 0xf7, 0x1f, 0x6a, 0x4c, 0xed, 0x40, 0xeb,
0x3f, 0x6c, 0x40, 0x98, 0x00, 0x6c, 0x57, 0x6d, 0x40, 0xea, 0x01, 0x6e,
0xff, 0x6f, 0x60, 0x99, 0x01, 0x4f, 0x4d, 0xef, 0xff, 0xf7, 0x1f, 0x6a,
0x4c, 0xef, 0x00, 0x6c, 0x57, 0x6d, 0x40, 0xeb, 0x01, 0x6e, 0x40, 0x98,
0x00, 0x6c, 0x57, 0x6d, 0x40, 0xea, 0x01, 0x6e, 0x02, 0xf0, 0x00, 0x6b,
0x6d, 0xea, 0x60, 0x99, 0xff, 0xf7, 0x1f, 0x6f, 0x4c, 0xef, 0x00, 0x6c,
0x57, 0x6d, 0x40, 0xeb, 0x01, 0x6e, 0x40, 0x98, 0x00, 0x6c, 0x57, 0x6d,
0x40, 0xea, 0x01, 0x6e, 0x60, 0x99, 0x01, 0x6f, 0x4d, 0xef, 0xff, 0xf7,
0x1f, 0x6a, 0x4c, 0xef, 0x00, 0x6c, 0x57, 0x6d, 0x40, 0xeb, 0x01, 0x6e,
0x40, 0x98, 0x00, 0x6c, 0x57, 0x6d, 0x40, 0xea, 0x01, 0x6e, 0xff, 0xf7,
0x1f, 0x6b, 0x6c, 0xea, 0x60, 0x99, 0xff, 0xf7, 0x1e, 0x6f, 0x4c, 0xef,
0x00, 0x6c, 0x57, 0x6d, 0x40, 0xeb, 0x01, 0x6e, 0x00, 0x6c, 0x04, 0xf0,
0x00, 0x6e, 0x0c, 0xb2, 0x40, 0xea, 0xa4, 0x67, 0x09, 0x97, 0x08, 0x91,
0x07, 0x90, 0x00, 0xef, 0x05, 0x63, 0x00, 0x65, 0x80, 0x5d, 0x12, 0x80,
0x4c, 0x00, 0x12, 0x80, 0x35, 0x48, 0x10, 0x80, 0x40, 0x00, 0x12, 0x80,
0x44, 0x00, 0x12, 0x80, 0x48, 0x00, 0x12, 0x80, 0x72, 0x5c, 0x12, 0x80,
0xb1, 0x8d, 0x00, 0x80, 0xfc, 0x63, 0x07, 0x62, 0x06, 0xd1, 0x05, 0xd0,
0x5d, 0x67, 0x20, 0xf0, 0xa4, 0xc2, 0x20, 0xf0, 0x44, 0xa2, 0xff, 0x68,
0x8c, 0xe8, 0xff, 0x72, 0x10, 0xb1, 0x09, 0x61, 0x01, 0x6b, 0x10, 0xb2,
0x6b, 0xeb, 0x68, 0xc2, 0x02, 0x6b, 0x6c, 0xc2, 0x0e, 0xb2, 0x40, 0xea,
0x00, 0x65, 0x60, 0xa1, 0x69, 0xe2, 0x7d, 0x67, 0x20, 0xf0, 0x44, 0xc3,
0x0b, 0xb2, 0x40, 0x9a, 0x40, 0xea, 0x09, 0x04, 0x5d, 0x67, 0x20, 0xf0,
0x84, 0xa2, 0x7f, 0x6d, 0x08, 0xb2, 0x40, 0xea, 0x0c, 0xed, 0x07, 0x97,
0x06, 0x91, 0x05, 0x90, 0x00, 0xef, 0x04, 0x63, 0x6c, 0x5c, 0x12, 0x80,
0x50, 0x5c, 0x12, 0x80, 0xf5, 0x47, 0x10, 0x80, 0x8c, 0x01, 0x12, 0x80,
0x61, 0x52, 0x10, 0x80, 0xfb, 0x63, 0x09, 0x62, 0x08, 0xd1, 0x07, 0xd0,
0x35, 0xb2, 0x40, 0x9a, 0x35, 0xb0, 0x36, 0xb1, 0x40, 0xea, 0x00, 0x65,
0x40, 0x98, 0x70, 0x6f, 0x00, 0x6c, 0x57, 0x6d, 0x40, 0xea, 0x01, 0x6e,
0x40, 0x99, 0x00, 0x6c, 0x5c, 0x6d, 0x40, 0xea, 0x01, 0x6e, 0x60, 0x98,
0xff, 0xf7, 0x1c, 0x6f, 0x4c, 0xef, 0x00, 0x6c, 0x5c, 0x6d, 0x40, 0xeb,
0x01, 0x6e, 0x40, 0x99, 0x00, 0x6c, 0x5a, 0x6d, 0x40, 0xea, 0x01, 0x6e,
0x60, 0x98, 0xff, 0xf4, 0x1f, 0x6f, 0x4c, 0xef, 0x00, 0x6c, 0x5a, 0x6d,
0x40, 0xeb, 0x01, 0x6e, 0x25, 0xb3, 0x40, 0xa3, 0xff, 0x72, 0x1a, 0x60,
0x40, 0x99, 0x00, 0x6c, 0x4b, 0x6d, 0x01, 0x6e, 0x40, 0xea, 0x04, 0xd3,
0x04, 0x93, 0x3f, 0x6f, 0xeb, 0xef, 0x80, 0xa3, 0x4c, 0xef, 0x3e, 0x6a,
0x8c, 0xea, 0x00, 0x98, 0x4d, 0xef, 0xff, 0xf7, 0x1f, 0x6a, 0x4c, 0xef,
0x00, 0x6c, 0x4b, 0x6d, 0x40, 0xe8, 0x01, 0x6e, 0x04, 0x93, 0x01, 0x6a,
0x4b, 0xea, 0x40, 0xc3, 0x15, 0xb0, 0x40, 0x98, 0x13, 0xb1, 0x00, 0x6c,
0x5e, 0x6d, 0x40, 0xea, 0x01, 0x6e, 0x60, 0x99, 0xcf, 0xf2, 0x1f, 0x6f,
0x4c, 0xef, 0x00, 0x6c, 0x5e, 0x6d, 0x40, 0xeb, 0x01, 0x6e, 0x00, 0x6c,
0xa4, 0x67, 0x0f, 0xb2, 0x40, 0xea, 0xc4, 0x67, 0x40, 0x98, 0x01, 0x6c,
0xc4, 0x67, 0x40, 0xea, 0x60, 0x6d, 0x60, 0x99, 0x01, 0x6c, 0xff, 0xf3,
0x1f, 0x6f, 0x4c, 0xef, 0x60, 0x6d, 0x40, 0xeb, 0xc4, 0x67, 0x09, 0x97,
0x08, 0x91, 0x07, 0x90, 0x00, 0xef, 0x05, 0x63, 0x7c, 0x5d, 0x12, 0x80,
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0x4c, 0x01, 0x12, 0x80, 0x00, 0x5c, 0x12, 0x80, 0xfd, 0x63, 0x05, 0x62,
0x09, 0xb2, 0x40, 0xea, 0x00, 0x65, 0x09, 0xb2, 0x62, 0xa2, 0xff, 0x73,
0x02, 0x61, 0x23, 0x6b, 0x62, 0xc2, 0x06, 0xb2, 0x63, 0xa2, 0xff, 0x73,
0x02, 0x61, 0x23, 0x6b, 0x62, 0xc2, 0x05, 0x97, 0x00, 0xef, 0x03, 0x63,
0x81, 0xc4, 0x00, 0x80, 0xb8, 0x12, 0x12, 0x80, 0xfd, 0x63, 0x05, 0x62,
0xff, 0x6a, 0x4c, 0xec, 0x4c, 0xed, 0x04, 0xb2, 0x40, 0xea, 0x00, 0x65,
0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0x21, 0xc7, 0x00, 0x80,
0xf7, 0x63, 0x11, 0x62, 0x10, 0xd1, 0x0f, 0xd0, 0x00, 0xf6, 0x80, 0x34,
0x00, 0xf6, 0x83, 0x34, 0x2e, 0xb0, 0x2f, 0xb1, 0x0c, 0xd4, 0x0c, 0x97,
0x82, 0xa0, 0x40, 0x99, 0x00, 0x6d, 0x40, 0xea, 0xc5, 0x67, 0x50, 0xc0,
0x84, 0xa0, 0x0c, 0x97, 0x40, 0x99, 0x00, 0x6d, 0x40, 0xea, 0xc5, 0x67,
0x52, 0xc0, 0x85, 0xa0, 0x0c, 0x97, 0x40, 0x99, 0x00, 0x6d, 0x40, 0xea,
0xc5, 0x67, 0x53, 0xc0, 0x83, 0xa0, 0x0c, 0x97, 0x40, 0x99, 0x00, 0x6d,
0x40, 0xea, 0xc5, 0x67, 0x51, 0xc0, 0x86, 0xa0, 0x0c, 0x97, 0x40, 0x99,
0x00, 0x6d, 0x40, 0xea, 0xc5, 0x67, 0x54, 0xc0, 0x87, 0xa0, 0x0c, 0x97,
0x40, 0x99, 0x00, 0x6d, 0x40, 0xea, 0xc5, 0x67, 0x55, 0xc0, 0x88, 0xa0,
0x0c, 0x97, 0x40, 0x99, 0x00, 0x6d, 0x40, 0xea, 0xc5, 0x67, 0x56, 0xc0,
0x89, 0xa0, 0x40, 0x99, 0x0c, 0x97, 0x00, 0x6d, 0x40, 0xea, 0xc5, 0x67,
0x79, 0xa0, 0x57, 0xc0, 0x02, 0x6a, 0x6c, 0xea, 0x18, 0x22, 0x06, 0x6a,
0x04, 0xd2, 0x10, 0xb2, 0x05, 0xd2, 0x50, 0xa0, 0x04, 0x6c, 0x06, 0xd2,
0x51, 0xa0, 0x00, 0xf2, 0x12, 0x6e, 0x29, 0xf6, 0x13, 0x6f, 0x07, 0xd2,
0x52, 0xa0, 0x08, 0xd2, 0x53, 0xa0, 0x09, 0xd2, 0x54, 0xa0, 0x0a, 0xd2,
0x55, 0xa0, 0x0b, 0xd2, 0x07, 0xb2, 0x40, 0xea, 0xfd, 0x6d, 0x11, 0x97,
0x10, 0x91, 0x0f, 0x90, 0x00, 0xef, 0x09, 0x63, 0xb8, 0x12, 0x12, 0x80,
0x84, 0x01, 0x12, 0x80, 0xcc, 0x6d, 0x10, 0x80, 0xc9, 0x59, 0x01, 0x80,
0xf7, 0x63, 0x11, 0x62, 0x10, 0xd1, 0x0f, 0xd0, 0x00, 0xf6, 0x80, 0x31,
0x38, 0xb4, 0x79, 0xa4, 0x02, 0x6a, 0x00, 0xf6, 0x23, 0x31, 0x6c, 0xea,
0x1f, 0x22, 0x36, 0xb2, 0x08, 0xa2, 0x36, 0xb2, 0xc0, 0xf1, 0x7c, 0xa2,
0xa1, 0x84, 0x35, 0xb2, 0x40, 0x9a, 0x02, 0x6c, 0x0d, 0xd3, 0x40, 0xea,
0x0c, 0xd5, 0x0c, 0x95, 0x0d, 0x93, 0x05, 0x6c, 0x04, 0xd4, 0xff, 0x6e,
0x30, 0xb4, 0x05, 0xd4, 0x09, 0xd5, 0x0a, 0xd2, 0x06, 0xd0, 0x07, 0xd3,
0x08, 0xd1, 0x01, 0x6c, 0xfd, 0x6d, 0x29, 0xf6, 0x12, 0x6f, 0x2c, 0xb2,
0x40, 0xea, 0x4f, 0x4e, 0x25, 0xb0, 0x4f, 0x80, 0x2e, 0xea, 0x40, 0x22,
0x29, 0xb2, 0x40, 0x9a, 0x40, 0xea, 0x2f, 0xc0, 0x28, 0xb2, 0x40, 0x9a,
0x40, 0xea, 0x91, 0x67, 0x27, 0xb2, 0x40, 0x9a, 0x40, 0xea, 0x00, 0x65,
0x51, 0xa0, 0x70, 0xa0, 0x40, 0x32, 0x6d, 0xea, 0x24, 0xb3, 0x40, 0xcb,
0x47, 0xa0, 0x66, 0xa0, 0x40, 0x32, 0x6d, 0xea, 0x22, 0xb3, 0x40, 0xcb,
0x45, 0xa0, 0x64, 0xa0, 0x40, 0x32, 0x6d, 0xea, 0x20, 0xb3, 0x40, 0xcb,
0x20, 0xb2, 0x40, 0xf1, 0x08, 0x9a, 0x0f, 0x10, 0x63, 0xa0, 0x01, 0x6a,
0x6c, 0xea, 0x09, 0x22, 0x1d, 0xb2, 0x40, 0x9a, 0x40, 0xea, 0x82, 0xa0,
0x1c, 0xb3, 0x60, 0x9b, 0x82, 0xa0, 0x40, 0xeb, 0xa2, 0x67, 0x40, 0xf1,
0x10, 0x48, 0x1a, 0xb2, 0x60, 0x9a, 0x1a, 0xb2, 0x40, 0x9a, 0x49, 0xe3,
0xff, 0x6b, 0x51, 0x4b, 0x78, 0xea, 0x13, 0xb3, 0x40, 0xf1, 0x68, 0x9b,
0x12, 0xea, 0x49, 0xe3, 0x43, 0xe8, 0xe2, 0x61, 0x11, 0x97, 0x10, 0x91,
0x0f, 0x90, 0x00, 0xef, 0x09, 0x63, 0x00, 0x65, 0xb8, 0x12, 0x12, 0x80,
0xf4, 0x12, 0x12, 0x80, 0x08, 0x02, 0x12, 0x80, 0x40, 0x00, 0x12, 0x80,
0xcc, 0x6d, 0x10, 0x80, 0xc9, 0x59, 0x01, 0x80, 0x80, 0x01, 0x12, 0x80,
0x88, 0x01, 0x12, 0x80, 0x90, 0x01, 0x12, 0x80, 0xe8, 0x10, 0x00, 0xb6,
0xea, 0x10, 0x00, 0xb6, 0xf0, 0x10, 0x00, 0xb6, 0xbc, 0x35, 0x12, 0x80,
0xa4, 0x01, 0x12, 0x80, 0xb0, 0x01, 0x12, 0x80, 0x80, 0x05, 0x12, 0x80,
0x7c, 0x05, 0x12, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x0f, 0xb2, 0x40, 0xea,
0x00, 0x65, 0x0f, 0xb2, 0x0d, 0x6b, 0x65, 0xca, 0x81, 0xf4, 0x1c, 0x6b,
0x66, 0xca, 0x1a, 0x6b, 0x0c, 0xb2, 0xe0, 0xf1, 0x63, 0xc2, 0x0c, 0xb2,
0x0c, 0xb3, 0x60, 0xda, 0x50, 0x6b, 0x62, 0xca, 0x0b, 0xb3, 0x64, 0xda,
0x04, 0x6b, 0x6a, 0xca, 0x0a, 0xb3, 0x66, 0xda, 0x18, 0x6b, 0x6e, 0xca,
0x05, 0x97, 0x00, 0xef, 0x03, 0x63, 0x00, 0x65, 0xe9, 0xc9, 0x00, 0x80,
0xf4, 0x12, 0x12, 0x80, 0x08, 0x02, 0x12, 0x80, 0xd4, 0x12, 0x12, 0x80,
0xb4, 0x6e, 0x10, 0x80, 0x54, 0x6f, 0x10, 0x80, 0x7c, 0x6e, 0x10, 0x80,
0xfd, 0x63, 0x05, 0x62, 0x04, 0xd0, 0x16, 0xb2, 0x40, 0xea, 0x00, 0x65,
0x6c, 0x6b, 0x6b, 0xeb, 0x14, 0xb2, 0x20, 0xf1, 0x71, 0xc2, 0x14, 0xb3,
0x80, 0xa3, 0x80, 0x6a, 0x4b, 0xea, 0x8c, 0xea, 0xff, 0x6c, 0x8c, 0xea,
0x17, 0x22, 0x11, 0xb2, 0x40, 0x9a, 0x06, 0xa3, 0x00, 0x6c, 0x4b, 0x6d,
0x40, 0xea, 0x01, 0x6e, 0x3f, 0x6f, 0xeb, 0xef, 0x4c, 0xef, 0x04, 0x30,
0x3e, 0x6a, 0x4c, 0xe8, 0x0b, 0xb2, 0x60, 0x9a, 0x0d, 0xef, 0xff, 0xf7,
0x1f, 0x6a, 0x00, 0x6c, 0x4b, 0x6d, 0x01, 0x6e, 0x40, 0xeb, 0x4c, 0xef,
0x05, 0x97, 0x04, 0x90, 0x00, 0xef, 0x03, 0x63, 0x45, 0xc2, 0x00, 0x80,
0x08, 0x02, 0x12, 0x80, 0x84, 0x5d, 0x12, 0x80, 0x48, 0x00, 0x12, 0x80,
0x4c, 0x00, 0x12, 0x80, 0xfd, 0x63, 0x05, 0x62, 0x05, 0xb2, 0x40, 0xea,
0x00, 0x65, 0x05, 0xb2, 0x40, 0xea, 0x00, 0x65, 0x05, 0x97, 0x00, 0xef,
0x03, 0x63, 0x00, 0x65, 0xc1, 0xc2, 0x00, 0x80, 0x0d, 0x68, 0x10, 0x80,
0x41, 0x00, 0x00, 0x00, 0x07, 0x00, 0xf8, 0x03, 0x00, 0xe0, 0x07, 0x00,
0xc0, 0x7f, 0x00, 0x00, 0x01, 0x00, 0xd8, 0x00, 0xd8, 0x00, 0x00, 0x00,
0x20, 0x38, 0x03, 0x00, 0x63, 0x27, 0x00, 0x00, 0x01, 0x00, 0xb8, 0x05,
0xb8, 0x05, 0x00, 0x00, 0x58, 0x98, 0x03, 0x00, 0xf4, 0xc5, 0x00, 0x00,
0x01, 0x00, 0x98, 0x0a, 0x98, 0x0a, 0x00, 0x00, 0x78, 0xa0, 0x00, 0x00,
0x72, 0xc8, 0x00, 0x00, 0x02, 0x00, 0xb0, 0x01, 0xb0, 0x01, 0x00, 0x00,
0x20, 0x38, 0x03, 0x00, 0x54, 0x5b, 0x00, 0x00, 0x02, 0x00, 0x78, 0x0b,
0x78, 0x0b, 0x00, 0x00, 0x50, 0xc0, 0x00, 0x00, 0x36, 0xe5, 0x00, 0x00,
0x02, 0x00, 0x38, 0x15, 0x38, 0x15, 0x00, 0x00, 0x70, 0xf8, 0x03, 0x00,
0xd3, 0xe9, 0x00, 0x00, 0x03, 0x00, 0x98, 0x02, 0x98, 0x02, 0x00, 0x00,
0x40, 0x5c, 0x01, 0x00, 0xc3, 0xbe, 0x00, 0x00, 0x03, 0x00, 0x40, 0x11,
0x40, 0x11, 0x00, 0x00, 0x58, 0x98, 0x03, 0x00, 0x4e, 0x62, 0x00, 0x00,
0x03, 0x00, 0xe8, 0x1f, 0xe8, 0x1f, 0x00, 0x00, 0x78, 0xa0, 0x00, 0x00,
0xe1, 0x64, 0x00, 0x00, 0x01, 0x00, 0xf8, 0x00, 0xf8, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x4f, 0x1d, 0x7c, 0x00, 0x00, 0xf0, 0x20, 0x00,
0x00, 0x90, 0x4f, 0x03, 0x00, 0xf0, 0x20, 0x00, 0x00, 0x90, 0x6f, 0x03,
0x00, 0xf0, 0x08, 0x00, 0x02, 0x90, 0x17, 0xf8, 0x34, 0x00, 0x03, 0x10,
0x36, 0x00, 0x00, 0xe2, 0x38, 0x00, 0x01, 0x31, 0x3a, 0x00, 0xe0, 0x05,
0x64, 0x00, 0x40, 0x2e, 0x1a, 0x01, 0x12, 0x36, 0x64, 0x06, 0x27, 0x00,
0x64, 0x06, 0x26, 0x00, 0x42, 0x02, 0xff, 0x05, 0x44, 0x02, 0xf7, 0x63,
0x16, 0x03, 0x53, 0x76, 0x14, 0x03, 0x00, 0x00, 0x74, 0x03, 0x86, 0x06,
0x72, 0x03, 0xd1, 0x04, 0x70, 0x03, 0x57, 0x04, 0x6e, 0x03, 0x1e, 0x04,
0x6c, 0x03, 0x2c, 0x04, 0x6a, 0x03, 0x3f, 0x00, 0x68, 0x03, 0x3f, 0x00,
0x66, 0x03, 0x3f, 0x00, 0x16, 0x00, 0xbe, 0xa6, 0x40, 0x03, 0x8a, 0x03,
0x3a, 0x02, 0xa6, 0x00, 0x3c, 0x02, 0x7e, 0xc0, 0x60, 0x02, 0x36, 0x21,
0x62, 0x02, 0xce, 0x17, 0x08, 0x03, 0x29, 0x29, 0x42, 0x03, 0x01, 0x09,
0x48, 0x03, 0x29, 0x25, 0x56, 0x03, 0x0d, 0x33, 0x5a, 0x03, 0x45, 0x00,
0x1a, 0x06, 0x8b, 0xd3, 0x30, 0x06, 0x26, 0x67, 0x34, 0x06, 0x7f, 0xc8,
0x42, 0x06, 0x4d, 0x43, 0x44, 0x06, 0x8d, 0x46, 0x34, 0x01, 0x00, 0x00,
0x38, 0x01, 0x00, 0x00, 0x60, 0x01, 0x4a, 0x26, 0x64, 0x01, 0x44, 0x3b,
0x66, 0x01, 0xd2, 0x76, 0x08, 0x00, 0xb0, 0x00, 0x66, 0x00, 0x59, 0x40,
0x0a, 0x06, 0xdb, 0x50, 0x0c, 0x06, 0xf2, 0x7b, 0x10, 0x06, 0x8c, 0x55,
0x12, 0x06, 0x0a, 0x28, 0x14, 0x06, 0x27, 0x01, 0x00, 0xf0, 0x00, 0x40,
0x7a, 0x51, 0x00, 0x44, 0x02, 0x02, 0x6a, 0x7c, 0x93, 0x60, 0x00, 0x00,
0xde, 0x28, 0xa8, 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0f, 0x01, 0x00,
0x51, 0x04, 0xfd, 0x77
};
unsigned int rtlbt_mp_fw_len = sizeof(rtlbt_mp_fw);
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/hci/bt_mp_patch.c
|
C
|
apache-2.0
| 77,138
|
/**
*******************************************************************************
* Copyright(c) 2019, Realtek Semiconductor Corporation. All rights reserved.
*******************************************************************************
* @file AmebaD_mp_chip_bt40_fw_asic_rom_patch_0x42A8_51E2_210310_1045_new.(AmebaD_bt_210310).bin
* @date 2021-03-10 10:45
* @patch3 HCI ver: 0x42A8, LMP ver: 0x5124, BTCOEX Version: 20151130-0202, SVN ver: 24881
*/
const unsigned char rtlbt_fw[] = {
0x52, 0x65, 0x61, 0x6c, 0x74, 0x65, 0x63, 0x68, 0xe2, 0x51, 0xa8, 0x42,
0x01, 0x00, 0x03, 0x00, 0x10, 0x2a, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xfc, 0x63, 0x07, 0x62, 0x06, 0xd1, 0x05, 0xd0, 0x46, 0xb2, 0x40, 0x9a,
0x46, 0xb3, 0x47, 0xb0, 0x42, 0x34, 0x82, 0x34, 0x80, 0xcb, 0x46, 0xb3,
0x40, 0xcb, 0x46, 0xb2, 0x40, 0xea, 0x00, 0x69, 0x45, 0xb3, 0x46, 0xb2,
0x60, 0xda, 0x46, 0xb3, 0x46, 0xb2, 0x60, 0xda, 0x46, 0xb3, 0x47, 0xb2,
0x60, 0xda, 0x47, 0xb3, 0x47, 0xb2, 0x60, 0xda, 0x47, 0xb3, 0x48, 0xb2,
0x60, 0xda, 0x48, 0xb3, 0x48, 0xb2, 0x60, 0xda, 0x48, 0xb3, 0x49, 0xb2,
0x60, 0xda, 0x49, 0xb3, 0x49, 0xb2, 0x60, 0xda, 0xa0, 0xf0, 0x4b, 0xa0,
0xa0, 0xf0, 0x6a, 0xa0, 0x40, 0x32, 0x6d, 0xea, 0xa0, 0xf0, 0x6c, 0xa0,
0x60, 0x33, 0x60, 0x33, 0x4d, 0xeb, 0xa0, 0xf0, 0x4d, 0xa0, 0x00, 0xf6,
0x40, 0x32, 0x6d, 0xea, 0x08, 0xf0, 0x01, 0x6b, 0x6b, 0xeb, 0x6c, 0xea,
0x42, 0x33, 0xa0, 0xf0, 0x4a, 0xc0, 0xa0, 0xf0, 0x6b, 0xc0, 0x00, 0xf6,
0x42, 0x32, 0x62, 0x33, 0xa0, 0xf0, 0x6c, 0xc0, 0xa0, 0xf0, 0x4d, 0xc0,
0x39, 0xb3, 0x3a, 0xb2, 0x60, 0xda, 0x3a, 0xb2, 0x40, 0xea, 0x00, 0x65,
0x39, 0xb3, 0x3a, 0xb2, 0x60, 0xda, 0x3a, 0xb3, 0x3a, 0xb2, 0x60, 0xda,
0x3a, 0xb3, 0x3b, 0xb2, 0x66, 0xda, 0x3b, 0xb2, 0x20, 0xc2, 0x3b, 0xb3,
0x3b, 0xb2, 0x60, 0xda, 0x3b, 0xb3, 0x3c, 0xb2, 0x65, 0xda, 0x3c, 0xb3,
0x3c, 0xb2, 0x60, 0xda, 0x3c, 0xb3, 0x3d, 0xb2, 0x60, 0xda, 0x3d, 0xb2,
0x40, 0xea, 0x00, 0x65, 0x3c, 0xb2, 0x40, 0xea, 0x00, 0x65, 0x3c, 0xb3,
0x3c, 0xb2, 0x60, 0xda, 0x3c, 0xb2, 0x3d, 0xb3, 0x60, 0xda, 0xe0, 0xf0,
0x23, 0xc0, 0x51, 0x67, 0x44, 0x33, 0x3b, 0xb4, 0x01, 0x4a, 0x71, 0xe4,
0x18, 0x52, 0x00, 0x6b, 0x60, 0xcc, 0xf8, 0x61, 0x38, 0xb4, 0x39, 0xb2,
0x80, 0xda, 0x39, 0xb4, 0x39, 0xb2, 0x80, 0xda, 0x39, 0xb4, 0x24, 0xb2,
0x9f, 0xda, 0x39, 0xb2, 0x60, 0xca, 0x39, 0xb3, 0x39, 0xb2, 0x60, 0xda,
0x07, 0x97, 0x06, 0x91, 0x05, 0x90, 0x00, 0xef, 0x04, 0x63, 0x00, 0x65,
0x0c, 0x6a, 0x10, 0x80, 0x02, 0x02, 0x12, 0x80, 0x08, 0x02, 0x12, 0x80,
0x00, 0x02, 0x12, 0x80, 0x15, 0x61, 0x10, 0x80, 0xfd, 0x53, 0x10, 0x80,
0x0c, 0x0b, 0x12, 0x80, 0x19, 0x59, 0x10, 0x80, 0x8c, 0x07, 0x12, 0x80,
0xb9, 0x58, 0x10, 0x80, 0x84, 0x05, 0x12, 0x80, 0x75, 0x58, 0x10, 0x80,
0x88, 0x05, 0x12, 0x80, 0x25, 0x58, 0x10, 0x80, 0xd0, 0x07, 0x12, 0x80,
0x2d, 0x55, 0x10, 0x80, 0x30, 0x09, 0x12, 0x80, 0xf9, 0x41, 0x10, 0x80,
0x3c, 0x09, 0x12, 0x80, 0x0d, 0x55, 0x10, 0x80, 0xbc, 0x07, 0x12, 0x80,
0x81, 0x5a, 0x10, 0x80, 0x4c, 0x09, 0x12, 0x80, 0x45, 0x59, 0x10, 0x80,
0xd9, 0x50, 0x10, 0x80, 0x20, 0x0b, 0x12, 0x80, 0x59, 0x51, 0x10, 0x80,
0x88, 0x06, 0x12, 0x80, 0x4d, 0x4f, 0x10, 0x80, 0x0c, 0x04, 0x12, 0x80,
0x0a, 0x5c, 0x12, 0x80, 0x6d, 0x48, 0x10, 0x80, 0xc4, 0x0a, 0x12, 0x80,
0xc9, 0x48, 0x10, 0x80, 0x90, 0x05, 0x12, 0x80, 0xe1, 0x45, 0x10, 0x80,
0x64, 0x0a, 0x12, 0x80, 0x85, 0x65, 0x10, 0x80, 0xf0, 0x06, 0x12, 0x80,
0x31, 0x57, 0x10, 0x80, 0x09, 0x37, 0x00, 0x80, 0xf9, 0x4d, 0x10, 0x80,
0xe4, 0x0a, 0x12, 0x80, 0xf8, 0x0a, 0x12, 0x80, 0x81, 0x49, 0x10, 0x80,
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0x67, 0xee, 0x03, 0x6e, 0xcc, 0xeb, 0x03, 0x73, 0x08, 0x61, 0x4e, 0x36,
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0x40, 0xeb, 0x02, 0x30, 0x0b, 0x10, 0x1e, 0x6b, 0xf8, 0x49, 0x78, 0xe9,
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0x1f, 0x6c, 0x8c, 0xea, 0x46, 0xcb, 0x93, 0xb3, 0x40, 0xcb, 0x71, 0xa8,
0x80, 0xf0, 0x54, 0xa8, 0x6e, 0xea, 0x10, 0x2a, 0x73, 0xa8, 0x80, 0xf0,
0x56, 0xa8, 0x6e, 0xea, 0x0b, 0x2a, 0x75, 0xa8, 0x80, 0xf0, 0x58, 0xa8,
0x6e, 0xea, 0x06, 0x2a, 0x40, 0xf0, 0x7e, 0xa0, 0x01, 0x6a, 0x6a, 0x33,
0x4c, 0xeb, 0x01, 0x10, 0x01, 0x6b, 0x8a, 0xb2, 0x40, 0x9a, 0x40, 0xea,
0x16, 0xd3, 0x0c, 0x6c, 0x04, 0xd4, 0x85, 0xb4, 0x05, 0xd4, 0x06, 0xd2,
0x07, 0xd1, 0x43, 0xa0, 0x01, 0x6c, 0x4a, 0x32, 0x8c, 0xea, 0x08, 0xd2,
0x51, 0xa8, 0x01, 0xf6, 0x0c, 0x6e, 0x22, 0xf2, 0x1d, 0x6f, 0x09, 0xd2,
0x80, 0xf0, 0x54, 0xa8, 0x0a, 0xd2, 0x52, 0xa8, 0x0b, 0xd2, 0x80, 0xf0,
0x5e, 0xa8, 0x0c, 0xd2, 0x53, 0xa8, 0x0d, 0xd2, 0x80, 0xf0, 0x56, 0xa8,
0x0e, 0xd2, 0x55, 0xa8, 0x0f, 0xd2, 0x80, 0xf0, 0x58, 0xa8, 0x10, 0xd2,
0x54, 0xa8, 0x11, 0xd2, 0x74, 0xb2, 0x40, 0xea, 0xfa, 0x6d, 0x6d, 0xb2,
0x40, 0xa2, 0x16, 0x93, 0x01, 0x72, 0x04, 0x61, 0x80, 0xf0, 0x5e, 0xa8,
0x52, 0xc8, 0x18, 0x10, 0x80, 0xf0, 0x96, 0xa8, 0x42, 0xa0, 0x14, 0x24,
0xff, 0x6c, 0xf8, 0x4a, 0x8c, 0xea, 0x6d, 0xb4, 0x51, 0xe4, 0x80, 0xa4,
0x0d, 0x24, 0x6c, 0xb6, 0x44, 0x34, 0x20, 0xf2, 0x1e, 0x4c, 0xd1, 0xe4,
0x40, 0xac, 0xff, 0xf7, 0x1f, 0x6d, 0x02, 0x6e, 0xac, 0xea, 0xcd, 0xea,
0xac, 0xea, 0x40, 0xcc, 0x80, 0xf0, 0x54, 0xa8, 0x01, 0x6c, 0x02, 0x6e,
0x51, 0xc8, 0x80, 0xf0, 0x56, 0xa8, 0x01, 0x6d, 0x53, 0xc8, 0x80, 0xf0,
0x58, 0xa8, 0x55, 0xc8, 0x5d, 0x98, 0x16, 0xd3, 0x8c, 0xea, 0x5b, 0xe6,
0x5e, 0xb2, 0x40, 0xea, 0x90, 0x67, 0x5e, 0xb2, 0x40, 0xea, 0x00, 0x65,
0x91, 0x67, 0x5d, 0xb2, 0x40, 0xea, 0x00, 0x6d, 0x43, 0xa0, 0x03, 0x6c,
0x4e, 0x32, 0x8c, 0xea, 0x4e, 0xb4, 0x49, 0xe4, 0x09, 0x6c, 0x20, 0xf1,
0x92, 0xc2, 0x16, 0x93, 0x80, 0xf0, 0x0c, 0x23, 0x40, 0xf0, 0x7e, 0xa0,
0x04, 0x6a, 0x6c, 0xea, 0x05, 0x22, 0x05, 0x6a, 0x4b, 0xea, 0x6c, 0xea,
0x40, 0xf0, 0x5e, 0xc0, 0x0f, 0x6a, 0x2c, 0xea, 0x54, 0x32, 0x05, 0x6d,
0x4d, 0xed, 0x7d, 0x67, 0x60, 0xf2, 0x0f, 0x6a, 0x40, 0xf0, 0x50, 0xcb,
0x4c, 0xb2, 0x80, 0x9a, 0x15, 0x92, 0x13, 0x96, 0x14, 0x97, 0x04, 0xd2,
0x4a, 0xb2, 0x40, 0xea, 0x12, 0xd5, 0x6e, 0x10, 0x60, 0xa3, 0x01, 0x73,
0x04, 0x61, 0x3a, 0xb2, 0x20, 0xf1, 0x54, 0xa2, 0x02, 0x10, 0x39, 0xb2,
0x40, 0xa2, 0x09, 0x72, 0x63, 0x60, 0x52, 0x4a, 0x35, 0xb4, 0x48, 0x32,
0x49, 0xe4, 0x01, 0x73, 0x01, 0x9a, 0x13, 0x61, 0x20, 0xf1, 0x4d, 0xa4,
0x40, 0xf0, 0x53, 0xc0, 0x20, 0xf1, 0x4e, 0xa4, 0x40, 0xf0, 0x54, 0xc0,
0x20, 0xf1, 0x4f, 0xa4, 0x40, 0xf0, 0x55, 0xc0, 0x20, 0xf1, 0x50, 0xa4,
0x40, 0xf0, 0x56, 0xc0, 0x20, 0xf1, 0x51, 0xa4, 0x19, 0x10, 0x2a, 0xb2,
0x80, 0xa2, 0x36, 0xb2, 0x40, 0xea, 0x00, 0x65, 0xff, 0x72, 0x14, 0x60,
0x07, 0x6b, 0x78, 0xea, 0x33, 0xb3, 0x12, 0xea, 0x49, 0xe3, 0x65, 0xa2,
0x40, 0xf0, 0x73, 0xc0, 0x66, 0xa2, 0x40, 0xf0, 0x74, 0xc0, 0x67, 0xa2,
0x40, 0xf0, 0x75, 0xc0, 0x68, 0xa2, 0x40, 0xf0, 0x76, 0xc0, 0x49, 0xa2,
0x40, 0xf0, 0x57, 0xc0, 0xdd, 0x98, 0x02, 0x69, 0x23, 0xb2, 0x2c, 0xee,
0xcb, 0xee, 0xc0, 0xf7, 0xc2, 0x36, 0x90, 0x67, 0xb1, 0x67, 0x40, 0xea,
0xdb, 0xe1, 0x43, 0xa0, 0x03, 0x6b, 0x4e, 0x32, 0x6c, 0xea, 0x14, 0xb3,
0x49, 0xe3, 0x09, 0x6b, 0x20, 0xf1, 0x74, 0xc2, 0x10, 0xb2, 0x40, 0xa2,
0x01, 0x72, 0x16, 0x60, 0x73, 0xa8, 0x42, 0xa0, 0x13, 0x23, 0xff, 0x6b,
0xf8, 0x4a, 0x6c, 0xea, 0x13, 0xb3, 0x4d, 0xe3, 0x60, 0xa3, 0x0c, 0x23,
0x12, 0xb5, 0x44, 0x33, 0x20, 0xf2, 0x1e, 0x4b, 0xad, 0xe3, 0x40, 0xab,
0xff, 0xf7, 0x1f, 0x6c, 0x8c, 0xea, 0x2d, 0xea, 0x8c, 0xea, 0x40, 0xcb,
0x1b, 0x97, 0x1a, 0x91, 0x19, 0x90, 0x00, 0xef, 0x0e, 0x63, 0x00, 0x65,
0xe8, 0x06, 0x12, 0x80, 0xbc, 0x35, 0x12, 0x80, 0xe9, 0x06, 0x12, 0x80,
0x75, 0x0c, 0x01, 0x80, 0x82, 0x10, 0x00, 0xb6, 0x00, 0x69, 0x10, 0x80,
0xc9, 0x59, 0x01, 0x80, 0x10, 0x00, 0x12, 0x80, 0x00, 0x6a, 0x10, 0x80,
0x00, 0x10, 0x00, 0xb6, 0xd5, 0xbc, 0x01, 0x80, 0x3d, 0x2f, 0x02, 0x80,
0x55, 0xa8, 0x01, 0x80, 0xe0, 0x0e, 0x12, 0x80, 0x85, 0x0a, 0x01, 0x80,
0xb1, 0x4a, 0x02, 0x80, 0xe0, 0x3b, 0x12, 0x80, 0xfc, 0x63, 0x07, 0x62,
0x06, 0xd1, 0x05, 0xd0, 0xff, 0x6a, 0x24, 0x67, 0x4c, 0xe9, 0x67, 0x41,
0x4b, 0x4b, 0x0e, 0xb4, 0x68, 0x33, 0x6d, 0xe4, 0x01, 0x9b, 0x04, 0x6b,
0x85, 0xa0, 0x8c, 0xeb, 0x4c, 0xeb, 0x0b, 0x23, 0x0a, 0xb2, 0x40, 0x9a,
0x02, 0x6c, 0x78, 0x6d, 0x40, 0xea, 0x01, 0x6e, 0x40, 0xf0, 0x5c, 0xc8,
0x07, 0xb2, 0x40, 0xea, 0x91, 0x67, 0x07, 0x97, 0x06, 0x91, 0x05, 0x90,
0x00, 0x6a, 0x00, 0xef, 0x04, 0x63, 0x00, 0x65, 0xbc, 0x35, 0x12, 0x80,
0x48, 0x00, 0x12, 0x80, 0x51, 0x28, 0x02, 0x80, 0x41, 0x00, 0x00, 0x00,
0x07, 0x00, 0xf8, 0x03, 0x00, 0xe0, 0x07, 0x00, 0xc0, 0x7f, 0x00, 0x00,
0xb9, 0x5b, 0x10, 0x80, 0x71, 0x5a, 0x10, 0x80, 0x75, 0x5a, 0x10, 0x80,
0xe9, 0x5a, 0x10, 0x80, 0x79, 0x5a, 0x10, 0x80, 0x7d, 0x5a, 0x10, 0x80,
0x00, 0xf0, 0x20, 0x00, 0x00, 0x90, 0x4f, 0x03, 0x00, 0xf0, 0x20, 0x00,
0x00, 0x90, 0x6f, 0x03, 0x00, 0xf0, 0x08, 0x00, 0x02, 0x90, 0x17, 0xf8,
0x34, 0x00, 0x03, 0x10, 0x36, 0x00, 0x00, 0xe2, 0x38, 0x00, 0x01, 0x31,
0x3a, 0x00, 0xe0, 0x05, 0x64, 0x00, 0x40, 0x2e, 0x1a, 0x01, 0x12, 0x36,
0x42, 0x02, 0xff, 0x05, 0x44, 0x02, 0xf7, 0x63, 0x16, 0x03, 0x53, 0x76,
0x14, 0x03, 0x00, 0x00, 0x74, 0x03, 0x86, 0x06, 0x72, 0x03, 0xd1, 0x04,
0x70, 0x03, 0x57, 0x04, 0x6e, 0x03, 0x1e, 0x04, 0x6c, 0x03, 0x2c, 0x04,
0x6a, 0x03, 0x3f, 0x00, 0x68, 0x03, 0x3f, 0x00, 0x66, 0x03, 0x3f, 0x00,
0x16, 0x00, 0xbe, 0xa6, 0x40, 0x03, 0x8a, 0x03, 0x3a, 0x02, 0xa6, 0x00,
0x3c, 0x02, 0x7e, 0xc0, 0x60, 0x02, 0x36, 0x21, 0x62, 0x02, 0xce, 0x17,
0x08, 0x03, 0x29, 0x29, 0x42, 0x03, 0x01, 0x09, 0x48, 0x03, 0x29, 0x25,
0x56, 0x03, 0x0d, 0x33, 0x5a, 0x03, 0x45, 0x00, 0x1a, 0x06, 0x8b, 0xd3,
0x30, 0x06, 0x26, 0x67, 0x34, 0x06, 0x7f, 0xc8, 0x42, 0x06, 0x4d, 0x43,
0x44, 0x06, 0x8d, 0x46, 0x34, 0x01, 0x00, 0x00, 0x38, 0x01, 0x00, 0x00,
0x60, 0x01, 0x4a, 0x26, 0x64, 0x01, 0x44, 0x3b, 0x66, 0x01, 0xd2, 0x76,
0x08, 0x00, 0xb0, 0x00, 0x66, 0x00, 0x59, 0x40, 0x0a, 0x06, 0xdb, 0x50,
0x0c, 0x06, 0xf2, 0x7b, 0x10, 0x06, 0x8c, 0x55, 0x12, 0x06, 0x0a, 0x28,
0x14, 0x06, 0x27, 0x01, 0x00, 0xf0, 0x00, 0x40, 0x7a, 0x51, 0x00, 0x44,
0x01, 0x00, 0x00, 0x00, 0x02, 0x02, 0x6a, 0x7c, 0x31, 0x61, 0x00, 0x00,
0x24, 0x51, 0xa8, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0f, 0x01, 0x00,
0x51, 0x04, 0xfd, 0x77
};
unsigned int rtlbt_fw_len = sizeof(rtlbt_fw);
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/hci/bt_normal_patch.c
|
C
|
apache-2.0
| 68,615
|
/**
* Copyright (c) 2017, Realsil Semiconductor Corporation. All rights reserved.
*
*/
#include <stdio.h>
#include <string.h>
//#include "os_sched.h"
//#include "os_pool.h"
//#include "os_sync.h"
//#include "os_mem.h"
#include "osif_customer.h"
#include <mem_types.h>
//#include "hci_tp.h"
#include "hci_uart.h"
#include "bt_types.h"
//#include "trace_app.h"
#include "hci_dbg.h"
#include "bt_board.h"
#include "hci_board.h"
#include "hci_process.h"
#include "build_info.h"
//#include "bt_intf.h"
#include "wifi_conf.h" //for wifi_disable_powersave and wifi_resume_powersave
#define hci_board_32reg_set(addr, val) HAL_WRITE32(addr, 0, val)
#define hci_board_32reg_read(addr) HAL_READ32(addr, 0)
#define BT_EFUSE_TABLE_LEN 0x20
#define BT_CONFIG_SIGNATURE 0x8723ab55
#define BT_CONFIG_HEADER_LEN 6
typedef struct {
u32 IQK_xx;
u32 IQK_yy;
u32 IDAC;
u32 QDAC;
}BT_Cali_TypeDef;
BT_Cali_TypeDef g_iqk_data;
const BAUDRATE_MAP baudrates[] =
{
{0x0000701d, 115200},
{0x0252C00A, 230400},
{0x03F75004, 921600},
{0x05F75004, 921600},
{0x00005004, 1000000},
{0x04928002, 1500000},
{0x00005002, 2000000},
{0x0000B001, 2500000},
{0x04928001, 3000000},
{0x052A6001, 3500000},
{0x00005001, 4000000},
};
unsigned int baudrates_length = sizeof(baudrates) / sizeof(BAUDRATE_MAP);
static uint32_t hci_tp_baudrate;
uint8_t hci_tp_lgc_efuse[BT_EFUSE_TABLE_LEN];
uint8_t hci_tp_phy_efuse[19];
extern const unsigned char *rltk_bt_get_patch_code(void);
extern void rltk_coex_bt_enable(u8 enable);
static uint32_t cal_bit_shift(uint32_t Mask)
{
uint32_t i;
for(i=0; i<31;i++)
{
if(((Mask>>i) & 0x1)==1)
break;
}
return (i);
}
static void set_reg_value(uint32_t reg_address, uint32_t Mask , uint32_t val)
{
uint32_t shift = 0;
uint32_t data = 0;
data = hci_board_32reg_read(reg_address);
shift = cal_bit_shift(Mask);
data = ((data & (~Mask)) | (val << shift));
hci_board_32reg_set(reg_address, data);
data = hci_board_32reg_read(reg_address);
}
bool hci_rtk_parse_config(uint8_t *config_buf, uint16_t config_len, uint8_t *efuse_buf)
{
uint32_t signature;
uint16_t payload_len;
uint16_t entry_offset;
uint16_t entry_len;
uint8_t *p_entry;
uint8_t *p;
uint8_t *p_len;
uint8_t i;
uint16_t tx_flatk;
//enter the config_len
p = config_buf;
p_len = config_buf + 4;
extern uint32_t bt_flatk_8721d(uint16_t txgain_flatk);
LE_STREAM_TO_UINT32(signature, p);
LE_STREAM_TO_UINT16(payload_len, p);
if (signature != BT_CONFIG_SIGNATURE)
{
HCI_PRINT_ERROR("hci_rtk_parse_config: invalid signature 0x%08x", signature);
return false;
}
if (payload_len != config_len - BT_CONFIG_HEADER_LEN)
{
HCI_PRINT_WARN("hci_rtk_parse_config: invalid len, stated %u, calculated %u",
payload_len, config_len - BT_CONFIG_HEADER_LEN);
LE_UINT16_TO_STREAM(p_len, config_len - BT_CONFIG_HEADER_LEN); //just avoid the length is not coreect
/* FIX the len */
// return false;
}
#define BT_EFUSE_BLOCK1_OFFSET 0x06
#define BT_EFUSE_BLOCK2_OFFSET 0x0c
#define BT_EFUSE_BLOCK3_OFFSET 0x12
p_entry = config_buf + BT_CONFIG_HEADER_LEN;
while (p_entry < config_buf + config_len)
{
p = p_entry;
LE_STREAM_TO_UINT16(entry_offset, p);
LE_STREAM_TO_UINT8(entry_len, p);
p_entry = p + entry_len;
switch (entry_offset)
{
case 0x000c:
if ((rltk_wlan_is_mp())||(!CHECK_SW(EFUSE_SW_UPPERSTACK_SWITCH)))
{
//default use the 115200
hci_board_debug("set hci baudrate 115200\n");
memcpy(p,&(baudrates[0].bt_baudrate),4);
}
LE_STREAM_TO_UINT32(hci_tp_baudrate, p);
#if 0
if (entry_len >= 12)
{
p_hci_rtk->hw_flow_cntrl |= 0x80; /* bit7 set hw flow control */
p += 8;
if (*p & 0x04) /* offset 0x18, bit2 */
{
p_hci_rtk->hw_flow_cntrl |= 1; /* bit0 enable hw flow control */
}
}
HCI_PRINT_TRACE("hci_rtk_parse_config: baudrate 0x%08x, hw flow control 0x%02x",
p_hci_rtk->baudrate,p_hci_rtk->hw_flow_cntrl);
//hci_board_debug("hci_rtk_parse_config: baudrate 0x%08x\n", p_hci_rtk->baudrate);
#endif
break;
case 0x0018:
if ((rltk_wlan_is_mp())||(!CHECK_SW(EFUSE_SW_UPPERSTACK_SWITCH)))
{
//hci_board_debug("hci uart flow ctrl: 0x%02x\n", p[0]);
p[0] =p[0] & (~ BIT2) ;
hci_board_debug("close hci uart flow ctrl: 0x%02x\n", p[0]);
//close the flow control
}
break;
case 0x0030:
if (entry_len == 6)
{
if ((efuse_buf[0] != 0xff) && (efuse_buf[1] != 0xff))
{
//memcpy(p,&efuse_buf[0],6);
/*
hci_board_debug("\r\nBT ADDRESS:\r\n");
for(int i = 0 ;i <6;i ++)
{
p[i] = efuse_buf[5-i];
hci_board_debug("%02x:",efuse_buf[i]);
}
hci_board_debug("\r\n");*/
for(int i = 0 ;i <6;i ++)
{
p[i] = efuse_buf[5-i];
}
hci_board_debug("\nBT ADDRESS: %02x:%02x:%02x:%02x:%02x:%02x\r\n",
efuse_buf[0], efuse_buf[1], efuse_buf[2],
efuse_buf[3], efuse_buf[4], efuse_buf[5]);
}
else
{
hci_board_debug("hci_rtk_parse_config: BT ADDRESS %02x %02x %02x %02x %02x %02x, use the defaut config\n",
p[0], p[1], p[2], p[3], p[4], p[5]);
}
}
break;
case 0x194:
if(efuse_buf[LEFUSE(0x196)]== 0xff)
{
if(!(hci_tp_phy_efuse[2]& BIT0))
{
//0
tx_flatk=hci_tp_phy_efuse[0xa] | hci_tp_phy_efuse[0xb]<<8;
bt_flatk_8721d(tx_flatk);
hci_board_debug("\r\n WRITE physical FLATK=tx_flatk=%x \r\n", tx_flatk);
}
break;
}
else
{
p[0]= efuse_buf[LEFUSE(0x196)];
if(efuse_buf[LEFUSE(0x196)] & BIT1)
{
p[1]= efuse_buf[LEFUSE(0x197)];
}
if(efuse_buf[LEFUSE(0x196)] & BIT2)
{
p[2]= efuse_buf[LEFUSE(0x198)];
p[3]= efuse_buf[LEFUSE(0x199)];
tx_flatk=efuse_buf[LEFUSE(0x198)] | efuse_buf[LEFUSE(0x199)]<<8;
bt_flatk_8721d(tx_flatk);
hci_board_debug("\r\n WRITE logic FLATK=tx_flatk=%x \r\n", tx_flatk);
}
else
{
if(!(hci_tp_phy_efuse[2]& BIT0))
{
//0
tx_flatk=hci_tp_phy_efuse[0xa] | hci_tp_phy_efuse[0xb]<<8;
bt_flatk_8721d(tx_flatk);
hci_board_debug("\r\n WRITE physical FLATK=tx_flatk=%x \r\n", tx_flatk);
}
}
if(efuse_buf[LEFUSE(0x196)] & BIT5)
{
p[4]= efuse_buf[LEFUSE(0x19a)];
p[5]= efuse_buf[LEFUSE(0x19b)];
}
}
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
for(i = 0;i < entry_len;i ++)
{
hci_board_debug("\r\n logic efuseMap[%x] = %x\r\n",0x196+i, p[i]);
}
}
break;
case 0x19f:
for(i = 0;i <entry_len;i ++)
{
if(efuse_buf[LEFUSE(0x19c+i)] != 0xff)
{
p[i]= efuse_buf[LEFUSE(0x19c+i)];
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
hci_board_debug("\r\n logic efuseMap[%x] = %x\r\n",0x19c+i, p[i]);
}
}
}
break;
case 0x1A4:
for(i = 0;i < entry_len;i ++)
{
if(efuse_buf[LEFUSE(0x1a2+i)] != 0xff)
{
p[i]= efuse_buf[LEFUSE(0x1A2+i)];
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
hci_board_debug("\r\n logic efuseMap[%x] = %x\r\n",0x1A2+i, p[i]);
}
}
}
break;
default:
HCI_PRINT_TRACE("hci_rtk_parse_config: entry offset 0x%04x, len 0x%02x",
entry_offset, entry_len);
break;
}
}
return true;
}
int hci_flash_stream_read(uint8_t *address, uint32_t len, uint8_t * data)
{
memcpy(data, (const void *)address, len);
return 1;
}
uint8_t *hci_find_patch_address(void)
{
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
hci_board_debug("\nWe use DEBUG VAL:0x%x\n", HAL_READ32(0x08000000, 0x3028));
}
if(CHECK_SW(EFUSE_SW_USE_FLASH_PATCH))
{
//1
return (uint8_t *)rltk_bt_get_patch_code();
}
else if (ota_get_cur_index() == OTA_INDEX_1)
{
hci_board_debug("\nWe use BT ROM OTA2 PATCH ADDRESS:0x%x\n", MERGE_PATCH_ADDRESS_OTA2);
HCI_PRINT_INFO("\nWe use BT ROM OTA2 PATCH ADDRESS:0x%x\n", MERGE_PATCH_ADDRESS_OTA2);
return (uint8_t *)MERGE_PATCH_ADDRESS_OTA2;
}
else
{
hci_board_debug("\nWe use BT ROM OTA1 PATCH ADDRESS:0x%x\n", MERGE_PATCH_ADDRESS_OTA1);
HCI_PRINT_INFO("\nWe use BT ROM OTA1 PATCH ADDRESS:0x%x\n", MERGE_PATCH_ADDRESS_OTA1);
return (uint8_t *)MERGE_PATCH_ADDRESS_OTA1;
}
}
/** @brief configuration */
unsigned char rtlbt_init_config[] =
{
0x55, 0xab, 0x23, 0x87,
0x19, 0x00,
//0x10, 0x00,
0x30, 0x00, 0x06, 0x11, 0x28, 0x36, 0x12, 0x51, 0x89, /* BT MAC address */
// 0x07, 0x00,
0x0c, 0x00, 0x04, 0x04, 0x50, 0xF7, 0x03, /* Baudrate 921600 */
0x18, 0x00, 0x01,0x5c, /* flow control */
//efuse value
0x94, 0x01, 0x06, 0x08, 0x00, 0x00, 0x00,0x27, 0x07,
0x9f, 0x01, 0x05, 0x23, 0x23 , 0x23, 0x23,0x59,
0xA4, 0x01, 0x04, 0xFE, 0xFE , 0xFE, 0xFE
};
extern unsigned char rtlbt_config[];
extern unsigned int rtlbt_config_len;
uint8_t *hci_rtk_combine_config(void)
{
#define HCI_CONFIG_HEAD 6
uint16_t config_length = rtlbt_config_len + sizeof(rtlbt_init_config) - HCI_CONFIG_HEAD;
uint8_t *full_config_buf = os_mem_zalloc(RAM_TYPE_DATA_ON, config_length);
uint8_t *p_len = full_config_buf+4;
memcpy(full_config_buf,rtlbt_init_config, sizeof(rtlbt_init_config));
memcpy(full_config_buf+sizeof(rtlbt_init_config),rtlbt_config+HCI_CONFIG_HEAD, rtlbt_config_len-HCI_CONFIG_HEAD);
HCI_PRINT_WARN("hci_rtk_combine_config: invalid len, calculated %u", config_length);
LE_UINT16_TO_STREAM(p_len, config_length); //just avoid the length is not coreect
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
hci_board_debug("hci_rtk_combine_config: all config length is %x\r\n",config_length);
for(uint8_t i=0;i< config_length;i++)
{
hci_board_debug("\n:%02x", full_config_buf[i]);
}
}
return full_config_buf;
}
uint16_t fix_config_len(void)
{
return (rtlbt_config_len + sizeof(rtlbt_init_config) - HCI_CONFIG_HEAD);
}
bool hci_rtk_find_patch(uint8_t bt_hci_chip_id)
{
extern unsigned int rtlbt_fw_len;
extern unsigned char rtlbt_config[];
extern unsigned int rtlbt_config_len;
const uint8_t no_patch_sing[4]= {0xFF, 0xFF, 0xFF, 0xFF};
uint8_t tmp_patch_head[8];
uint8_t *fw_buf;
uint8_t *config_buf;
uint16_t fw_len;
uint32_t fw_offset;
uint16_t config_len;
uint32_t lmp_subversion;;
uint16_t mp_num_of_patch=0;
uint16_t fw_chip_id = 0;
uint8_t i;
uint8_t *p_merge_addr = hci_find_patch_address();
hci_flash_stream_read(p_merge_addr ,8, tmp_patch_head);
hci_flash_stream_read(p_merge_addr+8 ,4, (uint8_t *)&lmp_subversion);
//LE_ARRAY_TO_UINT32(lmp_subversion, (p_merge_addr+8));
//if single patch or merged patch
if(!memcmp(tmp_patch_head, "Realtech", sizeof("Realtech")-1))
{
hci_flash_stream_read(p_merge_addr+0x0c ,2, (uint8_t *)&mp_num_of_patch);
//LE_ARRAY_TO_UINT16(mp_num_of_patch, p_merge_addr+0x0c);
if(mp_num_of_patch == 1)
{
hci_flash_stream_read(p_merge_addr+0x0e +2*mp_num_of_patch ,2, (uint8_t *)&fw_len);
//LE_ARRAY_TO_UINT16(fw_len, p_merge_addr+0x0e +2*mp_num_of_patch );
hci_flash_stream_read(p_merge_addr+0x0e +4*mp_num_of_patch ,4, (uint8_t *)&fw_offset);
//LE_ARRAY_TO_UINT32(fw_offset, p_merge_addr+0x0e +4*mp_num_of_patch);
if (rltk_wlan_is_mp())
{
hci_board_debug("\n fw_chip_id patch =%x,mp_num_of_patch=%x \n", fw_chip_id,mp_num_of_patch);
hci_board_debug("\n lmp_subversion=%x , fw_len =%x, fw_offset = %x \n", lmp_subversion, fw_len, fw_offset);
}
}
else
{
for(i = 0 ;i<mp_num_of_patch; i++)
{
hci_flash_stream_read(p_merge_addr+0x0e + 2*i ,2, (uint8_t *)&fw_chip_id);
// LE_ARRAY_TO_UINT16(fw_chip_id, p_merge_addr+0x0e + 2*i);
if(fw_chip_id == bt_hci_chip_id)
{
hci_flash_stream_read(p_merge_addr+0x0e +2*mp_num_of_patch + 2*i ,2, (uint8_t *)&fw_len);
//LE_ARRAY_TO_UINT16(fw_len, p_merge_addr+0x0e +2*mp_num_of_patch + 2*i);
hci_flash_stream_read(p_merge_addr+0x0e +4*mp_num_of_patch + 4*i ,4, (uint8_t *)&fw_offset);
//LE_ARRAY_TO_UINT32(fw_offset, p_merge_addr+0x0e +4*mp_num_of_patch + 4*i);
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
//0
hci_board_debug("\n fw_chip_id patch =%x,mp_num_of_patch=%x \n", fw_chip_id,mp_num_of_patch);
hci_board_debug("\n lmp_subversion=%x , fw_len =%x, fw_offset = %x \n", lmp_subversion, fw_len, fw_offset);
}
break;
}
}
if(i >= mp_num_of_patch)
{
hci_board_debug("\n ERROR:no match patch\n");
return false;
}
}
fw_buf = os_mem_zalloc(RAM_TYPE_DATA_ON, fw_len);
if(fw_buf == NULL)
{
hci_board_debug("\n fw_buf ,malloc %d byte fail, \n", fw_len);
return false;
}
else
{
memcpy(fw_buf,p_merge_addr+fw_offset, fw_len);
LE_UINT32_TO_ARRAY(fw_buf+fw_len-4,lmp_subversion);
}
}
else if(!memcmp(tmp_patch_head, no_patch_sing, sizeof(no_patch_sing)))
{
hci_board_debug("\nWrong patch head %x %x %x %x\n",p_merge_addr[0], p_merge_addr[1], p_merge_addr[2], p_merge_addr[3]);
return false;
}
else
{
hci_board_debug("\nwe use single patch\n");
if(p_merge_addr != (uint8_t *)rltk_bt_get_patch_code())
{
hci_board_debug("\nnot support single patch on rom\n");
return false;
}
fw_len = rtlbt_fw_len ;
fw_buf = os_mem_zalloc(RAM_TYPE_DATA_ON, fw_len);
memcpy(fw_buf,(const void *)rltk_bt_get_patch_code(), fw_len);
}
config_buf = rtlbt_init_config;
config_len = sizeof(rtlbt_init_config);
//config_len = 0;
if (config_len != 0)
{
if (hci_rtk_parse_config(config_buf, config_len, hci_tp_lgc_efuse) == false)
{
return false;
}
else
{
config_buf = hci_rtk_combine_config();
config_len = fix_config_len();
}
}
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
hci_board_debug("\nWe use lmp_subversion=%x fw_buf=%x, fw_len = %x, config_buf = %x,config_len= %x, baudrate 0x%x\n", lmp_subversion,fw_buf, fw_len, config_buf, config_len, hci_tp_baudrate);
}
hci_set_patch(fw_buf, fw_len, config_buf, config_len, hci_tp_baudrate);
return true;
}
void bt_read_efuse(void)
{
u32 Idx = 0;
u32 ret = 0;
uint8_t *p_buf;
//read logic efuse
p_buf = os_mem_zalloc(RAM_TYPE_DATA_ON, 1024);
ret = EFUSE_LMAP_READ(p_buf);
if (ret == _FAIL)
{
hci_board_debug("EFUSE_LMAP_READ fail \n");
}
memcpy(hci_tp_lgc_efuse, p_buf+0x190,BT_EFUSE_TABLE_LEN);
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
//0
hci_board_debug("\r\n==logic_efuse:==\r\n ");
for (Idx = 0; Idx < BT_EFUSE_TABLE_LEN; Idx++)
{
hci_board_debug("\n%x:", hci_tp_lgc_efuse[Idx]);
}
}
//read physical efuse
for (Idx = 0; Idx < 16; Idx++)
{
EFUSE_PMAP_READ8(0, 0x120 + Idx, hci_tp_phy_efuse + Idx, L25EOUTVOLTAGE);
if ((Idx == 7) && (hci_tp_phy_efuse[Idx] == 0))
{
hci_tp_phy_efuse[Idx] = 0x13;
}
}
EFUSE_PMAP_READ8(0, 0x1FD, hci_tp_phy_efuse + 16, L25EOUTVOLTAGE);
EFUSE_PMAP_READ8(0, 0x1FE, hci_tp_phy_efuse + 17, L25EOUTVOLTAGE);
EFUSE_PMAP_READ8(0, 0x1FF, hci_tp_phy_efuse + 18, L25EOUTVOLTAGE);
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
//0
hci_board_debug("\r\n==bt phy_efuse 0x120~0x12F:==\r\n ");
for (Idx = 0; Idx < 16; Idx++)
{
hci_board_debug("\n%x:", hci_tp_phy_efuse[Idx]);
}
hci_board_debug("\r\n==bt phy_efuse 0x1FD~0x1FF:==\r\n ");
for (Idx = 16; Idx < 19; Idx++)
{
hci_board_debug("\n%x:", hci_tp_phy_efuse[Idx]);
}
}
os_mem_free(p_buf);
}
void bt_power_on(void)
{
set_reg_value(0x40000000,BIT0 | BIT1, 3);
}
void bt_power_off(void)
{
set_reg_value(0x40000000,BIT0 | BIT1, 0);
rltk_coex_bt_enable(0);
if(!rltk_wlan_is_mp()){
//wifi_resume_powersave();
}
}
void bt_change_gnt_bt_only(void)
{
set_reg_value(0x40080764, BIT9 | BIT10,3 );
}
void bt_change_gnt_wifi_only(void)
{
set_reg_value(0x40080764, BIT9 | BIT10,1);
}
void bt_reset(void)
{
if(!rltk_wlan_is_mp()) {
wifi_disable_powersave();
}
if(!CHECK_SW(EFUSE_SW_BT_FW_LOG))
{
//0
//open bt log pa16
hci_board_debug("BT FW LOG OPEN\n");
//close please change efuse:EFUSE wmap 1a1 1 fe
set_reg_value(0x48000440,BIT0 |BIT1 | BIT2 | BIT3 | BIT4, 17);
}
hci_board_debug("BT Reset...\n");
//bt power
bt_power_on();
os_delay(5);
//isolation
set_reg_value(0x40000000,BIT16, 0);
os_delay(5);
//BT function enable
set_reg_value(0x40000204,BIT24, 0);
os_delay(5);
set_reg_value(0x40000204,BIT24, 1);
os_delay(50);
//BT clock enable
set_reg_value(0x40000214, BIT24, 1);
os_delay(5);
}
bool hci_board_init()
{
bool ret=false;
if(!(wifi_is_up(RTW_STA_INTERFACE) || wifi_is_up(RTW_AP_INTERFACE))) {
hci_board_debug("\nWIFI is off !Please restart BT after WIFI on!\n");
return false;
}
HCI_PRINT_INFO("hci_tp_open, this cut is AmebaD %X CUT",SYSCFG_CUTVersion()+10);
if (rltk_wlan_is_mp())
{
hci_board_debug("\r\n==========this is BT MP DRIVER===========,\r\n this cut is AmebaD %X CUT\r\n",SYSCFG_CUTVersion()+10);
}
else if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
hci_board_debug("\r\n***********this is BT NORMAL DRIVER*******,\r\n this cut is AmebaD %X CUT\r\n",SYSCFG_CUTVersion()+10);
}
hci_board_debug("\r\nBT BUILD Date: %s \r\n",UTS_VERSION);
bt_read_efuse();
return true;
}
void hci_normal_start(void)
{
if(!rltk_wlan_is_mp())
{
rltk_coex_bt_enable(1);
}
}
void bt_write_phy_efuse_value(void)
{
hci_tp_phy_efuse[0] = 0;
hci_tp_phy_efuse[1] = 0x9e;
hci_tp_phy_efuse[2] = 0xfe;
hci_tp_phy_efuse[3] = g_iqk_data.IQK_xx & 0xff;
hci_tp_phy_efuse[4] = (g_iqk_data.IQK_xx >> 8) & 0xff;
hci_tp_phy_efuse[5] = g_iqk_data.IQK_yy & 0xff;
hci_tp_phy_efuse[6] = (g_iqk_data.IQK_yy >> 8) & 0xff;
//hci_tp_phy_efuse[7] = 0;//(g_iqk_data.IQK_yy >> 8) & 0xff;
hci_tp_phy_efuse[8] = 0x19;//(g_iqk_data.IQK_yy >> 8) & 0xff;
hci_tp_phy_efuse[12] = (g_iqk_data.QDAC) & 0xff;
hci_tp_phy_efuse[13] = (g_iqk_data.IDAC) & 0xff;
for(int i=0;i<0x10; i++)
{
hci_board_debug("\r\n write physical efuse 0x%x =0x%02x",0x120+i, hci_tp_phy_efuse[i]);
EFUSE_PMAP_WRITE8(0, 0x120 + i, hci_tp_phy_efuse[i], L25EOUTVOLTAGE);
}
}
#if 0
void hci_uart_out(void)
{
hci_board_debug("HCI UART OUT OK: PA2 TX, PA4 RX\r\n");
HAL_WRITE32(0x48000000, 0x5f0, 0x00000202);
//PA2 TX
HAL_WRITE32(0x48000000, 0x408, 0x00005C11);
//PA4 RX
HAL_WRITE32(0x48000000, 0x410,
0x00005C11);
bt_change_gnt_bt_only();
}
#endif
bool hci_board_complete(void)
{
// uint8_t orignal_hci_tp_phy_efuse[0x10];
/// hci_uart_out();
//return false;
if(rltk_wlan_is_mp())
{
#ifdef FT_MODE
uint8_t TestItem;
static bool write_efuse_ok=false;
hci_board_debug("\r\n=================original ========================\r\n");
for (int Idx = 0; Idx < 16; Idx++)
{
EFUSE_PMAP_READ8(0, 0x120 + Idx, orignal_hci_tp_phy_efuse + Idx, L25EOUTVOLTAGE);
hci_board_debug("\r\n original physical efuse 0x%x =0x%02x",0x120+Idx, orignal_hci_tp_phy_efuse[Idx]);
if(orignal_hci_tp_phy_efuse[Idx] != 0xff)
{
write_efuse_ok = true;
}
}
hci_board_debug("\r\n=================will write physical efuse ========================\r\n");
for(int i=0;i<0x10; i++)
{
hci_board_debug("\r\n 0x%x =0x%02x",0x120+i, hci_tp_phy_efuse[i]);
//EFUSE_PMAP_WRITE8(0, 0x120 + i, hci_tp_phy_efuse[i], L25EOUTVOLTAGE);
}
/*TODO:GNT_BT TO WIFI */
bt_change_gnt_wifi_only();
hci_board_debug("EFUSE_SW_MP_MODE: UPPERSTACK NOT UP \r\nGNT_BT %x...\n", HAL_READ32(0x40080000, 0x0764));
while ( 1 )
{
if ( GPIO_ReadDataBit( _PA_5 ) )
{
os_delay(2);
if ( GPIO_ReadDataBit( _PA_5 ) ) /* still input high */
{
GPIO_WriteBit( _PA_13, 0 );
TestItem = 0;
TestItem = GPIO_ReadDataBit( _PB_7 ); /* bit0 */
TestItem |= (GPIO_ReadDataBit( _PA_17 ) << 1); /* bit1 */
TestItem |= (GPIO_ReadDataBit( _PA_19 ) << 2); /* bit2 */
TestItem |= (GPIO_ReadDataBit( _PA_20 ) << 3); /* bit3 */
TestItem |= (GPIO_ReadDataBit( _PA_6 ) << 4); /* bit4 */
hci_board_debug( "TestItem is %d!!!\n", TestItem );
switch ( TestItem )
{
case 13:
if(write_efuse_ok == false)
{
bt_write_phy_efuse_value();
write_efuse_ok=true;
}
else
{
hci_board_debug("ERROR:phy_efuse has been write!!!,please check the phyfuse value\n");
/*TODO, tell the GPIO*/
}
break;
default:
break;
}
hci_board_debug( "trx done\n" );
GPIO_WriteBit( _PA_13, 1);
}
}
os_delay(15);
}
#endif
return false;
}
if(!CHECK_SW(EFUSE_SW_UPPERSTACK_SWITCH))
{
//0
hci_board_debug("Not Start upperStack, normal test\n");
return false;
}
hci_board_debug("Start upperStack\n");
return true;
}
//IQK LOK ABOUT
bool bt_iqk_efuse_valid(BT_Cali_TypeDef *bt_iqk_data)
{
if((hci_tp_phy_efuse[1] & BIT0))
{
//1
hci_board_debug("bt_iqk_efuse_valid: no data\r\n");
return false;
}
else
{
//0
bt_iqk_data->IQK_xx = hci_tp_phy_efuse[3] | hci_tp_phy_efuse[4] <<8;
bt_iqk_data->IQK_yy = hci_tp_phy_efuse[5] | hci_tp_phy_efuse[6] <<8;
bt_iqk_data->QDAC = hci_tp_phy_efuse[0x0c];
bt_iqk_data->IDAC = hci_tp_phy_efuse[0x0d];
hci_board_debug("physical efuse: has data hci_tp_phy_efuse[1]= %x \r\n", hci_tp_phy_efuse[1]);
return true;
}
}
bool bt_iqk_logic_efuse_valid(BT_Cali_TypeDef *bt_iqk_data)
{
if(((hci_tp_lgc_efuse[0x16] == 0xff) && (hci_tp_lgc_efuse[0x17] == 0xff))||
((hci_tp_lgc_efuse[0x18] == 0xff)&&(hci_tp_lgc_efuse[0x19] == 0xff))||
(hci_tp_lgc_efuse[0x1a] == 0xff) ||
(hci_tp_lgc_efuse[0x1b] == 0xff) )
{
hci_board_debug("bt_iqk_logic_efuse_valid: no data\r\n");
return false;
}
else
{
bt_iqk_data->IQK_xx = hci_tp_lgc_efuse[0x16] | hci_tp_lgc_efuse[0x17] <<8;
bt_iqk_data->IQK_yy = hci_tp_lgc_efuse[0x18] | hci_tp_lgc_efuse[0x19] <<8;
bt_iqk_data->QDAC = hci_tp_lgc_efuse[0x1a];
bt_iqk_data->IDAC = hci_tp_lgc_efuse[0x1b];
hci_board_debug("logic efuse: has data\r\n");
return true;
}
}
void bt_dump_iqk(BT_Cali_TypeDef *iqk_data)
{
hci_board_debug("bt_iqk_dump: DUMP,\r\n");
hci_board_debug("the IQK_xx data is 0x%x,\r\n", iqk_data->IQK_xx);
hci_board_debug("the IQK_yy data is 0x%x,\r\n", iqk_data->IQK_yy);
hci_board_debug("the QDAC data is 0x%x,\r\n", iqk_data->QDAC);
hci_board_debug("the IDAC data is 0x%x,\r\n", iqk_data->IDAC);
}
extern uint32_t bt_iqk_8721d(BT_Cali_TypeDef *cal_data,BOOLEAN store);
extern uint32_t bt_lok_write(uint32_t lok_xx, uint32_t lok_yy);
extern uint32_t bt_dck_write(uint32_t q_dck, uint32_t i_dck);
bool bt_check_iqk(void)
{
BT_Cali_TypeDef bt_iqk_data;
if(!(hci_tp_lgc_efuse[LEFUSE(0x1A1)] & BIT0))
//if(!CHECK_SW(EFUSE_SW_USE_LOGIC_EFUSE))
{
//0
hci_board_debug("\r\n%s: USE FIX LOGIC EFUSE\r\n",__FUNCTION__);
if (bt_iqk_logic_efuse_valid(&bt_iqk_data))
{
bt_dump_iqk(&bt_iqk_data);
bt_lok_write(bt_iqk_data.IDAC, bt_iqk_data.QDAC);
hci_tp_phy_efuse[0] = 0;
hci_tp_phy_efuse[1] =hci_tp_phy_efuse[1] & (~BIT0);
//hci_tp_phy_efuse[1] = 0xfe;
//hci_tp_phy_efuse[2] = 0xff;
hci_tp_phy_efuse[3] = bt_iqk_data.IQK_xx & 0xff;
hci_tp_phy_efuse[4] = (bt_iqk_data.IQK_xx >> 8) & 0xff;
hci_tp_phy_efuse[5] = bt_iqk_data.IQK_yy & 0xff;
hci_tp_phy_efuse[6] = (bt_iqk_data.IQK_yy >> 8) & 0xff;
return true;
}
hci_board_debug("\r\n%s: LOGIC EFUSE HAS NO DATA\r\n",__FUNCTION__);
return false;
}
if (bt_iqk_efuse_valid(&bt_iqk_data))
{
if(hci_tp_phy_efuse[0]!=0)
{
bt_dck_write(hci_tp_phy_efuse[0x0e], hci_tp_phy_efuse[0x0f]);
}
else
{
hci_board_debug("\r\nhci_tp_phy_efuse[0]=0,\r\n");
}
bt_dump_iqk(&bt_iqk_data);
bt_lok_write(bt_iqk_data.IDAC, bt_iqk_data.QDAC);
return true;
}
if (bt_iqk_logic_efuse_valid(&bt_iqk_data))
{
bt_dump_iqk(&bt_iqk_data);
bt_lok_write(bt_iqk_data.IDAC, bt_iqk_data.QDAC);
hci_tp_phy_efuse[0] = 0;
hci_tp_phy_efuse[1] =hci_tp_phy_efuse[1] & (~BIT0);
//hci_tp_phy_efuse[1] = 0xfe;
//hci_tp_phy_efuse[2] = 0xff;
hci_tp_phy_efuse[3] = bt_iqk_data.IQK_xx & 0xff;
hci_tp_phy_efuse[4] = (bt_iqk_data.IQK_xx >> 8) & 0xff;
hci_tp_phy_efuse[5] = bt_iqk_data.IQK_yy & 0xff;
hci_tp_phy_efuse[6] = (bt_iqk_data.IQK_yy >> 8) & 0xff;
return true;
}
else
{
hci_board_debug("bt_check_iqk: NO IQK LOK DATA need start LOK,\r\n");
//bt_change_gnt_wifi_only();
//bt_adda_dck_8721d();
reset_iqk_type();
return false;
}
//return true;
}
bool hci_start_iqk(void)
{
u32 ret = 0;
//bt_change_gnt_wifi_only();
if(rltk_wlan_is_mp()) //JUST FOR DEBUG
{
hci_board_debug("BT \\GNT_BT %x LOG...\n", HAL_READ32(0x40080000, 0x0764));
// os_sched_suspend();
//uint32_t flag = os_lock();
ret = bt_iqk_8721d(&g_iqk_data, 0);
//os_sched_resume();
// os_unlock(flag);
bt_dump_iqk(&g_iqk_data);
hci_board_debug("\r\n Please write logic efuse 0x1A6 =0x%02x", g_iqk_data.IQK_xx & 0xff);
hci_board_debug("\r\n Please write logic efuse 0x1A7 =0x%02x", (g_iqk_data.IQK_xx >> 8) & 0xff);
hci_board_debug("\r\n Please write logic efuse 0x1A8 =0x%02x", g_iqk_data.IQK_yy & 0xff);
hci_board_debug("\r\n Please write logic efuse 0x1A9 =0x%02x", (g_iqk_data.IQK_yy >> 8) & 0xff);
hci_board_debug("\r\n Please write logic efuse 0x1AA =0x%02x", g_iqk_data.QDAC);
hci_board_debug("\r\n Please write logic efuse 0x1AB =0x%02x\r\n", g_iqk_data.IDAC);
}
else
{
ret = bt_iqk_8721d(&g_iqk_data, 0);
bt_dump_iqk(&g_iqk_data);
}
if(_FAIL == ret)
{
hci_board_debug("bt_check_iqk:Warning: IQK Fail, please connect driver !!!!!!!!!\r\n");
return false;
}
bt_lok_write(g_iqk_data.IDAC, g_iqk_data.QDAC);
hci_tp_phy_efuse[0] = 0;
hci_tp_phy_efuse[1] =hci_tp_phy_efuse[1] & (~BIT0);
//hci_tp_phy_efuse[1] = 0xfe;
//hci_tp_phy_efuse[2] = 0xff;
hci_tp_phy_efuse[3] = g_iqk_data.IQK_xx & 0xff;
hci_tp_phy_efuse[4] = (g_iqk_data.IQK_xx >> 8) & 0xff;
hci_tp_phy_efuse[5] = g_iqk_data.IQK_yy & 0xff;
hci_tp_phy_efuse[6] = (g_iqk_data.IQK_yy >> 8) & 0xff;
//bt_write_lgc_efuse_value();
return true;
}
void bt_write_lgc_efuse_value(void)
{
hci_tp_lgc_efuse[0x16] = g_iqk_data.IQK_xx & 0xff;
hci_tp_lgc_efuse[0x17] = (g_iqk_data.IQK_xx >> 8) & 0xff;
hci_tp_lgc_efuse[0x18] = g_iqk_data.IQK_yy & 0xff;
hci_tp_lgc_efuse[0x19] = (g_iqk_data.IQK_yy >> 8) & 0xff;
hci_tp_lgc_efuse[0x1a] = g_iqk_data.QDAC;
hci_tp_lgc_efuse[0x1b] = g_iqk_data.IDAC;
hci_board_debug("\r\n write logic efuse 0x1A6 =0x%02x", hci_tp_lgc_efuse[0x16]);
hci_board_debug("\r\n write logic efuse 0x1A7 =0x%02x", hci_tp_lgc_efuse[0x17]);
hci_board_debug("\r\n write logic efuse 0x1A8 =0x%02x", hci_tp_lgc_efuse[0x18]);
hci_board_debug("\r\n write logic efuse 0x1A9 =0x%02x", hci_tp_lgc_efuse[0x19]);
hci_board_debug("\r\n write logic efuse 0x1Aa =0x%02x", hci_tp_lgc_efuse[0x1a]);
hci_board_debug("\r\n write logic efuse 0x1Ab =0x%02x", hci_tp_lgc_efuse[0x1b]);
//EFUSE_LMAP_WRITE(0x1A4,8,(uint8_t *)&hci_tp_lgc_efuse[0x14]);
}
void bt_show_efuse_value(void)
{
int i = 0;
for(i=0;i<0x10;i++)
{
hci_board_debug("\r\n write physical efuse 0x%x =0x%02x",0x120+i, hci_tp_phy_efuse[i]);
}
}
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/hci/hci_board.c
|
C
|
apache-2.0
| 32,784
|
/**
* Copyright (c) 2015, Realsil Semiconductor Corporation. All rights reserved.
*/
#include <string.h>
//#include "os_task.h"
//#include "os_mem.h"
//#include "os_msg.h"
//#include "os_sched.h"
//#include "trace.h"
//#include "bte_api.h"
#include "hci_dbg.h"
#include "hci_if.h"
#include "hci_tp.h"
//#include "bt_defs.h"
#include "bt_types.h"
#include "hci_code.h"
#include "hci_proto.h"
#include "osif_customer.h"
/***** Just for compile, need fix *****/
#define HCI_ACL_HDR_LEN 5 /* packet type (1), handle (2), length (2) */
#define HCI_EVT_HDR_LEN 3 /* packet type (1), event type (1), length (1) */
#define HCI_RX_ACL_BUF_OFFSET 0
#define br_rx_frag_pool 0
#define le_rx_frag_pool 0
#define bt_sys_pool 0
/***** Just for compile, need fix *****/
typedef struct
{
uint8_t hdr_buf[HCI_ACL_HDR_LEN];
uint8_t hdr_offset;
uint8_t hdr_len;
uint16_t payload_len;
uint8_t *rx_buf;
uint16_t rx_len;
uint16_t rx_offset;
} T_HCI_H4;
T_HCI_H4 hci_h4;
void hci_h4_recv(void);
bool hci_h4_tp_open_cb(bool status)
{
uint8_t msg;
if (status == true)
{
msg = HCI_IF_MSG_READY;
}
else
{
msg = HCI_IF_MSG_FAIL;
}
return os_msg_send(hci_if.msg_q, &msg, 0);
}
bool hci_h4_tp_tx_cb(void)
{
uint8_t msg = HCI_IF_MSG_TX_RSP;
return os_msg_send(hci_if.msg_q, &msg, 0);
}
bool hci_h4_tp_rx_ind(void)
{
uint8_t msg = HCI_IF_MSG_RX_IND;
return os_msg_send(hci_if.msg_q, &msg, 0);
}
uint8_t *hci_h4_alloc_buf(void)
{
uint16_t len;
uint16_t offset;
uint8_t pool_id;
switch (hci_h4.hdr_buf[0])
{
case HCI_ACL_PKT:
offset = HCI_RX_ACL_BUF_OFFSET;
#if F_BT_BREDR_SUPPORT
pool_id = br_rx_frag_pool;
#else
pool_id = le_rx_frag_pool;
#endif
break;
case HCI_EVT_PKT:
offset = 0;
pool_id = bt_sys_pool;
break;
default:
return NULL;
}
len = offset + hci_h4.hdr_len + hci_h4.payload_len;
hci_h4.rx_buf = os_mem_zalloc(0, len);//bte_buffer_get(pool_id, len);
if (hci_h4.rx_buf != NULL)
{
memcpy(hci_h4.rx_buf + offset, hci_h4.hdr_buf, hci_h4.hdr_len);
hci_h4.rx_offset = offset + hci_h4.hdr_len;
hci_h4.rx_len = len;
/* put pkt type at the first byte for ACL data */
hci_h4.rx_buf[0] = hci_h4.hdr_buf[0];
}
return hci_h4.rx_buf;
}
void hci_h4_open(void)
{
memset(&hci_h4, 0, sizeof(T_HCI_H4));
hci_tp_open(hci_h4_tp_open_cb, hci_h4_tp_rx_ind);
}
void hci_h4_close(void)
{
#if F_BT_CONTROLLER_POWER_CONTROL
if (hci_h4.rx_buf != NULL)
{
os_mem_free(hci_h4.rx_buf);//bte_buffer_put(hci_h4.rx_buf);
hci_h4.rx_buf = NULL;
HCI_PRINT_ERROR0("hci_h4_close: rx_buf != NULL");
}
#endif
hci_tp_close();
}
bool hci_h4_send(uint8_t *p_buf, uint16_t len)
{
return hci_tp_send(p_buf, len, hci_h4_tp_tx_cb);
}
void hci_h4_recv(void)
{
uint16_t rx_len;
while (hci_h4.hdr_offset == 0 || hci_h4.hdr_offset < hci_h4.hdr_len)
{
rx_len = hci_tp_recv(&hci_h4.hdr_buf[hci_h4.hdr_offset], 1);
/* No available rx data for HCI header */
if (rx_len == 0)
{
return;
}
hci_h4.hdr_offset++;
if (hci_h4.hdr_offset == 1)
{
switch (hci_h4.hdr_buf[0])
{
case HCI_ACL_PKT:
hci_h4.hdr_len = HCI_ACL_HDR_LEN;
break;
case HCI_EVT_PKT:
hci_h4.hdr_len = HCI_EVT_HDR_LEN;
break;
default:
HCI_PRINT_ERROR("hci_h4_recv: invalid pkt type %u", hci_h4.hdr_buf[0]);
hci_h4.hdr_offset = 0;
hci_h4.payload_len = 0;
hci_if.callback(HCI_IF_EVT_ERROR, false, NULL, 0);
break;
}
}
else if (hci_h4.hdr_offset == hci_h4.hdr_len)
{
switch (hci_h4.hdr_buf[0])
{
case HCI_ACL_PKT:
LE_ARRAY_TO_UINT16(hci_h4.payload_len, &hci_h4.hdr_buf[3]);
if (hci_h4.payload_len == 0)
{
hci_h4.hdr_offset = 0;
}
break;
case HCI_EVT_PKT:
hci_h4.payload_len = (uint16_t)hci_h4.hdr_buf[2];
break;
default:
break;
}
}
}
if (hci_h4.payload_len && hci_h4.rx_buf == NULL)
{
hci_h4.rx_buf = hci_h4_alloc_buf();
if (hci_h4.rx_buf == NULL)
{
return;
}
}
while (hci_h4.rx_buf && hci_h4.rx_offset < hci_h4.rx_len)
{
rx_len = hci_tp_recv(hci_h4.rx_buf + hci_h4.rx_offset,
hci_h4.rx_len - hci_h4.rx_offset);
/* No available rx data for HCI payload */
if (rx_len == 0)
{
return;
}
hci_h4.rx_offset += rx_len;
if (hci_h4.rx_offset == hci_h4.rx_len)
{
hci_h4.hdr_offset = 0;
if (hci_if.state == HCI_IF_STATE_READY)
{
hci_if.callback(HCI_IF_EVT_DATA_IND, true, hci_h4.rx_buf, hci_h4.rx_len);
os_mem_free(hci_h4.rx_buf);
hci_h4.rx_buf = NULL;
hci_h4_recv();
}
else if (hci_if.state == HCI_IF_STATE_OPEN)
{
hci_tp_config(hci_h4.rx_buf, hci_h4.rx_len);
os_mem_free(hci_h4.rx_buf);//bte_buffer_put(hci_h4.rx_buf);
hci_h4.rx_buf = NULL;
}
else if (hci_if.state == HCI_IF_STATE_IDLE)
{
os_mem_free(hci_h4.rx_buf);//bte_buffer_put(hci_h4.rx_buf);
hci_h4.rx_buf = NULL;
}
}
}
}
void hci_h4_cfm(void)
{
uint8_t *p_buf;
if (os_msg_recv(hci_if.cfm_q, &p_buf, 0) == true)
{
os_mem_free(hci_h4.rx_buf);//bte_buffer_put(p_buf);
}
hci_h4_recv();
}
const T_HCI_PROTO hci_h4_proto =
{
.open = hci_h4_open,
.close = hci_h4_close,
.send = hci_h4_send,
.recv = hci_h4_recv,
.cfm = hci_h4_cfm,
};
//#if F_BT_DEINIT
void hci_h4_pre_deinit(void)
{
hci_tp_del();
}
void hci_h4_deinit(void)
{
memset(&hci_h4, 0, sizeof(hci_h4));
}
//#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/hci/hci_h4.c
|
C
|
apache-2.0
| 6,654
|
/**
* Copyright (c) 2015, Realsil Semiconductor Corporation. All rights reserved.
*/
#include <string.h>
//#include "os_task.h"
//#include "os_mem.h"
//#include "os_msg.h"
//#include "trace.h"
//#include "bt_defs.h"
//#include "bte_api.h"
#include "hci_dbg.h"
#include "osif_customer.h"
#include "hci_code.h"
#include "hci_if.h"
#include "hci_proto.h"
//#include "bt_flags.h"
//#include "otp.h"
/***** Just for compile, need fix *****/
#define HCI_TASK_SIZE 2048
#define HCI_TASK_PRIORITY 5 //11-(-5)=16
#define HCI_TX_ACL_RSVD_SIZE 8
/***** Just for compile, need fix *****/
T_HCI_IF hci_if;
void hci_if_tx_req(void)
{
T_HCI_XMIT_DATA tx_data;
uint8_t *p_buf;
uint16_t len;
if (hci_if.tx_buf == NULL)
{
if (os_msg_recv(hci_if.xmit_q, &tx_data, 0) == true)
{
hci_if.tx_buf = tx_data.p_buf;
hci_if.tx_len = tx_data.len;
p_buf = tx_data.p_buf;
len = tx_data.len;
if (*p_buf == HCI_ACL_PKT)
{
p_buf += HCI_TX_ACL_RSVD_SIZE;
len -= HCI_TX_ACL_RSVD_SIZE;
}
hci_if.proto->send(p_buf, len);
}
}
}
void hci_if_tx_rsp(void)
{
hci_if.callback(HCI_IF_EVT_DATA_XMIT, true, hci_if.tx_buf, hci_if.tx_len);
hci_if.tx_buf = NULL;
hci_if_tx_req();
}
void hci_if_task(void *p_param)
{
uint8_t msg;
(void)p_param;
while (true)
{
if (os_msg_recv(hci_if.msg_q, &msg, 0xFFFFFFFF) == true)
{
switch (msg)
{
case HCI_IF_MSG_OPEN:
hci_if.state = HCI_IF_STATE_OPEN;
hci_if.proto->open();
break;
case HCI_IF_MSG_READY:
hci_if.state = HCI_IF_STATE_READY;
hci_if.callback(HCI_IF_EVT_OPENED, true, NULL, 0);
break;
case HCI_IF_MSG_FAIL:
hci_if.state = HCI_IF_STATE_IDLE;
hci_if.callback(HCI_IF_EVT_OPENED, false, NULL, 0);
break;
case HCI_IF_MSG_TX_REQ:
hci_if_tx_req();
break;
case HCI_IF_MSG_TX_RSP:
hci_if_tx_rsp();
break;
case HCI_IF_MSG_RX_IND:
hci_if.proto->recv();
break;
case HCI_IF_MSG_RX_CFM:
hci_if.proto->cfm();
break;
case HCI_IF_MSG_CLOSE:
hci_if.state = HCI_IF_STATE_IDLE;
hci_if.proto->close();
hci_if.callback(HCI_IF_EVT_CLOSED, true, NULL, 0);
break;
default:
HCI_PRINT_ERROR("hci_if_task: unknown msg 0x%02x", msg);
break;
}
}
}
}
bool hci_if_open(P_HCI_IF_CALLBACK p_callback)
{
uint8_t msg = HCI_IF_MSG_OPEN;
if (hci_if.task_handle == NULL)
{
hci_if.state = HCI_IF_STATE_IDLE;
hci_if.callback = p_callback;
hci_if.proto = &hci_h4_proto;
os_msg_queue_create(&(hci_if.msg_q), 32, sizeof(uint8_t));
os_msg_queue_create(&(hci_if.xmit_q), 16, sizeof(T_HCI_XMIT_DATA));
os_msg_queue_create(&(hci_if.cfm_q), 16, sizeof(uint8_t *));
os_task_create(&hci_if.task_handle, "HCI I/F", hci_if_task, NULL,
HCI_TASK_SIZE, HCI_TASK_PRIORITY);
}
else
{
HCI_PRINT_INFO("hci_if_open: reopen");
}
return os_msg_send(hci_if.msg_q, &msg, 0);
}
bool hci_if_close(void)
{
uint8_t msg = HCI_IF_MSG_CLOSE;
HCI_PRINT_INFO("hci_if_close");
return os_msg_send(hci_if.msg_q, &msg, 0);
}
bool hci_if_write(uint8_t *p_buf, uint32_t len)
{
T_HCI_XMIT_DATA tx_data;
uint8_t msg;
/* HCI_PRINT_TRACE("hci_if_write: buf %p, len %d", p_buf, len); */
tx_data.p_buf = p_buf;
tx_data.len = len;
msg = HCI_IF_MSG_TX_REQ;
if (os_msg_send(hci_if.xmit_q, &tx_data, 0) == true)
{
return os_msg_send(hci_if.msg_q, &msg, 0);
}
else
{
return false;
}
}
bool hci_if_confirm(uint8_t *p_buf)
{
uint8_t msg = HCI_IF_MSG_RX_CFM;
/* HCI_PRINT_TRACE("hci_if_confirm: buf %p", p_buf); */
if (os_msg_send(hci_if.cfm_q, &p_buf, 0) == true)
{
return os_msg_send(hci_if.msg_q, &msg, 0);
}
else
{
return false;
}
}
//#if F_BT_DEINIT
extern void hci_h4_pre_deinit(void);
extern void hci_h4_deinit(void);
void hci_if_del_task(void)
{
//hci_h4_pre_deinit();
if (hci_if.task_handle != NULL)
{
os_task_delete(hci_if.task_handle);
hci_if.task_handle = NULL;
}
if (hci_if.msg_q)
{
os_msg_queue_delete(hci_if.msg_q);
hci_if.msg_q = NULL;
}
if (hci_if.xmit_q)
{
os_msg_queue_delete(hci_if.xmit_q);
hci_if.xmit_q = NULL;
}
if (hci_if.cfm_q)
{
os_msg_queue_delete(hci_if.cfm_q);
hci_if.cfm_q = NULL;
}
}
void hci_if_deinit(void)
{
hci_h4_deinit();
memset(&hci_if, 0, offsetof(T_HCI_IF, proto));
}
//#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/hci/hci_normal.c
|
C
|
apache-2.0
| 5,368
|
/**
* Copyright (c) 2017, Realsil Semiconductor Corporation. All rights reserved.
*
*/
#include <stdio.h>
#include <string.h>
#include "ameba_soc.h"
//#include "os_sched.h"
//#include "os_pool.h"
//#include "os_sync.h"
//#include "os_mem.h"
#include "osif_customer.h"
#include <mem_types.h>
//#include "trace_app.h"
#include "hci_uart.h"
#include "bt_board.h"
#define HCI_UART_RX_BUF_SIZE 0x2000 /* RX buffer size 8K */
#define HCI_UART_RX_ENABLE_COUNT (HCI_UART_RX_BUF_SIZE - 2 * (1021 + 5)) /* Enable RX */
#define HCI_UART_RX_DISABLE_COUNT (HCI_UART_RX_BUF_SIZE - 1021 - 5 - 10) /* Disable RX */
typedef struct
{
UART_InitTypeDef UART_InitStruct;
IRQn_Type irqn;
uint32_t ier;
//tx
uint32_t tx_len;
uint8_t *tx_buf_cur;
uint32_t tx_len_cur;
P_UART_TX_CB tx_cb;
//rx
bool rx_disabled;
uint16_t rx_read_idx;
uint16_t rx_write_idx;
uint8_t rx_buffer[HCI_UART_RX_BUF_SIZE];
void* rx_timer_handle;
P_UART_RX_CB rx_ind;
bool hci_uart_bridge_flag;
}T_HCI_UART;
//===========
T_HCI_UART *hci_uart_obj;
#define TX_TRASMIT_COUNT 16
#define hci_board_debug printf
#define HCI_UART_IDX 1 //(only 0, 1, 3)
/*BT CTS PA0 ----- RTS_PIN*/
/*BT TX PA2 ----- RX_PIN*/
/*BT RX PA4 ----- TX_PIN*/
#if (HCI_UART_IDX == 0)
#define HCI_UART_OUT
#define HCI_UART_DEV UART0_DEV
#define HCI_UART_IRQ UART0_IRQ
#if 1
#define HCI_TX_PIN _PA_18
#define HCI_RX_PIN _PA_19
//#define HCI_CTS_PIN _PA_17
//#define HCI_RTS_PIN _PA_16 //BT_LOG
#else
#define HCI_TX_PIN _PA_21
#define HCI_RX_PIN _PA_22
//#define HCI_CTS_PIN _PA_24
#define HCI_RTS_PIN _PA_23
#endif
#elif (HCI_UART_IDX == 3)
#define HCI_UART_OUT
#define HCI_UART_DEV UART3_DEV
#define HCI_UART_IRQ UARTLP_IRQ
#define HCI_TX_PIN _PA_26
#define HCI_RX_PIN _PA_25
//#define HCI_CTS_PIN _PA_25
#define HCI_RTS_PIN _PA_27
#else
#define HCI_UART_DEV UART1_DEV
#define HCI_UART_IRQ UART1_IRQ
#endif
#define HCIUART_IRQ_PRIO 10
//========================================HCI UART BRIDGE=================
void set_hci_uart_out(bool flag)
{
T_HCI_UART *p_uart_obj = hci_uart_obj;
if(p_uart_obj != NULL)
{
p_uart_obj->hci_uart_bridge_flag = flag;
}
else
{
hci_board_debug("set_hci_uart_out: hci_uart_obj is NULL\r\n");
}
}
bool hci_uart_tx_bridge(uint8_t rc)
{
UART_CharPut(HCI_UART_DEV, rc);
return true;
}
bool hci_uart_rx_bridge(uint8_t rc)
{
//extern void bt_uart_tx(uint8_t rc);
//bt_uart_tx(rc);
return true;
}
uint8_t hci_rx_empty()
{
uint16_t tmpRead = hci_uart_obj->rx_read_idx;
uint16_t tmpWrite = hci_uart_obj->rx_write_idx;
return (tmpRead == tmpWrite);
}
uint16_t hci_rx_data_len()
{
return (hci_uart_obj->rx_write_idx + HCI_UART_RX_BUF_SIZE - hci_uart_obj->rx_read_idx) % HCI_UART_RX_BUF_SIZE;
}
uint16_t hci_rx_space_len()
{
return (hci_uart_obj->rx_read_idx + HCI_UART_RX_BUF_SIZE - hci_uart_obj->rx_write_idx - 1) % HCI_UART_RX_BUF_SIZE;
}
//========================================HCI UART BRIDGE==================
void hci_uart_set_baudrate(uint32_t baudrate)
{
hci_board_debug("Set baudrate to %d\r\n", baudrate);
UART_SetBaud(HCI_UART_DEV, baudrate);
}
void hci_uart_rx_disable(T_HCI_UART *hci_adapter)
{
/* We disable received data available and rx timeout interrupt, then
* the rx data will stay in UART FIFO, and RTS will be pulled high if
* the watermark is higher than rx trigger level. */
hci_board_debug("hci_uart_rx_disable\r\n");
UART_INTConfig(HCI_UART_DEV, RUART_IER_ERBI | RUART_IER_ETOI, DISABLE);
hci_adapter->rx_disabled = true;
}
void hci_uart_rx_enable(T_HCI_UART *hci_adapter)
{
hci_board_debug("hci_uart_rx_enable\r\n");
UART_INTConfig(HCI_UART_DEV, RUART_IER_ERBI | RUART_IER_ETOI, ENABLE);
hci_adapter->rx_disabled = false;
}
static inline void hciuart_stop_tx(T_HCI_UART *hci_adapter)
{
if (hci_adapter->ier & RUART_IER_ETBEI)
{
hci_adapter->ier &= ~RUART_IER_ETBEI;
UART_INTConfig(HCI_UART_DEV, RUART_IER_ETBEI, DISABLE);
}
}
static inline void transmit_chars(T_HCI_UART *hci_adapter)
{
int count;
if(hci_adapter == NULL)
{
hci_board_debug("transmit_chars: hci_adapter is NULL\r\n");
return;
}
if (hci_adapter->tx_len_cur == 0)
{
hciuart_stop_tx(hci_adapter);
if (hci_adapter->tx_cb)
{
hci_adapter->tx_cb();
}
return;
}
count = TX_TRASMIT_COUNT;
do
{
UART_CharPut(HCI_UART_DEV, *(hci_adapter->tx_buf_cur));
hci_adapter->tx_buf_cur++;
hci_adapter->tx_len_cur--;
}
while (--count > 0 && hci_adapter->tx_len_cur > 0);
}
static inline void uart_insert_char(T_HCI_UART *hci_adapter, uint8_t ch)
{
/* Should neve happen */
if (hci_rx_space_len()==0)
{
hci_board_debug("uart_insert_char: rx buffer full\r\n");
return;
}
// if(rltk_wlan_is_mp())
{
if(hci_adapter->hci_uart_bridge_flag == true)
{
hci_uart_rx_bridge(ch);
return;
}
}
hci_adapter->rx_buffer[hci_adapter->rx_write_idx++] = ch;
hci_adapter->rx_write_idx %= HCI_UART_RX_BUF_SIZE;
if (hci_rx_data_len() >= HCI_UART_RX_DISABLE_COUNT && hci_adapter->rx_disabled == false)
{
hci_board_debug("uart_insert_char: rx disable, data len %d\r\n", hci_rx_data_len());
hci_uart_rx_disable(hci_adapter);
}
}
static inline void receive_chars(T_HCI_UART *hci_adapter, int ind)
{
int max_count = 16;
u8 byte;
if(hci_adapter == NULL)
{
UART_CharGet(HCI_UART_DEV, &byte);
hci_board_debug("receive_chars: hci_adapter is NULL, ind:%x, data:%x\r\n", ind, byte);
return;
}
/* start timer*/
do
{
if (UART_Readable(HCI_UART_DEV))
{
UART_CharGet(HCI_UART_DEV, &byte);
uart_insert_char(hci_adapter, byte);
}
else
{
break;
}
}
while (--max_count > 0);
/* HCI_PRINT_INFO("receive_chars: rx_len %u", hci_adapter->rx_len); */
/* FIXME: There is too many rx indication events ? */
if (ind && hci_adapter->rx_ind)
{
hci_adapter->rx_ind();
}
}
u32 hciuart_irq(void *data)
{
volatile u8 reg_iir;
u8 int_id;
u32 reg_val;
T_HCI_UART *hci_adapter = (T_HCI_UART *) data;
reg_iir = UART_IntStatus(HCI_UART_DEV);
if ((reg_iir & RUART_IIR_INT_PEND) != 0)
{
/* No pending IRQ */
return 0;
}
int_id = (reg_iir & RUART_IIR_INT_ID) >> 1;
switch (int_id)
{
case RUART_LP_RX_MONITOR_DONE:
reg_val = UART_RxMonitorSatusGet(HCI_UART_DEV);
/* if(UART0_DEV == hci_adapter->UARTx){
* DUart0MonitorDone = 1;
* } else {
* DUart1MonitorDone = 1;
* } */
hci_board_debug("hciuart_irq: monitor done\r\n");
break;
case RUART_MODEM_STATUS:
reg_val = UART_ModemStatusGet(HCI_UART_DEV);
break;
case RUART_TX_FIFO_EMPTY:
transmit_chars(hci_adapter);
break;
case RUART_RECEIVER_DATA_AVAILABLE:
receive_chars(hci_adapter, 1);
break;
case RUART_TIME_OUT_INDICATION:
receive_chars(hci_adapter, 1);
break;
case RUART_RECEIVE_LINE_STATUS:
reg_val = (UART_LineStatusGet(HCI_UART_DEV));
hci_board_debug("hciuart_irq: LSR %08x interrupt\r\n", reg_val);
if (reg_val & RUART_LINE_STATUS_ERR_OVERRUN)
{
hci_board_debug("hciuart_irq: LSR over run interrupt\r\n");
}
if (reg_val & RUART_LINE_STATUS_ERR_PARITY)
{
hci_board_debug("hciuart_irq: LSR parity error interrupt\r\n");
}
if (reg_val & RUART_LINE_STATUS_ERR_FRAMING)
{
hci_board_debug("hciuart_irq: LSR frame error(stop bit error) interrupt\r\n");
}
if (reg_val & RUART_LINE_STATUS_ERR_BREAK)
{
hci_board_debug("hciuart_irq: LSR break error interrupt\r\n");
}
/* if (reg_val & RUART_LINE_STATUS_REG_THRE)
* transmit_chars(hci_adapter);
*/
break;
default:
hci_board_debug("hciuart_irq: Unknown interrupt type %u\r\n", int_id);
break;
}
return 0;
}
bool hci_uart_tx(uint8_t *p_buf, uint16_t len, P_UART_TX_CB tx_cb)
{
#if 0
UART_SendData(HCI_UART_DEV, p_buf, len);
if (tx_cb)
tx_cb();
return true;
#else
T_HCI_UART *uart_obj = hci_uart_obj;
uart_obj->tx_len = len;
uart_obj->tx_cb = tx_cb;
uart_obj->tx_buf_cur = p_buf;
uart_obj->tx_len_cur = len;
if (!(uart_obj->ier & RUART_IER_ETBEI))
{
uart_obj->ier |= RUART_IER_ETBEI;
UART_INTConfig(HCI_UART_DEV, RUART_IER_ETBEI, ENABLE);
}
else
{
hci_board_debug("hci_uart_tx: Transmitter FIFO empty interrupt has been enabled\r\n");
return false;
}
#endif
return true;
}
bool hci_uart_malloc(void)
{
if(hci_uart_obj == NULL)
{
hci_uart_obj = os_mem_zalloc(RAM_TYPE_DATA_ON, sizeof(T_HCI_UART)); //reopen not need init uart
if(!hci_uart_obj)
{
hci_board_debug("hci_uart_malloc: need %d, left %d\r\n", sizeof(T_HCI_UART), os_mem_peek(RAM_TYPE_DATA_ON));
return false;
}
else
{
//ok
}
}
else
{
hci_board_debug("hci_uart_malloc: rx_buffer not free\r\n");
return false;
}
return true;
}
bool hci_uart_free(void)
{
if(hci_uart_obj == NULL)
{
hci_board_debug("hci_uart_free: hci_uart_obj = NULL, no need free\r\n");
return true;
}
else
{
os_mem_free(hci_uart_obj);
hci_uart_obj = NULL;
}
return true;
}
void hci_uart_set_rx_ind(P_UART_RX_CB rx_ind)
{
hci_uart_obj->rx_ind = rx_ind;
}
bool hci_uart_init(P_UART_RX_CB rx_ind)
{
if(!hci_uart_malloc())
{
return false;
}
//malloc
#ifdef HCI_UART_OUT
//PINMUX THE PIN
Pinmux_Config(HCI_TX_PIN, PINMUX_FUNCTION_UART);
Pinmux_Config(HCI_RX_PIN, PINMUX_FUNCTION_UART);
Pinmux_Config(HCI_RTS_PIN, PINMUX_FUNCTION_UART_RTSCTS);
Pinmux_Config(HCI_CTS_PIN, PINMUX_FUNCTION_UART_RTSCTS);
PAD_PullCtrl(HCI_TX_PIN, GPIO_PuPd_UP);
PAD_PullCtrl(HCI_RX_PIN, GPIO_PuPd_NOPULL);
#else
#endif
UART_InitTypeDef *pUARTStruct;
pUARTStruct = &hci_uart_obj->UART_InitStruct;
UART_StructInit(pUARTStruct);
pUARTStruct->WordLen = RUART_WLS_8BITS;
pUARTStruct->StopBit = RUART_STOP_BIT_1;
pUARTStruct->Parity = RUART_PARITY_DISABLE;
pUARTStruct->ParityType = RUART_EVEN_PARITY;
pUARTStruct->StickParity = RUART_STICK_PARITY_DISABLE;
pUARTStruct->RxFifoTrigLevel = UART_RX_FIFOTRIG_LEVEL_14BYTES;
/* UART auto-flow control
* When the data in UART FIFO reaches rx level, RTS will be pulled high */
pUARTStruct->FlowControl = ENABLE;
UART_Init(HCI_UART_DEV, pUARTStruct);
UART_SetBaud(HCI_UART_DEV, 115200);
InterruptDis(HCI_UART_IRQ);
InterruptUnRegister(HCI_UART_IRQ);
InterruptRegister((IRQ_FUN)hciuart_irq, HCI_UART_IRQ, (uint32_t)hci_uart_obj, HCIUART_IRQ_PRIO);
InterruptEn(HCI_UART_IRQ, HCIUART_IRQ_PRIO);
hci_uart_obj->ier = RUART_IER_ERBI | RUART_IER_ETOI | RUART_IER_ELSI;
UART_INTConfig(HCI_UART_DEV, RUART_IER_ERBI | RUART_IER_ETOI | RUART_IER_ELSI, ENABLE);
UART_RxCmd(HCI_UART_DEV, ENABLE);
hci_uart_obj->rx_ind = rx_ind;
return true;
}
bool hci_uart_deinit(void)
{
//hardware deinit
UART_DeInit(HCI_UART_DEV);
InterruptDis(HCI_UART_IRQ);
InterruptUnRegister(HCI_UART_IRQ);
#ifdef UART_TIMER
#endif
#ifdef HCI_UART_DMA
#endif
hci_uart_free();
return true;
//free
}
uint16_t hci_uart_recv(uint8_t *p_buf, uint16_t size)
{
uint16_t rx_len;
T_HCI_UART *p_uart_obj = hci_uart_obj;
//hci_board_debug("hci_uart_recv: write:%d, read:%d, rx_len:%d, need:%d, space_len:%d\r\n", p_uart_obj->rx_write_idx, p_uart_obj->rx_read_idx, hci_rx_data_len(), size, hci_rx_space_len());
if(p_uart_obj == NULL)
{
hci_board_debug("hci_uart_recv: the p_uart_obj is NULL\r\n");
return 0;
}
if(hci_rx_empty())
{
//rx empty
return 0;
}
rx_len = hci_rx_data_len();
if (rx_len > size)
{
rx_len = size;
}
if (rx_len > HCI_UART_RX_BUF_SIZE - p_uart_obj->rx_read_idx) /* index overflow */
{
rx_len = HCI_UART_RX_BUF_SIZE - p_uart_obj->rx_read_idx;
}
if (rx_len)
{
memcpy(p_buf, &(p_uart_obj->rx_buffer[p_uart_obj->rx_read_idx]), rx_len);
p_uart_obj->rx_read_idx += rx_len;
p_uart_obj->rx_read_idx %= HCI_UART_RX_BUF_SIZE;
if (p_uart_obj->rx_disabled == true) /* flow control */
{
if (hci_rx_data_len() < HCI_UART_RX_ENABLE_COUNT)
{
hci_board_debug("hci_uart_recv: rx enable, data len %d\r\n", hci_rx_data_len());
hci_uart_rx_enable(p_uart_obj);
}
}
}
return rx_len;
}
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/hci/hci_uart.c
|
C
|
apache-2.0
| 14,019
|
#include <string.h>
#include <stdint.h>
#include <stdlib.h>
uint32_t platform_random(uint32_t max)
{
uint32_t seed = * ((volatile uint32_t *) 0xe000e018) ; //system tick current value
srand(seed);
return rand() % max;
}
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/platform_utils.c
|
C
|
apache-2.0
| 253
|
/**
* Copyright (c) 2017, Realsil Semiconductor Corporation. All rights reserved.
*
*/
#include <stdio.h>
#include <string.h>
#include "trace_app.h"
#include "vendor_cmd.h"
#include "rtk_coex.h"
#include "platform_stdlib.h"
#include <bt_intf.h>
struct rtl_btinfo
{
uint8_t cmd;
uint8_t len;
uint8_t data[6];
};
unsigned int send_coex_mailbox_to_wifi_from_BtAPP(uint8_t state)
{
uint8_t para[8];
para[0] = 0x45; //Mailbox ID
para[1] = state; //Data0
para[2] = 0; //Data1
para[3] = 0; //Data2
para[4] = 0; //Data3
para[5] = 0; //Data4
para[6] = 0; //Data5
para[7] = 0; //Data6
rltk_coex_mailbox_to_wifi(para, 8);
return 1;
}
static void rtk_notify_info_to_wifi(uint8_t length, uint8_t *report_info)
{
uint8_t para_length = 1 + length;
uint8_t *p = (uint8_t *)malloc(para_length * sizeof(uint8_t));
struct rtl_btinfo *report = (struct rtl_btinfo *)(report_info);
*(p++) = report->cmd;
//*p++ = 0x07;
*(p++) = report->len;
if (length)
{
memcpy(p, report->data, report->len);
}
if (length)
{
HCI_PRINT_TRACE("bt info: cmd %2.2X", report->cmd);
HCI_PRINT_TRACE("bt info: len %2.2X", report->len);
HCI_PRINT_TRACE6("bt info: data %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X",
report->data[0], report->data[1], report->data[2],
report->data[3], report->data[4], report->data[5]);
}
rltk_coex_mailbox_to_wifi(report_info, report->len + 2);
free(p);
//rtk_btcoex_send_msg_towifi(buf, para_length + HCI_CMD_PREAMBLE_SIZE);
// mailbox_to_wifi(buf, para_length + HCI_CMD_PREAMBLE_SIZE);
/* send BT INFO to Wi-Fi driver */
}
void bt_coex_handle_cmd_complete_evt(uint16_t opcode, uint16_t cause, uint8_t total_len, uint8_t *p)
{
(void)cause;
if (opcode == HCI_VENDOR_MAILBOX_CMD)
{
uint8_t status;
status = *p++;//jump the double subcmd
total_len--;
if(total_len <=1)
{
HCI_PRINT_TRACE("bt_coex_handle_cmd_complete_evt: not reprot to wifi");
return ;
}
(void)status;
rltk_coex_mailbox_to_wifi(p, total_len);
//rtk_parse_vendor_mailbox_cmd_evt(p, total_len, status);
}
}
void bt_coex_handle_specific_evt(uint8_t *p, uint8_t len)
{
rltk_coex_mailbox_to_wifi(p, len);
}
void bt_coex_init(void)
{
vendor_cmd_init(NULL);
}
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/rtk_coex.c
|
C
|
apache-2.0
| 2,578
|
/**
* Copyright (c) 2017, Realsil Semiconductor Corporation. All rights reserved.
*
*/
#include <stdio.h>
#include <string.h>
/* READ_ME
* <b>Example usage</b>
* \code{ble_app_main.c}
void app_le_gap_init(void)
{
....
bt_coex_init();
}
*/
void bt_coex_handle_cmd_complete_evt(uint16_t opcode, uint16_t cause, uint8_t total_len, uint8_t *p);
void bt_coex_handle_specific_evt(uint8_t *p, uint8_t len);
void bt_coex_init(void);
unsigned int send_coex_mailbox_to_wifi_from_BtAPP(uint8_t state);
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/rtk_coex.h
|
C
|
apache-2.0
| 544
|
#include <gap.h>
#include <bt_types.h>
#include <string.h>
#include <trace_app.h>
#include "vendor_cmd.h"
#include "vendor_cmd_bt.h"
#include "rtk_coex.h"
#include <gap_conn_le.h>
P_FUN_GAP_APP_CB ext_app_cb = NULL;
bool mailbox_to_bt(uint8_t *data, uint8_t len)
{
T_GAP_DEV_STATE new_state;
le_get_gap_param(GAP_PARAM_DEV_STATE , &new_state );
if (new_state.gap_init_state != GAP_INIT_STATE_STACK_READY) {
APP_PRINT_ERROR1("mailbox_to_bt: gap_init_state: 0x%x", new_state.gap_init_state);
return false;
}
if(gap_vendor_cmd_req(HCI_VENDOR_MAILBOX_CMD, len, data) == GAP_CAUSE_SUCCESS)
{
return true;
}
else
{
APP_PRINT_ERROR0("mailbox_to_bt: failed");
return false;
}
}
bool mailbox_to_bt_set_profile_report(uint8_t *data, uint8_t len)
{
T_GAP_DEV_STATE new_state;
le_get_gap_param(GAP_PARAM_DEV_STATE , &new_state );
if (new_state.gap_init_state != GAP_INIT_STATE_STACK_READY) {
APP_PRINT_INFO1("mailbox_to_bt_set_profile_report: gap_init_state: 0x%x", new_state.gap_init_state);
return false;
}
if(gap_vendor_cmd_req(HCI_VENDOR_SET_PROFILE_REPORT_COMMAND, len, data) == GAP_CAUSE_SUCCESS)
{
return true;
}
else
{
APP_PRINT_ERROR0("mailbox_to_bt_set_profile_report: failed");
return false;
}
}
#if BT_VENDOR_CMD_ONE_SHOT_SUPPORT
T_GAP_CAUSE le_vendor_one_shot_adv(void)
{
uint8_t len = 1;
uint8_t param[1];
param[0] = HCI_EXT_SUB_ONE_SHOT_ADV;
if (gap_vendor_cmd_req(HCI_LE_VENDOR_EXTENSION_FEATURE2, len, param) == GAP_CAUSE_SUCCESS)
{
return GAP_CAUSE_SUCCESS;
}
return GAP_CAUSE_SEND_REQ_FAILED;
}
#endif
#if BT_VENDOR_CMD_ADV_TX_POWER_SUPPORT
T_GAP_CAUSE le_adv_set_tx_power(uint8_t option, uint8_t tx_gain)
{
uint8_t param[3];
param[0] = HCI_EXT_SUB_SET_ADV_TX_POWER;
param[1] = option;
param[2] = tx_gain;
if (gap_vendor_cmd_req(HCI_LE_VENDOR_EXTENSION_FEATURE, 3, param) == GAP_CAUSE_SUCCESS)
{
return GAP_CAUSE_SUCCESS;
}
return GAP_CAUSE_SEND_REQ_FAILED;
}
#endif
#if BT_VENDOR_CMD_CONN_TX_POWER_SUPPORT
T_GAP_CAUSE le_set_conn_tx_power(uint8_t conn_id, bool reset, uint8_t tx_power)
{
uint16_t conn_handle;
if (le_get_conn_param(GAP_PARAM_CONN_HANDLE, &conn_handle, conn_id) == GAP_CAUSE_SUCCESS)
{
uint8_t param[5];
param[0] = HCI_EXT_SUB_SET_LINK_TX_POW;
param[1] = conn_handle & 0xFF;
param[2] = (conn_handle >> 8) & 0xFF;
param[3] = reset;
param[4] = tx_power;
if (gap_vendor_cmd_req(HCI_LE_VENDOR_EXTENSION_FEATURE, 5, param) == GAP_CAUSE_SUCCESS)
{
return GAP_CAUSE_SUCCESS;
}
return GAP_CAUSE_SEND_REQ_FAILED;
}
else
{
return GAP_CAUSE_NON_CONN;
}
}
#endif
#if BT_VENDOR_CMD_SLAVE_LATENCY_SUPPORT
T_GAP_CAUSE le_disable_slave_latency(uint8_t conn_id, bool disable)
{
uint16_t conn_handle;
if (le_get_conn_param(GAP_PARAM_CONN_HANDLE, &conn_handle, conn_id) == GAP_CAUSE_SUCCESS) {
uint8_t param[4];
param[0] = HCI_EXT_SUB_DISABLE_LATENCY;
param[1] = conn_handle & 0xFF;
param[2] = (conn_handle >> 8) & 0xFF;
if (disable) {
param[3] = 0;
} else {
param[3] = 1;
}
if (gap_vendor_cmd_req(HCI_LE_VENDOR_EXTENSION_FEATURE, 4, param) == GAP_CAUSE_SUCCESS) {
return GAP_CAUSE_SUCCESS;
}
return GAP_CAUSE_SEND_REQ_FAILED;
} else {
return GAP_CAUSE_NON_CONN;
}
}
#endif
/**
* @brief Callback for gap common module to notify app
* @param[in] cb_type callback msy type @ref GAP_COMMON_MSG_TYPE.
* @param[in] p_cb_data point to callback data @ref T_GAP_CB_DATA.
* @retval void
* example:
* uint8_t data[] ={0x33 , 0x01, 0x02,0x03, 0x04, 0x05, 0x06, 0x07};
* mailbox_to_bt(data, sizeof(data));
* mailbox_to_bt_set_profile_report(NULL, 0);
*/
void app_gap_vendor_callback(uint8_t cb_type, void *p_cb_data)
{
T_GAP_VENDOR_CB_DATA cb_data;
memcpy(&cb_data, p_cb_data, sizeof(T_GAP_VENDOR_CB_DATA));
switch (cb_type)
{
case GAP_MSG_VENDOR_CMD_RSP:
APP_PRINT_INFO4("GAP_MSG_VENDOR_CMD_RSP: command 0x%x, cause 0x%x, is_cmpl_evt %d, param_len %d",
cb_data.p_gap_vendor_cmd_rsp->command,
cb_data.p_gap_vendor_cmd_rsp->cause,
cb_data.p_gap_vendor_cmd_rsp->is_cmpl_evt,
cb_data.p_gap_vendor_cmd_rsp->param_len);
switch(cb_data.p_gap_vendor_cmd_rsp->command)
{
case HCI_VENDOR_MAILBOX_CMD:
bt_coex_handle_cmd_complete_evt(cb_data.p_gap_vendor_cmd_rsp->command,
cb_data.p_gap_vendor_cmd_rsp->cause, cb_data.p_gap_vendor_cmd_rsp->param_len,
cb_data.p_gap_vendor_cmd_rsp->param);
break;
default:
break;
}
break;
case GAP_MSG_VENDOR_EVT_INFO:
{
//format: subcode + status + payload(for wifi)
uint16_t subcode;
uint8_t *p = cb_data.p_gap_vendor_evt_info->param;
LE_STREAM_TO_UINT16(subcode, p);
APP_PRINT_INFO1("GAP_MSG_VENDOR_EVT_INFO: param_len %d",
cb_data.p_gap_vendor_evt_info->param_len);
switch(subcode)
{
case HCI_VENDOR_PTA_AUTO_REPORT_EVENT:
bt_coex_handle_specific_evt(p,cb_data.p_gap_vendor_evt_info->param_len - 2);
break;
default:
break;
}
}
break;
default:
break;
}
if (ext_app_cb)
{
ext_app_cb(cb_type, p_cb_data);
}
return;
}
void vendor_cmd_init(P_FUN_GAP_APP_CB app_cb)
{
if(app_cb != NULL)
{
ext_app_cb = app_cb;
}
gap_register_vendor_cb(app_gap_vendor_callback);
}
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/vendor_cmd/vendor_cmd.c
|
C
|
apache-2.0
| 6,154
|
#ifndef VNR_CMD_H
#define VNR_CMD_H
#include <gap.h>
//mailbox
#define HCI_VENDOR_ENABLE_PROFILE_REPORT_COMMAND 0xfc18
#define HCI_VENDOR_SET_PROFILE_REPORT_COMMAND 0xfc19
#define HCI_VENDOR_MAILBOX_CMD 0xfc8f
//sub event from fw start
#define HCI_VENDOR_PTA_REPORT_EVENT 0x24
#define HCI_VENDOR_PTA_AUTO_REPORT_EVENT 0x25
bool mailbox_to_bt(uint8_t *data, uint8_t len);
bool mailbox_to_bt_set_profile_report(uint8_t *data, uint8_t len);
void vendor_cmd_init(P_FUN_GAP_APP_CB app_cb);
#endif /* VNR_CMD_H */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/vendor_cmd/vendor_cmd.h
|
C
|
apache-2.0
| 584
|
#ifndef VNR_CMD_BT_H
#define VNR_CMD_BT_H
#include <gap.h>
/** @brief Supported LE Vendor Commands*/
#define BT_VENDOR_CMD_ONE_SHOT_SUPPORT 1
#define BT_VENDOR_CMD_ADV_TX_POWER_SUPPORT 1
#define BT_VENDOR_CMD_CONN_TX_POWER_SUPPORT 1
#define BT_VENDOR_CMD_SLAVE_LATENCY_SUPPORT 1
/** @brief LE Vendor Command Opcode*/
#define HCI_LE_VENDOR_EXTENSION_FEATURE2 0xFC87
#define HCI_EXT_SUB_ONE_SHOT_ADV 1
#define HCI_LE_VENDOR_EXTENSION_FEATURE 0xFD80
#define HCI_EXT_SUB_SET_ADV_TX_POWER 0
#define HCI_EXT_SUB_DISABLE_LATENCY 1
#define HCI_EXT_SUB_SET_LINK_TX_POW 0xC
/**
* @brief Trigger One Shot Advertising.
* This function can be called after @ref vendor_cmd_init is invoked.
* This function cannot be used if advertising type is connectable high duty cycle directed advertising.
*
* @return Operation result.
* @retval GAP_CAUSE_SUCCESS: Operation success.
* @retval GAP_CAUSE_SEND_REQ_FAILED: Operation fail.
*
* <b>Example usage</b>
* \code{.c}
static T_USER_CMD_PARSE_RESULT cmd_oneshot(T_USER_CMD_PARSED_VALUE *p_parse_value)
{
T_GAP_CAUSE cause = GAP_CAUSE_SUCCESS;
#if BT_VENDOR_CMD_ONE_SHOT_SUPPORT
cause = le_vendor_one_shot_adv();
#endif
return (T_USER_CMD_PARSE_RESULT)cause;
}
* \endcode
*/
#if BT_VENDOR_CMD_ONE_SHOT_SUPPORT
T_GAP_CAUSE le_vendor_one_shot_adv(void);
#endif
/**
* @brief Set the advertising tx power for the device, or reset advertising tx power to default value.
*
* NOTE: This function can be called after @ref vendor_cmd_init is invoked.
*
* @param[in] option Set to 0.
* @param[in] tx_gain index for power level. NOTE: The following tx gain table may be changed in future version.
tx_gain Power
0x06 -10 dBm
0x1A 0 dBm
0x23 4.5 dBm
* @retval GAP_CAUSE_SUCCESS Operation success.
* @retval GAP_CAUSE_SEND_REQ_FAILED Operation failure.
*
* <b>Example usage</b>
* \code{.c}
void test()
{
T_GAP_CAUSE cause;
uint8_t tx_gain = 0x06;
cause = le_adv_set_tx_power(0, tx_gain);
}
void app_vendor_callback(uint8_t cb_type, void *p_cb_data)
{
T_GAP_VENDOR_CB_DATA cb_data;
memcpy(&cb_data, p_cb_data, sizeof(T_GAP_VENDOR_CB_DATA));
APP_PRINT_INFO1("app_vendor_callback: command 0x%x", cb_data.p_gap_vendor_cmd_rsp->command);
switch (cb_type)
{
case GAP_MSG_VENDOR_CMD_RSP:
switch(cb_data.p_gap_vendor_cmd_rsp->command)
{
case HCI_LE_VENDOR_EXTENSION_FEATURE:
switch(cb_data.p_gap_vendor_cmd_rsp->param[0])
{
#if BT_VENDOR_CMD_ADV_TX_POWER_SUPPORT
case HCI_EXT_SUB_SET_ADV_TX_POWER:
APP_PRINT_INFO1("HCI_EXT_SUB_SET_ADV_TX_POWER: cause 0x%x", cb_data.p_gap_vendor_cmd_rsp->cause);
break;
#endif
}
break;
default:
break;
}
break;
default:
break;
}
return;
}
* \endcode
*/
#if BT_VENDOR_CMD_ADV_TX_POWER_SUPPORT
T_GAP_CAUSE le_adv_set_tx_power(uint8_t option, uint8_t tx_gain);
#endif
/**
* @brief Set the link tx power for the device.
*
* Set LE link tx power. Or reset link tx power to default value.
* Tx power is set to default every time a link is connect. Use this command
* after the link is connected.
* Tx gain default value, the order of precedence is Logical efuse -> Physical efuse -> driver config
*
* NOTE: This function can be called after @ref vendor_cmd_init is invoked.
*
* @param[in] conn_id Connection ID for this link.
* @param[in] reset Whether to reset to default value and restore power track function.
* @param[in] tx_gain index for power level. NOTE: The following tx gain table may be changed in future version.
tx_gain Power
0x06 -10 dBm
0x1A 0 dBm
0x23 4.5 dBm
* @retval GAP_CAUSE_SUCCESS Operation success.
* @retval GAP_CAUSE_SEND_REQ_FAILED Operation failure.
*
* <b>Example usage</b>
* \code{.c}
void test()
{
T_GAP_CAUSE cause;
uint8_t conn_id = 0;
bool reset = false;
uint8_t tx_pwr = 0x06;
cause = le_set_conn_tx_power(conn_id, reset, tx_pwr);
}
void app_vendor_callback(uint8_t cb_type, void *p_cb_data)
{
T_GAP_VENDOR_CB_DATA cb_data;
memcpy(&cb_data, p_cb_data, sizeof(T_GAP_VENDOR_CB_DATA));
APP_PRINT_INFO1("app_vendor_callback: command 0x%x", cb_data.p_gap_vendor_cmd_rsp->command);
switch (cb_type)
{
case GAP_MSG_VENDOR_CMD_RSP:
switch(cb_data.p_gap_vendor_cmd_rsp->command)
{
case HCI_LE_VENDOR_EXTENSION_FEATURE:
switch(cb_data.p_gap_vendor_cmd_rsp->param[0])
{
#if BT_VENDOR_CMD_CONN_TX_POWER_SUPPORT
case HCI_EXT_SUB_SET_LINK_TX_POW:
APP_PRINT_INFO1("HCI_EXT_SUB_SET_LINK_TX_POW: cause 0x%x", cb_data.p_gap_vendor_cmd_rsp->cause);
break;
#endif
}
break;
default:
break;
}
break;
default:
break;
}
return;
}
* \endcode
*/
#if BT_VENDOR_CMD_CONN_TX_POWER_SUPPORT
T_GAP_CAUSE le_set_conn_tx_power(uint8_t conn_id, bool reset, uint8_t tx_gain);
#endif
#if BT_VENDOR_CMD_SLAVE_LATENCY_SUPPORT
T_GAP_CAUSE le_disable_slave_latency(uint8_t conn_id, bool disable);
#endif
/**
* @brief Initialize vendor command module.
* @param[in] link_num Initialize link number.
* @retval true Success.
* @retval false Failed because of invalid parameter.
*
* <b>Example usage</b>
* \code{.c}
* \endcode
*/
/**
* @brief Initialize vendor command module and register callback to gap, when messages in @ref GAP_VENDOR_MSG_TYPE happens, it will callback to app.
* @param[in] app_cb Callback function provided by the APP to handle gap vendor command messages sent from the vendor command module.
* @arg NULL -> Not send vendor command messages to APP.
* @arg Other -> Use application defined callback function.
* @return void
*
* <b>Example usage</b>
* \code{.c}
void app_le_gap_init(void)
{
......
vendor_cmd_init(app_vendor_callback);
}
void app_vendor_callback(uint8_t cb_type, void *p_cb_data)
{
T_GAP_VENDOR_CB_DATA cb_data;
memcpy(&cb_data, p_cb_data, sizeof(T_GAP_VENDOR_CB_DATA));
APP_PRINT_INFO1("app_vendor_callback: command 0x%x", cb_data.p_gap_vendor_cmd_rsp->command);
switch (cb_type)
{
case GAP_MSG_VENDOR_CMD_RSP:
switch(cb_data.p_gap_vendor_cmd_rsp->command)
{
case HCI_LE_VENDOR_EXTENSION_FEATURE:
switch(cb_data.p_gap_vendor_cmd_rsp->param[0])
{
#if BT_VENDOR_CMD_ADV_TX_POWER_SUPPORT
case HCI_EXT_SUB_SET_ADV_TX_POWER:
APP_PRINT_INFO1("HCI_EXT_SUB_SET_ADV_TX_POWER: cause 0x%x", cb_data.p_gap_vendor_cmd_rsp->cause);
break;
#endif
#if BT_VENDOR_CMD_CONN_TX_POWER_SUPPORT
case HCI_EXT_SUB_SET_LINK_TX_POW:
APP_PRINT_INFO1("HCI_EXT_SUB_SET_LINK_TX_POW: cause 0x%x", cb_data.p_gap_vendor_cmd_rsp->cause);
break;
#endif
}
break;
default:
break;
}
break;
default:
break;
}
return;
}
\endcode
*/
void vendor_cmd_init(P_FUN_GAP_APP_CB app_cb);
#endif /* VNR_CMD_H */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/amebad/src/vendor_cmd/vendor_cmd_bt.h
|
C
|
apache-2.0
| 8,421
|
/**
* Copyright (c) 2017, Realtek Semiconductor Corporation. All rights reserved.
*/
#ifndef _BT_TYPES_H_
#define _BT_TYPES_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* bt_types.h
*
* \name BT_BYTE_ORDER
* \brief BT buffer/array byte-order utility macros.
* \anchor BT_BYTE_ORDER
*/
/**
* \ingroup BTTYPES
*/
/** Calculate integer bit count of b'1 */
#define INT_BIT_COUNT(integer, count) { \
count = 0; \
while (integer) \
{ \
count++; \
integer &= integer - 1; \
} \
}
/** Stream skip len */
#define STREAM_SKIP_LEN(s, len) { \
s += len; \
}
/** Stream to array */
#define STREAM_TO_ARRAY(a, s, len) { \
uint32_t ii; \
for (ii = 0; ii < len; ii++) \
{ \
*((uint8_t *)(a) + ii) = *s++; \
} \
}
/** Array to stream */
#define ARRAY_TO_STREAM(s, a, len) { \
uint32_t ii; \
for (ii = 0; ii < len; ii++) \
{ \
*s++ = *((uint8_t *)(a) + ii); \
} \
}
/** Little Endian stream to uint8 */
#define LE_STREAM_TO_UINT8(u8, s) { \
u8 = (uint8_t)(*s); \
s += 1; \
}
/** Little Endian stream to uint16 */
#define LE_STREAM_TO_UINT16(u16, s) { \
u16 = ((uint16_t)(*(s + 0)) << 0) + \
((uint16_t)(*(s + 1)) << 8); \
s += 2; \
}
/** Little Endian stream to uint24 */
#define LE_STREAM_TO_UINT24(u24, s) { \
u24 = ((uint32_t)(*(s + 0)) << 0) + \
((uint32_t)(*(s + 1)) << 8) + \
((uint32_t)(*(s + 2)) << 16); \
s += 3; \
}
/** Little Endian stream to uint32 */
#define LE_STREAM_TO_UINT32(u32, s) { \
u32 = ((uint32_t)(*(s + 0)) << 0) + \
((uint32_t)(*(s + 1)) << 8) + \
((uint32_t)(*(s + 2)) << 16) + \
((uint32_t)(*(s + 3)) << 24); \
s += 4; \
}
/** Little Endian uint8 to stream */
#define LE_UINT8_TO_STREAM(s, u8) { \
*s++ = (uint8_t)(u8); \
}
/** Little Endian uint16 to stream */
#define LE_UINT16_TO_STREAM(s, u16) { \
*s++ = (uint8_t)((u16) >> 0); \
*s++ = (uint8_t)((u16) >> 8); \
}
/** Little Endian uint24 to stream */
#define LE_UINT24_TO_STREAM(s, u24) { \
*s++ = (uint8_t)((u24) >> 0); \
*s++ = (uint8_t)((u24) >> 8); \
*s++ = (uint8_t)((u24) >> 16); \
}
/** Little Endian uint32 to stream */
#define LE_UINT32_TO_STREAM(s, u32) { \
*s++ = (uint8_t)((u32) >> 0); \
*s++ = (uint8_t)((u32) >> 8); \
*s++ = (uint8_t)((u32) >> 16); \
*s++ = (uint8_t)((u32) >> 24); \
}
/** Little Endian array to uint8 */
#define LE_ARRAY_TO_UINT8(u8, a) { \
u8 = (uint8_t)(*(a + 0)); \
}
/** Little Endian array to uint16 */
#define LE_ARRAY_TO_UINT16(u16, a) { \
u16 = ((uint16_t)(*(a + 0)) << 0) + \
((uint16_t)(*(a + 1)) << 8); \
}
/** Little Endian array to uint24 */
#define LE_ARRAY_TO_UINT24(u24, a) { \
u24 = ((uint32_t)(*(a + 0)) << 0) + \
((uint32_t)(*(a + 1)) << 8) + \
((uint32_t)(*(a + 2)) << 16); \
}
/** Little Endian array to uint32 */
#define LE_ARRAY_TO_UINT32(u32, a) { \
u32 = ((uint32_t)(*(a + 0)) << 0) + \
((uint32_t)(*(a + 1)) << 8) + \
((uint32_t)(*(a + 2)) << 16) + \
((uint32_t)(*(a + 3)) << 24); \
}
/** Little Endian uint8 to array */
#define LE_UINT8_TO_ARRAY(a, u8) { \
*((uint8_t *)(a) + 0) = (uint8_t)(u8); \
}
/** Little Endian uint16 to array */
#define LE_UINT16_TO_ARRAY(a, u16) { \
*((uint8_t *)(a) + 0) = (uint8_t)((u16) >> 0); \
*((uint8_t *)(a) + 1) = (uint8_t)((u16) >> 8); \
}
/** Little Endian uint24 to array */
#define LE_UINT24_TO_ARRAY(a, u24) { \
*((uint8_t *)(a) + 0) = (uint8_t)((u24) >> 0); \
*((uint8_t *)(a) + 1) = (uint8_t)((u24) >> 8); \
*((uint8_t *)(a) + 2) = (uint8_t)((u24) >> 16); \
}
/** Little Endian uint32 to array */
#define LE_UINT32_TO_ARRAY(a, u32) { \
*((uint8_t *)(a) + 0) = (uint8_t)((u32) >> 0); \
*((uint8_t *)(a) + 1) = (uint8_t)((u32) >> 8); \
*((uint8_t *)(a) + 2) = (uint8_t)((u32) >> 16); \
*((uint8_t *)(a) + 3) = (uint8_t)((u32) >> 24); \
}
/** Big Endian stream to uint8 */
#define BE_STREAM_TO_UINT8(u8, s) { \
u8 = (uint8_t)(*(s + 0)); \
s += 1; \
}
/** Big Endian stream to uint16 */
#define BE_STREAM_TO_UINT16(u16, s) { \
u16 = ((uint16_t)(*(s + 0)) << 8) + \
((uint16_t)(*(s + 1)) << 0); \
s += 2; \
}
/** Big Endian stream to uint24 */
#define BE_STREAM_TO_UINT24(u24, s) { \
u24 = ((uint32_t)(*(s + 0)) << 16) + \
((uint32_t)(*(s + 1)) << 8) + \
((uint32_t)(*(s + 2)) << 0); \
s += 3; \
}
/** Big Endian stream to uint32 */
#define BE_STREAM_TO_UINT32(u32, s) { \
u32 = ((uint32_t)(*(s + 0)) << 24) + \
((uint32_t)(*(s + 1)) << 16) + \
((uint32_t)(*(s + 2)) << 8) + \
((uint32_t)(*(s + 3)) << 0); \
s += 4; \
}
/** Big Endian uint8 to stream */
#define BE_UINT8_TO_STREAM(s, u8) { \
*s++ = (uint8_t)(u8); \
}
/** Big Endian uint16 to stream */
#define BE_UINT16_TO_STREAM(s, u16) { \
*s++ = (uint8_t)((u16) >> 8); \
*s++ = (uint8_t)((u16) >> 0); \
}
/** Big Endian uint24 to stream */
#define BE_UINT24_TO_STREAM(s, u24) { \
*s++ = (uint8_t)((u24) >> 16); \
*s++ = (uint8_t)((u24) >> 8); \
*s++ = (uint8_t)((u24) >> 0); \
}
/** Big Endian uint32 to stream */
#define BE_UINT32_TO_STREAM(s, u32) { \
*s++ = (uint8_t)((u32) >> 24); \
*s++ = (uint8_t)((u32) >> 16); \
*s++ = (uint8_t)((u32) >> 8); \
*s++ = (uint8_t)((u32) >> 0); \
}
/** Big Endian array to uint8 */
#define BE_ARRAY_TO_UINT8(u8, a) { \
u8 = (uint8_t)(*(a + 0)); \
}
/** Big Endian array to uint16 */
#define BE_ARRAY_TO_UINT16(u16, a) { \
u16 = ((uint16_t)(*(a + 0)) << 8) + \
((uint16_t)(*(a + 1)) << 0); \
}
/** Big Endian array to uint24 */
#define BE_ARRAY_TO_UINT24(u24, a) { \
u24 = ((uint32_t)(*(a + 0)) << 16) + \
((uint32_t)(*(a + 1)) << 8) + \
((uint32_t)(*(a + 2)) << 0); \
}
/** Big Endian array to uint32 */
#define BE_ARRAY_TO_UINT32(u32, a) { \
u32 = ((uint32_t)(*(a + 0)) << 24) + \
((uint32_t)(*(a + 1)) << 16) + \
((uint32_t)(*(a + 2)) << 8) + \
((uint32_t)(*(a + 3)) << 0); \
}
/** Big Endian uint8 to array */
#define BE_UINT8_TO_ARRAY(a, u8) { \
*((uint8_t *)(a) + 0) = (uint8_t)(u8); \
}
/** Big Endian uint16 to array */
#define BE_UINT16_TO_ARRAY(a, u16) { \
*((uint8_t *)(a) + 0) = (uint8_t)((u16) >> 8); \
*((uint8_t *)(a) + 1) = (uint8_t)((u16) >> 0); \
}
/** Big Endian uint24 to array */
#define BE_UINT24_TO_ARRAY(a, u24) { \
*((uint8_t *)(a) + 0) = (uint8_t)((u24) >> 16); \
*((uint8_t *)(a) + 1) = (uint8_t)((u24) >> 8); \
*((uint8_t *)(a) + 2) = (uint8_t)((u24) >> 0); \
}
/** Big Endian uint32 to array */
#define BE_UINT32_TO_ARRAY(a, u32) { \
*((uint8_t *)(a) + 0) = (uint8_t)((u32) >> 24); \
*((uint8_t *)(a) + 1) = (uint8_t)((u32) >> 16); \
*((uint8_t *)(a) + 2) = (uint8_t)((u32) >> 8); \
*((uint8_t *)(a) + 3) = (uint8_t)((u32) >> 0); \
}
#ifdef __cplusplus
}
#endif
#endif /* _BT_TYPES_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/bt_types.h
|
C
|
apache-2.0
| 10,350
|
/**
* Copyright (c) 2017, Realsil Semiconductor Corporation. All rights reserved.
*
*/
#ifndef _HCI_BOARD_H_
#define _HCI_BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <string.h>
bool hci_board_init(void);
void bt_reset(void);
void bt_power_on(void);
void bt_power_off(void);
#ifdef __cplusplus
}
#endif
#endif /* _HCI_BOARD_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/hci_board.h
|
C
|
apache-2.0
| 393
|
/**
* Copyright (c) 2015, Realsil Semiconductor Corporation. All rights reserved.
*/
#ifndef _HCI_CODE_H_
#define _HCI_CODE_H_
/** HCI specific definitions */
#define HCI_CMD_PKT 0x01
#define HCI_ACL_PKT 0x02
#define HCI_SCO_PKT 0x03
#define HCI_EVT_PKT 0x04
/** HCI Spec Versions https://www.bluetooth.com/specifications/assigned-numbers/link-manager*/
#define HCI_VERSION_10B 0
#define HCI_VERSION_11 1
#define HCI_VERSION_12 2
#define HCI_VERSION_20EDR 3
#define HCI_VERSION_21EDR 4
#define HCI_VERSION_30HS 5
#define HCI_VERSION_40 6
#define HCI_VERSION_41 7
#define HCI_VERSION_42 8
/** HCI OGF Codes */
#define HCI_LINK_CONTROL 1
#define HCI_LINK_POLICY 2
#define HCI_CONTROL 3
#define HCI_INFORMATION 4
#define HCI_STATUS 5
#define HCI_TESTING 6
#define HCI_LE_CONTROL 8
#define HCI_VENDOR 0x3F
#define HCI_TCI 0x3E /**< Test Control Interface */
#define HCI_OGF(opcode) (opcode >> 10)
/** HCI Vendor codes */
#if F_BT_CONTROLLER_HANDSHAKE
#define HCI_VENDOR_HANDSHAKE 0xFC97
#endif
/** HCI Command codes */
#define HCI_NOP (0x00)
#define HCI_INQUIRY (0x01 | (HCI_LINK_CONTROL << 10))
#define HCI_INQUIRY_CANCEL (0x02 | (HCI_LINK_CONTROL << 10))
#define HCI_PERIODIC_INQUIRY_MODE (0x03 | (HCI_LINK_CONTROL << 10))
#define HCI_EXIT_PERIODIC_INQUIRY_MODE (0x04 | (HCI_LINK_CONTROL << 10))
#define HCI_CREATE_CONNECTION (0x05 | (HCI_LINK_CONTROL << 10))
#define HCI_DISCONNECT (0x06 | (HCI_LINK_CONTROL << 10))
#define HCI_ADD_SCO_CONNECTION (0x07 | (HCI_LINK_CONTROL << 10))
#define HCI_CREATE_CONNECTION_CANCEL (0x08 | (HCI_LINK_CONTROL << 10))
#define HCI_ACCEPT_CONNECTION_REQUEST (0x09 | (HCI_LINK_CONTROL << 10))
#define HCI_REJECT_CONNECTION_REQUEST (0x0a | (HCI_LINK_CONTROL << 10))
#define HCI_LINK_KEY_REQUEST_REPLY (0x0b | (HCI_LINK_CONTROL << 10))
#define HCI_LINK_KEY_REQUEST_NEG_REPLY (0x0c | (HCI_LINK_CONTROL << 10))
#define HCI_PIN_CODE_REQUEST_REPLY (0x0d | (HCI_LINK_CONTROL << 10))
#define HCI_PIN_CODE_REQUEST_NEG_REPLY (0x0e | (HCI_LINK_CONTROL << 10))
#define HCI_CHANGE_CONNECTION_PACKET_TYPE (0x0f | (HCI_LINK_CONTROL << 10))
#define HCI_AUTHENTICATION_REQUESTED (0x11 | (HCI_LINK_CONTROL << 10))
#define HCI_SET_CONNECTION_ENCRYPTION (0x13 | (HCI_LINK_CONTROL << 10))
#define HCI_CHANGE_CONNECTION_LINK_KEY (0x15 | (HCI_LINK_CONTROL << 10))
#define HCI_MASTER_LINK_KEY (0x17 | (HCI_LINK_CONTROL << 10))
#define HCI_REMOTE_NAME_REQUEST (0x19 | (HCI_LINK_CONTROL << 10))
#define HCI_READ_REMOTE_SUPPORTED_FEATURES (0x1b | (HCI_LINK_CONTROL << 10))
#define HCI_READ_REMOTE_EXTENDED_FEATURES (0x1c | (HCI_LINK_CONTROL << 10))
#define HCI_READ_REMOTE_VERSION_INFORMATION (0x1d | (HCI_LINK_CONTROL << 10))
#define HCI_READ_CLOCK_OFFSET (0x1f | (HCI_LINK_CONTROL << 10))
#define HCI_READ_LMP_HANDLE (0x20 | (HCI_LINK_CONTROL << 10))
#define HCI_EXCHANGE_FIXED_INFO (0x21 | (HCI_LINK_CONTROL << 10))
#define HCI_EXCHANGE_ALIAS_INFO (0x22 | (HCI_LINK_CONTROL << 10))
#define HCI_PRIVATE_PAIRING_REQUEST_REPLY (0x23 | (HCI_LINK_CONTROL << 10))
#define HCI_PRIVATE_PAIRING_REQUEST_NEGATIVE_REPLY (0x24 | (HCI_LINK_CONTROL << 10))
#define HCI_GENERATED_ALIAS (0x25 | (HCI_LINK_CONTROL << 10))
#define HCI_ALIAS_ADDRESS_REQUEST_REPLY (0x26 | (HCI_LINK_CONTROL << 10))
#define HCI_ALIAS_ADDRESS_REQUEST_NEGATIVE_REPLY (0x27 | (HCI_LINK_CONTROL << 10))
#define HCI_SETUP_SYNCHRONOUS_CONNECTION (0x28 | (HCI_LINK_CONTROL << 10))
#define HCI_ACCEPT_SYNCHRONOUS_CONNECTION_REQUEST (0x29 | (HCI_LINK_CONTROL << 10))
#define HCI_REJECT_SYNCHRONOUS_CONNECTION_REQUEST (0x2A | (HCI_LINK_CONTROL << 10))
#define HCI_IO_CAPABILITY_REQUEST_REPLY (0x2B | (HCI_LINK_CONTROL << 10))
#define HCI_USER_CONFIRMATION_REQUEST_REPLY (0x2C | (HCI_LINK_CONTROL << 10))
#define HCI_USER_CONFIRMATION_REQUEST_NEGATIVE_REPLY (0x2D | (HCI_LINK_CONTROL << 10))
#define HCI_USER_PASSKEY_REQUEST_REPLY (0x2E | (HCI_LINK_CONTROL << 10))
#define HCI_USER_PASSKEY_REQUEST_NEGATIVE_REPLY (0x2F | (HCI_LINK_CONTROL << 10))
#define HCI_REMOTE_OOB_DATA_REQUEST_REPLY (0x30 | (HCI_LINK_CONTROL << 10))
#define HCI_REMOTE_OOB_DATA_REQUEST_NEGATIVE_REPLY (0x33 | (HCI_LINK_CONTROL << 10))
#define HCI_IO_CAPABILITY_REQUEST_NEGATIVE_REPLY (0x34 | (HCI_LINK_CONTROL << 10))
#define HCI_TRUNCATED_PAGE (0x3F | (HCI_LINK_CONTROL << 10))
#define HCI_TRUNCATED_PAGE_CANCEL (0x40 | (HCI_LINK_CONTROL << 10))
#define HCI_SET_CONNECTIONLESS_SLAVE_BROADCAST (0x41 | (HCI_LINK_CONTROL << 10))
#define HCI_SET_CONNECTIONLESS_SLAVE_BROADCAST_RECEIVE (0x42 | (HCI_LINK_CONTROL << 10))
#define HCI_START_SYNCHRONIZATION_TRAIN (0x43 | (HCI_LINK_CONTROL << 10))
#define HCI_RECEIVE_SYNCHRONIZATION_TRAIN (0x44 | (HCI_LINK_CONTROL << 10))
#define HCI_HOLD_MODE (0x01 | (HCI_LINK_POLICY << 10))
#define HCI_SNIFF_MODE (0x03 | (HCI_LINK_POLICY << 10))
#define HCI_EXIT_SNIFF_MODE (0x04 | (HCI_LINK_POLICY << 10))
#define HCI_PARK_MODE (0x05 | (HCI_LINK_POLICY << 10))
#define HCI_EXIT_PARK_MODE (0x06 | (HCI_LINK_POLICY << 10))
#define HCI_QOS_SETUP (0x07 | (HCI_LINK_POLICY << 10))
#define HCI_ROLE_DISCOVERY (0x09 | (HCI_LINK_POLICY << 10))
#define HCI_SWITCH_ROLE (0x0b | (HCI_LINK_POLICY << 10))
#define HCI_READ_LINK_POLICY (0x0c | (HCI_LINK_POLICY << 10))
#define HCI_WRITE_LINK_POLICY_SETTINGS (0x0d | (HCI_LINK_POLICY << 10))
#define HCI_READ_DEFAULT_LINK_POLICY_SETTINGS (0x0E | (HCI_LINK_POLICY << 10))
#define HCI_WRITE_DEFAULT_LINK_POLICY_SETTINGS (0x0F | (HCI_LINK_POLICY << 10))
#define HCI_FLOW_SPECIFICATION (0x10 | (HCI_LINK_POLICY << 10))
#define HCI_SNIFF_SUBRATING (0x11 | (HCI_LINK_POLICY << 10))
#define HCI_SET_EVENT_MASK (0x01 | (HCI_CONTROL << 10))
#define HCI_RESET (0x03 | (HCI_CONTROL << 10))
#define HCI_SET_EVENT_FILTER (0x05 | (HCI_CONTROL << 10))
#define HCI_FLUSH (0x08 | (HCI_CONTROL << 10))
#define HCI_READ_PIN_TYPE (0x09 | (HCI_CONTROL << 10))
#define HCI_WRITE_PIN_TYPE (0x0a | (HCI_CONTROL << 10))
#define HCI_CREATE_NEW_UNIT_KEY (0x0b | (HCI_CONTROL << 10))
#define HCI_READ_STORED_LINK_KEY (0x0d | (HCI_CONTROL << 10))
#define HCI_WRITE_STORED_LINK_KEY (0x11 | (HCI_CONTROL << 10))
#define HCI_DELETE_STORED_LINK_KEY (0x12 | (HCI_CONTROL << 10))
#define HCI_WRITE_LOCAL_NAME (0x13 | (HCI_CONTROL << 10))
#define HCI_READ_LOCAL_NAME (0x14 | (HCI_CONTROL << 10))
#define HCI_READ_CONNECTION_ACCEPT_TIMEOUT (0x15 | (HCI_CONTROL << 10))
#define HCI_WRITE_CONNECTION_ACCEPT_TIMEOUT (0x16 | (HCI_CONTROL << 10))
#define HCI_READ_PAGE_TIMEOUT (0x17 | (HCI_CONTROL << 10))
#define HCI_WRITE_PAGE_TIMEOUT (0x18 | (HCI_CONTROL << 10))
#define HCI_READ_SCAN_ENABLE (0x19 | (HCI_CONTROL << 10))
#define HCI_WRITE_SCAN_ENABLE (0x1a | (HCI_CONTROL << 10))
#define HCI_READ_PAGE_SCAN_ACTIVITY (0x1b | (HCI_CONTROL << 10))
#define HCI_WRITE_PAGE_SCAN_ACTIVITY (0x1c | (HCI_CONTROL << 10))
#define HCI_READ_INQUIRY_SCAN_ACTIVITY (0x1d | (HCI_CONTROL << 10))
#define HCI_WRITE_INQUIRY_SCAN_ACTIVITY (0x1e | (HCI_CONTROL << 10))
#define HCI_READ_AUTHENTICATION_ENABLE (0x1f | (HCI_CONTROL << 10))
#define HCI_WRITE_AUTHENTICATION_ENABLE (0x20 | (HCI_CONTROL << 10))
#define HCI_READ_ENCRYPTION_MODE (0x21 | (HCI_CONTROL << 10))
#define HCI_WRITE_ENCRYPTION_MODE (0x22 | (HCI_CONTROL << 10))
#define HCI_READ_CLASS_OF_DEVICE (0x23 | (HCI_CONTROL << 10))
#define HCI_WRITE_CLASS_OF_DEVICE (0x24 | (HCI_CONTROL << 10))
#define HCI_READ_VOICE_SETTING (0x25 | (HCI_CONTROL << 10))
#define HCI_WRITE_VOICE_SETTING (0x26 | (HCI_CONTROL << 10))
#define HCI_READ_AUTOMATIC_FLUSH_TIMEOUT (0x27 | (HCI_CONTROL << 10))
#define HCI_WRITE_AUTOMATIC_FLUSH_TIMEOUT (0x28 | (HCI_CONTROL << 10))
#define HCI_READ_NUM_BROADCASTS_RETRANS (0x29 | (HCI_CONTROL << 10))
#define HCI_WRITE_NUM_BROADCASTS_RETRANS (0x2a | (HCI_CONTROL << 10))
#define HCI_READ_HOLD_MODE_ACTIVITY (0x2b | (HCI_CONTROL << 10))
#define HCI_WRITE_HOLD_MODE_ACTIVITY (0x2c | (HCI_CONTROL << 10))
#define HCI_READ_TRANSMIT_POWER_LEVEL (0x2d | (HCI_CONTROL << 10))
#define HCI_READ_SCO_FLOW_CONTROL_ENABLE (0x2e | (HCI_CONTROL << 10))
#define HCI_WRITE_SCO_FLOW_CONTROL_ENABLE (0x2f | (HCI_CONTROL << 10))
#define HCI_SET_CONTROLLER_TO_HOST_FLOW (0x31 | (HCI_CONTROL << 10))
#define HCI_HOST_BUFFER_SIZE (0x33 | (HCI_CONTROL << 10))
#define HCI_HOST_NUMBER_OF_COMPLETED_PACKETS (0x35 | (HCI_CONTROL << 10))
#define HCI_READ_LINK_SUPERVISION_TIMEOUT (0x36 | (HCI_CONTROL << 10))
#define HCI_WRITE_LINK_SUPERVISION_TIMEOUT (0x37 | (HCI_CONTROL << 10))
#define HCI_READ_NUMBER_OF_SUPPORTED_IAC (0x38 | (HCI_CONTROL << 10))
#define HCI_READ_CURRENT_IAC_LAP (0x39 | (HCI_CONTROL << 10))
#define HCI_WRITE_CURRENT_IAC_LAP (0x3a | (HCI_CONTROL << 10))
#define HCI_READ_PAGE_SCAN_PERIOD_MODE (0x3b | (HCI_CONTROL << 10))
#define HCI_WRITE_PAGE_SCAN_PERIOD_MODE (0x3c | (HCI_CONTROL << 10))
#define HCI_READ_PAGE_SCAN_MODE (0x3d | (HCI_CONTROL << 10))
#define HCI_WRITE_PAGE_SCAN_MODE (0x3e | (HCI_CONTROL << 10))
#define HCI_SET_AFH_HOST_CHANNEL_CLASSIFICATION (0x3F | (HCI_CONTROL << 10))
#define HCI_READ_INQUIRY_SCAN_TYPE (0x42 | (HCI_CONTROL << 10))
#define HCI_WRITE_INQUIRY_SCAN_TYPE (0x43 | (HCI_CONTROL << 10))
#define HCI_READ_INQUIRY_MODE (0x44 | (HCI_CONTROL << 10))
#define HCI_WRITE_INQUIRY_MODE (0x45 | (HCI_CONTROL << 10))
#define HCI_READ_PAGE_SCAN_TYPE (0x46 | (HCI_CONTROL << 10))
#define HCI_WRITE_PAGE_SCAN_TYPE (0x47 | (HCI_CONTROL << 10))
#define HCI_READ_AFH_CHANNEL_ASSESSMENT_MODE (0x48 | (HCI_CONTROL << 10))
#define HCI_WRITE_AFH_CHANNEL_ASSESSMENT_MODE (0x49 | (HCI_CONTROL << 10))
#define HCI_READ_ANONYMITY_MODE (0x4A | (HCI_CONTROL << 10))
#define HCI_WRITE_ANONYMITY_MODE (0x4B | (HCI_CONTROL << 10))
#define HCI_READ_ALIAS_AUTHENTICATION_ENABLE (0x4C | (HCI_CONTROL << 10))
#define HCI_WRITE_ALIAS_AUTHENTICATION_ENABLE (0x4D | (HCI_CONTROL << 10))
#define HCI_READ_ANONYMOUS_ADDRESS_CHANGE_PARAMETERS (0x4E | (HCI_CONTROL << 10))
#define HCI_WRITE_ANONYMOUS_ADDRESS_CHANGE_PARAMETERS (0x4F | (HCI_CONTROL << 10))
#define HCI_RESET_FIXED_ADDRESS_ATTEMPT_COUNTER (0x50 | (HCI_CONTROL << 10))
#define HCI_READ_EXTENDED_INQUIRY_RESPONSE (0x51 | (HCI_CONTROL << 10))
#define HCI_WRITE_EXTENDED_INQUIRY_RESPONSE (0x52 | (HCI_CONTROL << 10))
#define HCI_REFRESH_ENCRYPTION_KEY (0x53 | (HCI_CONTROL << 10))
#define HCI_READ_SIMPLE_PAIRING_MODE (0x55 | (HCI_CONTROL << 10))
#define HCI_WRITE_SIMPLE_PAIRING_MODE (0x56 | (HCI_CONTROL << 10))
#define HCI_READ_LOCAL_OOB_DATA (0x57 | (HCI_CONTROL << 10))
#define HCI_READ_INQUIRY_RESPONSE_TRANSMIT_POWER_LEVEL (0x58 | (HCI_CONTROL << 10))
#define HCI_WRITE_INQUIRY_TRANSMIT_POWER_LEVEL (0x59 | (HCI_CONTROL << 10))
#define HCI_READ_DEFAULT_ERROUNEOUS_DATA_REPORTING (0x5A | (HCI_CONTROL << 10))
#define HCI_WRITE_DEFAULT_ERROUNEOUS_DATA_REPORTING (0x5B | (HCI_CONTROL << 10))
#define HCI_ENHANCED_FLUSH (0x5F | (HCI_CONTROL << 10))
#define HCI_SEND_KEYPRESS_NOTIFICATION (0x60 | (HCI_CONTROL << 10))
#define HCI_SET_EVENT_MASK_PAGE_2 (0x63 | (HCI_CONTROL << 10))
#define HCI_READ_LE_HOST_SUPPORTED (0x6C | (HCI_CONTROL << 10))
#define HCI_WRITE_LE_HOST_SUPPORTED (0x6D | (HCI_CONTROL << 10))
/** Connectionless_Slave_Broadcast cmd**/
#define HCI_SET_RESERVED_LT_ADDR (0x74 | (HCI_CONTROL << 10))
#define HCI_DELETE_RESERVED_LT_ADDR (0x75 | (HCI_CONTROL << 10))
#define HCI_SET_CONNECTIONLESS_SLAVE_BROADCAST_DATA (0x76 | (HCI_CONTROL << 10))
#define HCI_READ_SYNCHRONIZATION_TRAIN_PARAMETERS (0x77 | (HCI_CONTROL << 10))
#define HCI_WRITE_SYNCHRONIZATION_TRAIN_PARAMETERS (0x78 | (HCI_CONTROL << 10))
#define HCI_WRITE_SECURE_CONNECTIONS_HOST_SUPPORT (0x7A | (HCI_CONTROL << 10))
#define HCI_READ_LOCAL_VERSION_INFORMATION (0x01 | (HCI_INFORMATION << 10))
#define HCI_READ_LOCAL_SUPPORTED_COMMANDS (0x02 | (HCI_INFORMATION << 10))
#define HCI_READ_LOCAL_SUPPORTED_FEATURES (0x03 | (HCI_INFORMATION << 10))
#define HCI_READ_LOCAL_EXTENDED_FEATURES (0x04 | (HCI_INFORMATION << 10))
#define HCI_READ_BUFFER_SIZE (0x05 | (HCI_INFORMATION << 10))
#define HCI_READ_COUNTRY_CODE (0x07 | (HCI_INFORMATION << 10))
#define HCI_READ_BD_ADDR (0x09 | (HCI_INFORMATION << 10))
#define HCI_READ_FAILED_CONTACT_COUNTER (0x01 | (HCI_STATUS << 10))
#define HCI_RESET_FAILED_CONTACT_COUNTER (0x02 | (HCI_STATUS << 10))
#define HCI_GET_LINK_QUALITY (0x03 | (HCI_STATUS << 10))
#define HCI_READ_RSSI (0x05 | (HCI_STATUS << 10))
#define HCI_READ_AFH_CHANNEL_MAP (0x06 | (HCI_STATUS << 10))
#define HCI_READ_CLOCK (0x07 | (HCI_STATUS << 10))
#define HCI_READ_LOOPBACK_MODE (0x01 | (HCI_TESTING << 10))
#define HCI_WRITE_LOOPBACK_MODE (0x02 | (HCI_TESTING << 10))
#define HCI_ENABLE_DEVICE_UNDER_TEST_MODE (0x03 | (HCI_TESTING << 10))
#define HCI_WRITE_SIMPLE_PAIRING_DEBUG_MODE (0x04 | (HCI_TESTING << 10))
#define HCI_LE_SET_EVENT_MASK (0x01 | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_BUFFER_SIZE (0x02 | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_LOCAL_SUPPORTED_FEATURES (0x03 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_RANDOM_ADDRESS (0x05 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_ADVERTISING_PARAMETERS (0x06 | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_ADVERTISING_CHANNEL_TX_POWER (0x07 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_ADVERTISING_DATA (0x08 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_SCAN_RESPONSE_DATA (0x09 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_ADVERTISE_ENABLE (0x0A | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_SCAN_PARAMETERS (0x0B | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_SCAN_ENABLE (0x0C | (HCI_LE_CONTROL << 10))
#define HCI_LE_CREATE_CONNECTION (0x0D | (HCI_LE_CONTROL << 10))
#define HCI_LE_CREATE_CONNECTION_CANCEL (0x0E | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_WHITE_LIST_SIZE (0x0F | (HCI_LE_CONTROL << 10))
#define HCI_LE_CLEAR_WHITE_LIST (0x10 | (HCI_LE_CONTROL << 10))
#define HCI_LE_ADD_DEVICE_TO_WHITE_LIST (0x11 | (HCI_LE_CONTROL << 10))
#define HCI_LE_REMOVE_DEVICE_FROM_WHITE_LIST (0x12 | (HCI_LE_CONTROL << 10))
#define HCI_LE_CONNECTION_UPDATE (0x13 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_HOST_CHANNEL_CLASSIFICATION (0x14 | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_CHANNEL_MAP (0x15 | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_REMOTE_USED_FEATURES (0x16 | (HCI_LE_CONTROL << 10))
#define HCI_LE_ENCRYPT (0x17 | (HCI_LE_CONTROL << 10))
#define HCI_LE_RAND (0x18 | (HCI_LE_CONTROL << 10))
#define HCI_LE_START_ENCRYPTION (0x19 | (HCI_LE_CONTROL << 10))
#define HCI_LE_LONG_TERM_KEY_REQUEST_REPLY (0x1A | (HCI_LE_CONTROL << 10))
#define HCI_LE_LONG_TERM_KEY_REQUESTED_NEGATIVE_REPLY (0x1B | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_SUPPORTED_STATES (0x1C | (HCI_LE_CONTROL << 10))
#define HCI_LE_RECEIVER_TEST (0x1D | (HCI_LE_CONTROL << 10))
#define HCI_LE_TRANSMITTER_TEST (0x1E | (HCI_LE_CONTROL << 10))
#define HCI_LE_TEST_END (0x1F | (HCI_LE_CONTROL << 10))
#define HCI_LE_REMOTE_CONN_PARAM_REQUEST_REPLY (0x20 | (HCI_LE_CONTROL << 10))
#define HCI_LE_REMOTE_CONN_PARAM_REQUEST_NEGATIVE_REPLY (0x21 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_DATA_LENGTH (0x22 | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_SUGGESTED_DEFAULT_DATA_LENGTH (0x23 | (HCI_LE_CONTROL << 10))
#define HCI_LE_WRITE_SUGGESTED_DEFAULT_DATA_LENGTH (0x24 | (HCI_LE_CONTROL << 10))
#if 0
#define HCI_LE_READ_LOCAL_P256_PUBLIC_KEY (0x25 | (HCI_LE_CONTROL << 10))
#define HCI_LE_GENERATE_DHKEY (0x26 | (HCI_LE_CONTROL << 10))
#endif
#define HCI_LE_ADD_DEVICE_TO_RESOLVING_LIST (0x27 | (HCI_LE_CONTROL << 10))
#define HCI_LE_REMOVE_DEVICE_FROM_RESOLVING_LIST (0x28 | (HCI_LE_CONTROL << 10))
#define HCI_LE_CLEAR_RESOLVING_LIST (0x29 | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_RESOLVING_LIST_SIZE (0x2A | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_PEER_RESOLVABLE_ADDRESS (0x2B | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_LOCAL_RESOLVABLE_ADDRESS (0x2C | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_ADDRESS_RESOLUTION_ENABLE (0x2D | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_RESOLVABLE_PRIVATE_ADDRESS_TIMEOUT (0x2E | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_MAXIMUM_DATA_LENGTH (0x2F | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_PHY (0x30 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_DEFAULT_PHY (0x31 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_PHY (0x32 | (HCI_LE_CONTROL << 10))
#define HCI_LE_ENHANCED_RECEIVER_TEST (0x33 | (HCI_LE_CONTROL << 10))
#define HCI_LE_ENHANCED_TRANSMITTER_TEST (0x34 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_ADVERTISING_SET_RANDOM_ADDRESS (0x35 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_EXTENDED_ADVERTISING_PARAMETERS (0x36 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_EXTENDED_ADVERTISING_DATA (0x37 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_EXTENDED_SCAN_RESPONSE_DATA (0x38 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_EXTENDED_ADVERTISING_ENABLE (0x39 | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_MAXIMUM_ADVERTISING_DATA_LENGTH (0x3A | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_NUM_OF_SUPPORTED_ADVERTISING_SETS (0x3B | (HCI_LE_CONTROL << 10))
#define HCI_LE_REMOVE_ADVERTISING_SET (0x3C | (HCI_LE_CONTROL << 10))
#define HCI_LE_CLEAR_ADVERTISING_SETS (0x3D | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_PERIODIC_ADV_PARAMS (0x3E | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_PERIODIC_ADV_DATA (0x3F | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_PERIODIC_ADV_ENABLE (0x40 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_EXTENDED_SCAN_PARAMS (0x41 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_EXTENDED_SCAN_ENABLE (0x42 | (HCI_LE_CONTROL << 10))
#define HCI_LE_EXTENDED_CREATE_CONNECTION (0x43 | (HCI_LE_CONTROL << 10))
#define HCI_LE_PERIODIC_ADV_CREATE_SYNC (0x44 | (HCI_LE_CONTROL << 10))
#define HCI_LE_PERIODIC_ADV_CREATE_SYNC_CANCEL (0x45 | (HCI_LE_CONTROL << 10))
#define HCI_LE_PERIODIC_ADV_TERMINATE_SYNC (0x46 | (HCI_LE_CONTROL << 10))
#define HCI_LE_ADD_DEVICE_TO_PERIODIC_ADV_LIST (0x47 | (HCI_LE_CONTROL << 10))
#define HCI_LE_REMOVE_DEVICE_FROM_PERIODIC_ADV_LIST (0x48 | (HCI_LE_CONTROL << 10))
#define HCI_LE_CLEAR_PERIODIC_ADVERTISER_LIST (0x49 | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_PERIODIC_ADVERTISER_LIST_SIZE (0x4A | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_TRANSMIT_POWER (0x4B | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_RF_PATH_COMPENSATION (0x4C | (HCI_LE_CONTROL << 10))
#define HCI_LE_WRITE_RF_PATH_COMPENSATION (0x4D | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_PRIVACY_MODE (0x4E | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_SUPPL_RECEIVE_TEST_PARAMS (0x4F | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_SUPPL_TRANSMIT_TEST_PARAMS (0x50 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_CONNLESS_SUPPL_TRANSMIT_PARAMS (0x51 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_CONNLESS_SUPPL_TRANSMIT_ENABLE (0x52 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_CONNLESS_IQ_SAMPLING_ENABLE (0x53 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_CONN_SUPPL_RECEIVE_PARAMS (0x54 | (HCI_LE_CONTROL << 10))
#define HCI_LE_SET_CONN_SUPPL_TRANSMIT_PARAMS (0x55 | (HCI_LE_CONTROL << 10))
#define HCI_LE_CONN_SUPPL_REQUEST_ENABLE (0x56 | (HCI_LE_CONTROL << 10))
#define HCI_LE_CONN_SUPPL_RESPONSE_ENABLE (0x57 | (HCI_LE_CONTROL << 10))
#define HCI_LE_READ_ANTENNA_INFORMATION (0x58 | (HCI_LE_CONTROL << 10))
#define HCI_OP_VND_SET_BD_ADDR 0xFC0D
/** local supported commands: format: octet, bit */
/**--- octet 0 */
#define HCI_SUPPORTED_COMMANDS_INQUIRY 0*8+0
#define HCI_SUPPORTED_COMMANDS_INQUIRY_CANCEL 0*8+1
#define HCI_SUPPORTED_COMMANDS_PERIODIC_INQUIRY_MODE 0*8+2
#define HCI_SUPPORTED_COMMANDS_EXIT_PERIODIC_INQUIRY_MODE 0*8+3
#define HCI_SUPPORTED_COMMANDS_CREATE_CONNECTION 0*8+4
#define HCI_SUPPORTED_COMMANDS_DISCONNECT 0*8+5
#define HCI_SUPPORTED_COMMANDS_ADD_SCO_CONNECTION 0*8+6
#define HCI_SUPPORTED_COMMANDS_CANCEL_CREATE_CONNECTION 0*8+7
/**--- octet 1 */
#define HCI_SUPPORTED_COMMANDS_ACCEPT_CONNECTION_REQUEST 1*8+0
#define HCI_SUPPORTED_COMMANDS_REJECT_CONNECTION_REQUEST 1*8+1
#define HCI_SUPPORTED_COMMANDS_LINK_KEY_REQUEST_REPLY 1*8+2
#define HCI_SUPPORTED_COMMANDS_LINK_KEY_REQUEST_NEGATIVE_REPLY 1*8+3
#define HCI_SUPPORTED_COMMANDS_PIN_CODE_REQUEST_REPLY 1*8+4
#define HCI_SUPPORTED_COMMANDS_PIN_CODE_REQUEST_NEGATIVE_REPLY 1*8+5
#define HCI_SUPPORTED_COMMANDS_CHANGE_CONNECTION_PACKET_TYPE 1*8+6
#define HCI_SUPPORTED_COMMANDS_AUTHENTICATION_REQUEST 1*8+7
/**--- octet 2 */
#define HCI_SUPPORTED_COMMANDS_SET_CONNECTION_ENCRYPTION 2*8+0
#define HCI_SUPPORTED_COMMANDS_CHANGE_CONNECTION_LINK_KEY 2*8+1
#define HCI_SUPPORTED_COMMANDS_MASTER_LINK_KEY 2*8+2
#define HCI_SUPPORTED_COMMANDS_REMOTE_NAME_REQUEST 2*8+3
#define HCI_SUPPORTED_COMMANDS_CANCEL_REMOTE_NAME_REQUEST 2*8+4
#define HCI_SUPPORTED_COMMANDS_READ_REMOTE_SUPPORTED_FEATURES 2*8+5
#define HCI_SUPPORTED_COMMANDS_READ_REMOTE_EXTENDED_FEATURES 2*8+6
#define HCI_SUPPORTED_COMMANDS_READ_REMOTE_VERSION_INFORMATION 2*8+7
/**--- octet 3 */
#define HCI_SUPPORTED_COMMANDS_READ_CLOCK_OFFSET 3*8+0
#define HCI_SUPPORTED_COMMANDS_READ_LMP_HANDLE 3*8+1
#define HCI_SUPPORTED_COMMANDS_RESERVED3_2 3*8+2
#define HCI_SUPPORTED_COMMANDS_RESERVED3_3 3*8+3
#define HCI_SUPPORTED_COMMANDS_RESERVED3_4 3*8+4
#define HCI_SUPPORTED_COMMANDS_RESERVED3_5 3*8+5
#define HCI_SUPPORTED_COMMANDS_RESERVED3_6 3*8+6
#define HCI_SUPPORTED_COMMANDS_RESERVED3_7 3*8+7
/**--- octet 4 */
#define HCI_SUPPORTED_COMMANDS_RESERVED4_0 4*8+0
#define HCI_SUPPORTED_COMMANDS_HOLD_MODE 4*8+1
#define HCI_SUPPORTED_COMMANDS_SNIFF_MODE 4*8+2
#define HCI_SUPPORTED_COMMANDS_EXIT_SNIFF_MODE 4*8+3
#define HCI_SUPPORTED_COMMANDS_PARK_STATE 4*8+4
#define HCI_SUPPORTED_COMMANDS_EXIT_PARK_STATE 4*8+5
#define HCI_SUPPORTED_COMMANDS_QOS_SETUP 4*8+6
#define HCI_SUPPORTED_COMMANDS_ROLE_DISCOVERY 4*8+7
/**--- octet 5 */
#define HCI_SUPPORTED_COMMANDS_SWITCH_ROLE 5*8+0
#define HCI_SUPPORTED_COMMANDS_READ_LINK_POLICY_SETTING 5*8+1
#define HCI_SUPPORTED_COMMANDS_WRITE_LINK_POLICY_SETTING 5*8+2
#define HCI_SUPPORTED_COMMANDS_READ_DEFAULT_LINK_POLICY_SETTING 5*8+3
#define HCI_SUPPORTED_COMMANDS_WRITE_DEFAULT_LINK_POLICY_SETTING 5*8+4
#define HCI_SUPPORTED_COMMANDS_FLOW_SPECIFICATION 5*8+5
#define HCI_SUPPORTED_COMMANDS_SET_EVENT_MARK 5*8+6
#define HCI_SUPPORTED_COMMANDS_RESET 5*8+7
/**--- octet 6 */
#define HCI_SUPPORTED_COMMANDS_SET_EVENT_FILTER 6*8+0
#define HCI_SUPPORTED_COMMANDS_FLUSH 6*8+1
#define HCI_SUPPORTED_COMMANDS_READ_PIN_TYPE 6*8+2
#define HCI_SUPPORTED_COMMANDS_WRITE_PIN_TYPE 6*8+3
#define HCI_SUPPORTED_COMMANDS_CREATE_NEW_UNIT_KEY 6*8+4
#define HCI_SUPPORTED_COMMANDS_READ_STORED_LINK_KEY 6*8+5
#define HCI_SUPPORTED_COMMANDS_WRITE_STORED_LINK_KEY 6*8+6
#define HCI_SUPPORTED_COMMANDS_DELETE_STORED_LINK_KEY 6*8+7
/**--- octet 7 */
#define HCI_SUPPORTED_COMMANDS_WRITE_LOCAL_NAME 7*8+0
#define HCI_SUPPORTED_COMMANDS_READ_LOCAL_NAME 7*8+1
#define HCI_SUPPORTED_COMMANDS_READ_CONNECTION_ACCEPT_TIMEOUT 7*8+2
#define HCI_SUPPORTED_COMMANDS_WRITE_CONNECTION_ACCEPT_TIMEOUT 7*8+3
#define HCI_SUPPORTED_COMMANDS_READ_PAGE_TIMEOUT 7*8+4
#define HCI_SUPPORTED_COMMANDS_WRITE_PAGE_TIMEOUT 7*8+5
#define HCI_SUPPORTED_COMMANDS_READ_SCAN_ENABLE 7*8+6
#define HCI_SUPPORTED_COMMANDS_WRITE_SCAN_ENABLE 7*8+7
/**--- octet 8 */
#define HCI_SUPPORTED_COMMANDS_READ_PAGE_SCAN_ACTIVITY 8*8+0
#define HCI_SUPPORTED_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY 8*8+1
#define HCI_SUPPORTED_COMMANDS_READ_INQUIRY_SCAN_ACTIVITY 8*8+2
#define HCI_SUPPORTED_COMMANDS_WRITE_INQUIRY_SCAN_ACTIVITY 8*8+3
#define HCI_SUPPORTED_COMMANDS_READ_AUTHENTICATION_ENABLE 8*8+4
#define HCI_SUPPORTED_COMMANDS_WRITE_AUTHENTICATION_ENABLE 8*8+5
#define HCI_SUPPORTED_COMMANDS_READ_ENCRYPTION_MODE 8*8+6
#define HCI_SUPPORTED_COMMANDS_WRITE_ENCRYPTION_MODE 8*8+7
/**--- octet 9 */
#define HCI_SUPPORTED_COMMANDS_READ_CLASS_OF_DEVICE 9*8+0
#define HCI_SUPPORTED_COMMANDS_WRITE_CLASS_OF_DEVICE 9*8+1
#define HCI_SUPPORTED_COMMANDS_READ_VOICE_SETTING 9*8+2
#define HCI_SUPPORTED_COMMANDS_WRITE_VOICE_SETTING 9*8+3
#define HCI_SUPPORTED_COMMANDS_READ_AUTOMATIC_FLUSH_TIMEOUT 9*8+4
#define HCI_SUPPORTED_COMMANDS_WRITE_AUTOMATIC_FLUSH_TIMEOUT 9*8+5
#define HCI_SUPPORTED_COMMANDS_READ_NUM_BROADCAST_RETRANSMISSIONS 9*8+6
#define HCI_SUPPORTED_COMMANDS_WRITE_NUM_BROADCAST_RETRANSMISSIONS 9*8+7
/**--- octet 10 */
#define HCI_SUPPORTED_COMMANDS_READ_HOLD_MODE_ACTIVITY 10*8+0
#define HCI_SUPPORTED_COMMANDS_WRITE_HOLD_MODE_ACTIVITY 10*8+1
#define HCI_SUPPORTED_COMMANDS_READ_TRANSMIT_POWER_LEVEL 10*8+2
#define HCI_SUPPORTED_COMMANDS_READ_SYNCHRONOUS_FLOW_CONTROL_ENABLE 10*8+3
#define HCI_SUPPORTED_COMMANDS_WRITE_SYNCHRONOUS_FLOW_CONTROL_ENABLE 10*8+4
#define HCI_SUPPORTED_COMMANDS_SET_HOST_CONTROLLER_TO_HOST_FLOW_CONTROL 10*8+5
#define HCI_SUPPORTED_COMMANDS_HOST_BUFFER_SIZE 10*8+6
#define HCI_SUPPORTED_COMMANDS_HOST_NUMBER_OF_COMPLETED_PACKETS 10*8+7
/**--- octet 11 */
#define HCI_SUPPORTED_COMMANDS_READ_LINK_SUPERVISION_TIMEOUT 11*8+0
#define HCI_SUPPORTED_COMMANDS_WRITE_LINK_SUPERVISION_TIMEOUT 11*8+1
#define HCI_SUPPORTED_COMMANDS_READ_NUMBER_OF_SUPPORTED_IAC 11*8+2
#define HCI_SUPPORTED_COMMANDS_READ_CURRENT_IAC_LAP 11*8+3
#define HCI_SUPPORTED_COMMANDS_WRITE_CURRENT_IAC_LAP 11*8+4
#define HCI_SUPPORTED_COMMANDS_READ_PAGE_SCAN_PERIOD_MODE 11*8+5
#define HCI_SUPPORTED_COMMANDS_WRITE_PAGE_SCAN_PERIOD_MODE 11*8+6
#define HCI_SUPPORTED_COMMANDS_READ_PAGE_SCAN_MODE 11*8+7
/**--- octet 12 */
#define HCI_SUPPORTED_COMMANDS_WRITE_PAGE_SCAN_MODE 12*8+0
#define HCI_SUPPORTED_COMMANDS_SET_AFH_CHANNEL_CLASSIFICATION 12*8+1
#define HCI_SUPPORTED_COMMANDS_RESERVED12_2 12*8+2
#define HCI_SUPPORTED_COMMANDS_RESERVED12_3 12*8+3
#define HCI_SUPPORTED_COMMANDS_READ_INQUIRY_SCAN_TYPE 12*8+4
#define HCI_SUPPORTED_COMMANDS_WRITE_INQUIRY_SCAN_TYPE 12*8+5
#define HCI_SUPPORTED_COMMANDS_READ_INQUIRY_MODE 12*8+6
#define HCI_SUPPORTED_COMMANDS_WRITE_INQUIRY_MODE 12*8+7
/**--- octet 13 */
#define HCI_SUPPORTED_COMMANDS_READ_PAGE_SCAN_TYPE 13*8+0
#define HCI_SUPPORTED_COMMANDS_WRITE_PAGE_SCAN_TYPE 13*8+1
#define HCI_SUPPORTED_COMMANDS_READ_AFH_CHANNEL_ASSESSMENT_MODE 13*8+2
#define HCI_SUPPORTED_COMMANDS_WRITE_AFH_CHANNEL_ASSESSMENT_MODE 13*8+3
#define HCI_SUPPORTED_COMMANDS_RESERVED13_4 13*8+4
#define HCI_SUPPORTED_COMMANDS_RESERVED13_5 13*8+5
#define HCI_SUPPORTED_COMMANDS_RESERVED13_6 13*8+6
#define HCI_SUPPORTED_COMMANDS_RESERVED13_7 13*8+7
/**--- octet 14 */
#define HCI_SUPPORTED_COMMANDS_RESERVED14_0 14*8+0
#define HCI_SUPPORTED_COMMANDS_RESERVED14_1 14*8+1
#define HCI_SUPPORTED_COMMANDS_RESERVED14_2 14*8+2
#define HCI_SUPPORTED_COMMANDS_READ_LOCAL_VERSION_INFORMATION 14*8+3
#define HCI_SUPPORTED_COMMANDS_RESERVED14_4 14*8+4
#define HCI_SUPPORTED_COMMANDS_READ_LOCAL_SUPPORTED_FEATURES 14*8+5
#define HCI_SUPPORTED_COMMANDS_READ_LOCAL_EXTENDED_FEATURES 14*8+6
#define HCI_SUPPORTED_COMMANDS_READ_BUFFER_SIZE 14*8+7
/**--- octet 15 */
#define HCI_SUPPORTED_COMMANDS_READ_COUNTRY_CODE 15*8+0
#define HCI_SUPPORTED_COMMANDS_READ_BD_ADDRESS 15*8+1
#define HCI_SUPPORTED_COMMANDS_READ_FAILED_CONTACT_COUNT 15*8+2
#define HCI_SUPPORTED_COMMANDS_RESET_FAILED_CONTACT_COUNT 15*8+3
#define HCI_SUPPORTED_COMMANDS_GET_LINK_QUALITY 15*8+4
#define HCI_SUPPORTED_COMMANDS_READ_RSSI 15*8+5
#define HCI_SUPPORTED_COMMANDS_READ_AFH_CHANNEL_MAP 15*8+6
#define HCI_SUPPORTED_COMMANDS_READ_BD_CLOCK 15*8+7
/**--- octet 16 */
#define HCI_SUPPORTED_COMMANDS_READ_LOOPBACK_MODE 16*8+0
#define HCI_SUPPORTED_COMMANDS_WRITE_LOOPBACK_MODE 16*8+1
#define HCI_SUPPORTED_COMMANDS_ENABLE_DEVICE_UNDER_TEST_MODE 16*8+2
#define HCI_SUPPORTED_COMMANDS_SETUP_SYNCHRONOUS_CONNECTION 16*8+3
#define HCI_SUPPORTED_COMMANDS_ACCEPT_SYNCHRONOUS_CONNECTION 16*8+4
#define HCI_SUPPORTED_COMMANDS_REJECT_SYNCHRONOUS_CONNECTION 16*8+5
#define HCI_SUPPORTED_COMMANDS_RESERVED16_6 16*8+6
#define HCI_SUPPORTED_COMMANDS_RESERVED16_7 16*8+7
/** octet 22**/
#define HCI_SUPPORTED_COMMANDS_SET_EVENT_MASK_PAGE_2 22*8+2
/** octet 31**/
#define HCI_SUPPORTED_COMMANDS_SET_CSB 31*8+0
#define HCI_SUPPORTED_COMMANDS_SET_CSB_RECEIVE 31*8+1
#define HCI_SUPPORTED_COMMANDS_START_SYNC_TRIAN 31*8+2
#define HCI_SUPPORTED_COMMANDS_RECEIVE_SYNC_TRIAN 31*8+3
#define HCI_SUPPORTED_COMMANDS_SET_RESERVED_LT_ADDR 31*8+4
#define HCI_SUPPORTED_COMMANDS_DELETE_RESERVED_LT_ADDR 31*8+5
#define HCI_SUPPORTED_COMMANDS_SET_CSB_DATA 31*8+6
#define HCI_SUPPORTED_COMMANDS_READ_SYNC_TRAIN_PARAM 31*8+7
/** octet 32**/
#define HCI_SUPPORTED_COMMANDS_WRITE_SYNC_TRAIN_PARAM 32*8+0
/** HCI Event Codes */
#define HCI_INQUIRY_COMPLETE 0x01
#define HCI_INQUIRY_RESULT 0x02
#define HCI_CONNECTION_COMPLETE 0x03
#define HCI_CONNECTION_REQUEST 0x04
#define HCI_DISCONNECTION_COMPLETE 0x05
#define HCI_AUTHENTICATION_COMPLETE 0x06
#define HCI_REMOTE_NAME_REQUEST_COMPLETE 0x07
#define HCI_ENCRYPTION_CHANGE 0x08
#define HCI_CHANGE_CONNECTION_LINK_COMPLETE 0x09
#define HCI_MASTER_LINK_KEY_COMPLETE 0x0a
#define HCI_READ_REMOTE_FEATURES_COMPLETE 0x0b
#define HCI_READ_REMOTE_VERSION_COMPLETE 0x0c
#define HCI_QOS_SETUP_COMPLETE 0x0d
#define HCI_COMMAND_COMPLETE 0x0e
#define HCI_COMMAND_STATUS 0x0f
#define HCI_HARDWARE_ERROR 0x10
#define HCI_FLUSH_OCCURRED 0x11
#define HCI_ROLE_CHANGE 0x12
#define HCI_NUM_OF_COMPLETED_PACKETS 0x13
#define HCI_MODE_CHANGE 0x14
#define HCI_RETURN_LINK_KEYS 0x15
#define HCI_PIN_CODE_REQUEST 0x16
#define HCI_LINK_KEY_REQUEST 0x17
#define HCI_LINK_KEY_NOTIFICATION 0x18
#define HCI_LOOPBACK_COMMAND 0x19
#define HCI_DATA_BUFFER_OVERFLOW 0x1a
#define HCI_MAX_SLOTS_CHANGE 0x1b
#define HCI_READ_CLOCK_OFFSET_COMPLETE 0x1c
#define HCI_CONNECTION_PACKET_TYPE_CHANGED 0x1d
#define HCI_QOS_VIOLATION 0x1e
#define HCI_PAGE_SCAN_MODE_CHANGE 0x1f
#define HCI_PAGE_SCAN_REPETITION_CHANGE 0x20
#define HCI_FLOW_SPECIFICATION_COMPLETE 0x21
#define HCI_INQUIRY_RESULT_WITH_RSSI 0x22
#define HCI_READ_REMOTE_EXTENDED_FEATURES_COMPLETE 0x23
#define HCI_FIXED_ADDRESS 0x24
#define HCI_ALIAS_ADDRESS 0x25
#define HCI_GENERATE_ALIAS_REQUEST 0x26
#define HCI_ACTIVE_ADDRESS 0x27
#define HCI_ALLOW_PRIVATE_PAIRING 0x28
#define HCI_ALIAS_ADDRESS_REQUEST 0x29
#define HCI_ALIAS_NOT_RECOGNIZED_EVENT 0x2A
#define HCI_FIXED_ADDRESS_ATTEMPT_EVENT 0x2B
#define HCI_SYNCHRONOUS_CONNECTION_COMPLETE 0x2C
#define HCI_SYNCHRONOUS_CONNECTION_CHANGED 0x2D
#define HCI_SNIFF_SUBRATING_EVENT 0x2E
#define HCI_EXTENDED_INQUIRY_RESULT 0x2F
#define HCI_ENCRYPTION_KEY_REFRESH_COMPLETE 0x30
#define HCI_IO_CAPABILITY_REQUEST 0x31
#define HCI_IO_CAPABILITY_RESPONSE 0x32
#define HCI_USER_CONFIRMATION_REQUEST 0x33
#define HCI_USER_PASSKEY_REQUEST 0x34
#define HCI_REMOTE_OOB_DATA_REQUEST 0x35
#define HCI_SIMPLE_PAIRING_COMPLETE 0x36
#define HCI_LINK_SUPERVISION_TIMEOUT_CHANGED 0x38
#define HCI_ENHANCED_FLUSH_COMPLETE 0x39
#define HCI_USER_PASSKEY_NOTIFICATION 0x3B
#define HCI_KEYPRESS_NOTIFICATION 0x3C
#define HCI_REMOTE_HOST_SUPPORTED_FEATURES 0x3D
/** Connectionless_Slave_Broadcast **/
#define HCI_SYNCHRONIZATION_TRAIN_COMPLETE 0x4F
#define HCI_SYNCHRONIZATION_TRAIN_RECEIVED 0x50
#define HCI_CONNECTIONLESS_SLAVE_BROADCAST_RECEIVE 0x51
#define HCI_CONNECTIONLESS_SLAVE_BROADCAST_TIMEOUT 0x52
#define HCI_TRUNCATED_PAGE_COMPLETE 0x53
#define HCI_SLAVE_PAGE_RESPONSE_TIMEOUT 0x54
#define HCI_CSB_CHANNEL_MAP_CHANGE 0x55
#define HCI_LE_EVENT 0x3E
#define HCI_VENDOR_SPECIFIC_DBG_EVENT 0xFF
/** LE subevents */
#define HCI_LE_CONNECTION_COMPLETE_EVENT 0x01
#define HCI_LE_ADVERTISING_REPORT_EVENT 0x02
#define HCI_LE_CONNECTION_UPDATE_COMPLETE_EVENT 0x03
#define HCI_LE_READ_REMOTE_USED_FEATURES_COMPLETE_EVENT 0x04
#define HCI_LE_LONG_TERM_KEY_REQUEST_EVENT 0x05
#define HCI_LE_REMOTE_CONNECTION_PARAMETER_REQUEST_EVENT 0x06
#define HCI_LE_DATA_LENGTH_CHANGE_EVENT 0x07
#define HCI_LE_READ_LOCAL_P256_PUBLIC_KEY_COMPLETE 0x08
#define HCI_LE_GENERATE_DHKEY_COMPLETE 0x09
#define HCI_LE_ENHANCED_CONNECTION_COMPLETE 0x0A
#define HCI_LE_DIRECT_ADVERTISING_REPORT 0x0B
#define HCI_LE_PHY_UPDATE_COMPLETE_EVENT 0x0C
#define HCI_LE_EXTENDED_ADVERTISING_REPORT_EVENT 0x0D
#define HCI_LE_PERIODIC_ADV_SYNC_ESTABLISHED_EVENT 0x0E
#define HCI_LE_PERIODIC_ADV_SYNC_REPORT_EVENT 0x0F
#define HCI_LE_PERIODIC_ADV_SYNC_LOST_EVENT 0x10
#define HCI_LE_SCAN_TIMEOUT_EVENT 0x11
#define HCI_LE_ADVERTISING_SET_TERMINATED_EVENT 0x12
#define HCI_LE_SCAN_REQUEST_RECEIVED_EVENT 0x13
#define HCI_LE_CHANNEL_SELECTION_ALGORITHM_EVENT 0x14
#define HCI_LE_CONNECTIONLESS_IQ_REPORT_EVENT 0x15
#define HCI_LE_CONNECTION_IQ_REPORT_EVENT 0x16
#define HCI_LE_SUPPLEMENTAL_REQUEST_FAILED_EVENT 0x17
/** vendor subevent */
#define HCI_VENDOR_CSB_RX_DATA_NOTIFY_EVENT 0x36
#define HCI_VENDOR_CSB_TX_CMPL 0x37
/** Parameter Definition */
#define HCI_PACKET_TYPE_NO_2DH1 0x0002
#define HCI_PACKET_TYPE_NO_3DH1 0x0004
#define HCI_PACKET_TYPE_DM1 0x0008
#define HCI_PACKET_TYPE_DH1 0x0010
#define HCI_PACKET_TYPE_HV1 0x0020
#define HCI_PACKET_TYPE_HV2 0x0040
#define HCI_PACKET_TYPE_HV3 0x0080
#define HCI_PACKET_TYPE_NO_2DH3 0x0100
#define HCI_PACKET_TYPE_NO_3DH3 0x0200
#define HCI_PACKET_TYPE_DM3 0x0400
#define HCI_PACKET_TYPE_DH3 0x0800
#define HCI_PACKET_TYPE_NO_2DH5 0x1000
#define HCI_PACKET_TYPE_NO_3DH5 0x2000
#define HCI_PACKET_TYPE_DM5 0x4000
#define HCI_PACKET_TYPE_DH5 0x8000
#define HCI_ESCO_PACKET_TYPE_HV1 0x0001
#define HCI_ESCO_PACKET_TYPE_HV2 0x0002
#define HCI_ESCO_PACKET_TYPE_HV3 0x0004
#define HCI_ESCO_PACKET_TYPE_EV3 0x0008
#define HCI_ESCO_PACKET_TYPE_EV4 0x0010
#define HCI_ESCO_PACKET_TYPE_EV5 0x0020
/** Linktype Values (BT Core Spec, p. 710) */
#define HCI_LINK_TYPE_SCO 0x00
#define HCI_LINK_TYPE_ACL 0x01
#define HCI_LINK_TYPE_ESCO 0x02
/** hci filter type */
#define HCI_FILTER_TYPE_CLEAR_ALL 0x00
#define HCI_FILTER_TYPE_INQUIRY_RESULTS 0x01
#define HCI_FILTER_TYPE_CONNECTION_SETUP 0x02
/** HCI_FILTER_TYPE_INQUIRY_RESULTS: hci filter condition type */
#define HCI_INQUIRY_RESULTS_FILTER_CONDITION_TYPE_ALL 0x00
#define HCI_INQUIRY_RESULTS_FILTER_CONDITION_TYPE_COD 0x01
#define HCI_INQUIRY_RESULTS_FILTER_CONDITION_TYPE_BD_ADDR 0x02
/** HCI_FILTER_TYPE_CONNECTION_SETUP: hci filter condition type */
#define HCI_CONNECTION_SETUP_FILTER_CONDITION_TYPE_ALL 0x00
#define HCI_CONNECTION_SETUP_FILTER_CONDITION_TYPE_COD 0x01
#define HCI_CONNECTION_SETUP_FILTER_CONDITION_TYPE_BD_ADDR 0x02
/** HCI_CONNECTION_SETUP_FILTER_CONDITION_TYPE_ALL: hci filter condition */
#define HCI_CONNECTION_SETUP_FILTER_CONDITION_TYPE_ALL_DO_NOT_AUTO_ACCEPT 0x01
#define HCI_CONNECTION_SETUP_FILTER_CONDITION_TYPE_ALL_AUTO_ACCEPT_ROLE_SWITCH_DISABLED 0x02
#define HCI_CONNECTION_SETUP_FILTER_CONDITION_TYPE_ALL_AUTO_ACCEPT_ROLE_SWITCH_ENABLED 0x03
/** Write Voice Settings: Air Coding Format Definition */
#define HCI_AIRCODING_CVSD 0x0000
#define HCI_AIRCODING_ULAW 0x0001
#define HCI_AIRCODING_ALAW 0x0002
#define HCI_AIRCODING_TRANSPARENT 0x0003
/** Write Voice Settings: Linear Input Data Format */
#define HCI_INCODING_1COMP 0x0000
#define HCI_INCODING_2COMP 0x0040
#define HCI_INCODING_SIGNMAG 0x0080
/** Write Voice Settings: Linear Input Size */
#define HCI_INCODING_8BIT 0x0000
#define HCI_INCODING_16BIT 0x0020
/** Write Voice Settings: Input Coding Format Definition */
#define HCI_INCODING_LINEAR 0x0000
#define HCI_INCODING_ULAW 0x0100
#define HCI_INCODING_ALAW 0x0200
/** Write Link Policy Command: Policy Options */
#define HCI_LINK_POLICY_ENABLE_SWITCH 0x0001
#define HCI_LINK_POLICY_ENABLE_HOLD 0x0002
#define HCI_LINK_POLICY_ENABLE_SNIFF 0x0004
#define HCI_LINK_POLICY_ENABLE_PARK 0x0008
/** Mode Change Event, Link Status */
#define HCI_LINK_ACTIVE 0
#define HCI_LINK_HOLD 1
#define HCI_LINK_SNIFF 2
#define HCI_LINK_PARK 3
/** HCI Max User Payload */
#define HCI_DM1_PAYLOAD 17
#define HCI_DH1_PAYLOAD 27
#define HCI_2DH1_PAYLOAD 54
#define HCI_3DH1_PAYLOAD 83
#define HCI_DM3_PAYLOAD 121
#define HCI_DH3_PAYLOAD 183
#define HCI_DM5_PAYLOAD 224
#define HCI_DH5_PAYLOAD 339
#define HCI_2DH3_PAYLOAD 367
#define HCI_3DH3_PAYLOAD 552
#define HCI_2DH5_PAYLOAD 679
#define HCI_3DH5_PAYLOAD 1021
#endif /* _HCI_CODE_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/hci_code.h
|
C
|
apache-2.0
| 46,095
|
/**
* Copyright (c) 2015, Realsil Semiconductor Corporation. All rights reserved.
*/
#ifndef _HCI_DBG_H_
#define _HCI_DBG_H_
#include <stdio.h>
#include <string.h>
#ifdef __cplusplus
extern "C" {
#endif
#define HCI_PRINT_INFO(...)
#define HCI_PRINT_WARN(...)
#define HCI_PRINT_TRACE(...)
#define HCI_PRINT_ERROR printf
#ifdef __cplusplus
}
#endif
#endif /* _HCI_DBG_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/hci_dbg.h
|
C
|
apache-2.0
| 404
|
/**
* Copyright (c) 2015, Realsil Semiconductor Corporation. All rights reserved.
*/
#ifndef _HCI_IF_H_
#define _HCI_IF_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef enum
{
HCI_IF_EVT_OPENED, /* hci I/F open completed */
HCI_IF_EVT_CLOSED, /* hci I/F close completed */
HCI_IF_EVT_DATA_IND, /* hci I/F rx data indicated */
HCI_IF_EVT_DATA_XMIT, /* hci I/F tx data transmitted */
HCI_IF_EVT_ERROR, /* hci I/F error occurred */
} T_HCI_IF_EVT;
typedef bool (*P_HCI_IF_CALLBACK)(T_HCI_IF_EVT evt, bool status, uint8_t *p_buf, uint32_t len);
bool hci_if_open(P_HCI_IF_CALLBACK p_callback);
bool hci_if_close(void);
bool hci_if_write(uint8_t *p_buf, uint32_t len);
bool hci_if_confirm(uint8_t *p_buf);
#ifdef __cplusplus
}
#endif
#endif /* _HCI_IF_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/hci_if.h
|
C
|
apache-2.0
| 844
|
/**
* Copyright (c) 2017, Realsil Semiconductor Corporation. All rights reserved.
*
*/
#ifndef _HCI_PROCESS_H_
#define _HCI_PROCESS_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <string.h>
#include <stdbool.h>
typedef struct _HCI_PROCESS_TABLE_{
uint16_t opcode;
uint8_t (*start_pro)(void);
uint8_t (*check_func)(uint8_t len,uint8_t *p_buf);
}HCI_PROCESS_TABLE, *PHCI_PROCESS_TABLE;
typedef struct
{
uint32_t bt_baudrate;
uint32_t uart_baudrate;
} BAUDRATE_MAP;
#define HCI_TP_CHECK_ERROR 0xFF
#define HCI_TP_CONFIG_END 0x01
#define HCI_TP_CONFIG_FAIL 0x02
#define HCI_TP_CHECK_OK 0x00
#define HCI_TP_CHECK_AGAIN 0x03
#define HCI_TP_NOT_SEND 0x04
#define HCI_COMMAND_COMPLETE 0x0e
#define HCI_COMMAND_STATUS 0x0f
#define HCI_CMD_PKT 0x01
#define HCI_ACL_PKT 0x02
#define HCI_SCO_PKT 0x03
#define HCI_EVT_PKT 0x04
#define HCI_CMD_HDR_LEN 4 /* packet type (1), command (2), length (1) */
#define HCI_READ_LOCAL_VERSION_INFO 0x1001
#define HCI_VSC_READ_ROM_VERSION 0xFC6D
#define HCI_VSC_UPDATE_BAUDRATE 0xFC17
#define HCI_VSC_DOWNLOAD_PATCH 0xFC20
#define HCI_VSC_CHECK_32K 0xFC02
#define HCI_HCI_RESET 0x0C03
#define HCI_VENDOR_RF_RADIO_REG_WRITE 0xfd4a
#define HCI_VSC_VENDOR_IQK 0xFD91
#define HCI_VSC_READ_THERMAL 0xFC40
bool hci_rtk_tx_cb(void);
bool hci_adapter_send(uint8_t *p_buf, uint16_t len);
bool hci_set_patch(uint8_t *fw_addr,uint32_t fw_len, uint8_t *fw_config_addr, uint32_t
fw_config_len, uint32_t baudrate);
void reset_iqk_type(void);
#ifdef __cplusplus
}
#endif
#endif /* _HCI_PROCESS_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/hci_process.h
|
C
|
apache-2.0
| 1,881
|
/**
* Copyright (c) 2015, Realsil Semiconductor Corporation. All rights reserved.
*/
#ifndef _HCI_PROTO_H_
#define _HCI_PROTO_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#define HCI_IF_TASK_PRIORITY 5
#define HCI_IF_STACK_SIZE 0x400
#define HCI_IF_MSG_OPEN 0x01 /* hci I/F open request */
#define HCI_IF_MSG_CLOSE 0x02 /* hci I/F close request */
#define HCI_IF_MSG_READY 0x03 /* hci I/F open succeeded */
#define HCI_IF_MSG_FAIL 0x04 /* hci I/F open failed */
#define HCI_IF_MSG_TX_REQ 0x05 /* hci I/F xmit request */
#define HCI_IF_MSG_TX_RSP 0x06 /* hci I/F xmit response */
#define HCI_IF_MSG_RX_IND 0x07 /* hci I/F rx indicate */
#define HCI_IF_MSG_RX_CFM 0x08 /* hci I/F rx confirm */
typedef enum
{
HCI_IF_STATE_IDLE,
HCI_IF_STATE_OPEN,
HCI_IF_STATE_READY,
} T_HCI_IF_STATE;
typedef struct
{
uint8_t *p_buf;
uint16_t len;
} T_HCI_XMIT_DATA;
typedef void (*P_HCI_PROTO_OPEN)(void);
typedef void (*P_HCI_PROTO_CLOSE)(void);
typedef bool (*P_HCI_PROTO_SEND)(uint8_t *p_buf, uint16_t len);
typedef void (*P_HCI_PROTO_RECV)(void);
typedef void (*P_HCI_PROTO_CFM)(void);
typedef struct
{
P_HCI_PROTO_OPEN open;
P_HCI_PROTO_CLOSE close;
P_HCI_PROTO_SEND send;
P_HCI_PROTO_RECV recv;
P_HCI_PROTO_CFM cfm;
} T_HCI_PROTO;
typedef struct
{
T_HCI_IF_STATE state; /* hci I/F state */
void *task_handle; /* hci I/F task handle */
void *msg_q; /* task msg queue */
void *xmit_q; /* tx req queue */
void *cfm_q; /* rx cfm queue */
uint8_t *tx_buf; /* tx buffer pointer */
uint16_t tx_len; /* tx buffer length */
P_HCI_IF_CALLBACK callback; /* hci I/F event callback */
const T_HCI_PROTO *proto; /* hci h4/h5 proto interfaces */
} T_HCI_IF;
extern T_HCI_IF hci_if;
extern const T_HCI_PROTO hci_h4_proto;
#ifdef __cplusplus
}
#endif
#endif /* _HCI_PROTO_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/hci_proto.h
|
C
|
apache-2.0
| 2,305
|
/**
* Copyright (c) 2015, Realsil Semiconductor Corporation. All rights reserved.
*/
#ifndef _HCI_TP_H_
#define _HCI_TP_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef bool (*P_HCI_TP_OPEN_CB)(bool status);
typedef bool (*P_HCI_TP_TX_CB)(void);
typedef bool (*P_HCI_TP_RX_IND)(void);
void hci_tp_open(P_HCI_TP_OPEN_CB open_cb, P_HCI_TP_RX_IND rx_ind);
void hci_tp_close(void);
void hci_tp_del(void);
void hci_tp_config(uint8_t *p_buf, uint16_t len);
bool hci_tp_send(uint8_t *p_buf, uint16_t len, P_HCI_TP_TX_CB tx_cb);
uint16_t hci_tp_recv(uint8_t *p_buf, uint16_t size);
void hci_tp_set_rx_ind(void (*ready_to_rx)(void));
#ifdef __cplusplus
}
#endif
#endif /* _HCI_TP_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/hci_tp.h
|
C
|
apache-2.0
| 775
|
/**
* Copyright (c) 2017, Realsil Semiconductor Corporation. All rights reserved.
*
*/
#ifndef _HCI_UART_H_
#define _HCI_UART_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include <string.h>
#include <stdbool.h>
#include <stdint.h>
typedef bool (*P_UART_TX_CB)(void);
typedef bool (*P_UART_RX_CB)(void);
bool hci_uart_init(P_UART_RX_CB rx_ind);
bool hci_uart_deinit(void);
uint16_t hci_uart_recv(uint8_t *p_buf, uint16_t size);
bool hci_uart_tx(uint8_t *p_buf, uint16_t len, P_UART_TX_CB tx_cb);
void hci_uart_set_baudrate(uint32_t baudrate);
void hci_uart_set_rx_ind(P_UART_RX_CB rx_ind);
void set_hci_uart_out(bool flag);
bool hci_uart_tx_bridge(uint8_t rc);
bool hci_uart_rx_bridge(uint8_t rc);
#ifdef __cplusplus
}
#endif
#endif /* _HCI_UART_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/hci_uart.h
|
C
|
apache-2.0
| 831
|
/**
*****************************************************************************************
* Copyright(c) 2017, Realtek Semiconductor Corporation. All rights reserved.
*****************************************************************************************
* @file Mem_types.h
* @brief define memory types for RAM
* @date 2017.6.6
* @version v1.0
* *************************************************************************************
* @attention
* <h2><center>© COPYRIGHT 2017 Realtek Semiconductor Corporation</center></h2>
* *************************************************************************************
*/
#ifndef _MEM_TYPES_H_
#define _MEM_TYPES_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup MEM_CONFIG Memory Configure
* @{
*/
/*============================================================================*
* Types
*============================================================================*/
/** @defgroup MEM_CONFIG_Exported_Types Memory Configure Exported Types
* @{
*/
typedef enum
{
RAM_TYPE_DATA_ON = 0,
RAM_TYPE_DATA_OFF = 1,
RAM_TYPE_BUFFER_ON = 2,
RAM_TYPE_BUFFER_OFF = 3,
RAM_TYPE_NUM = 4
} RAM_TYPE;
/** @} */ /* End of group MEM_TYPES_Exported_Types */
/** @} */ /* End of group MEM_CONFIG */
#ifdef __cplusplus
}
#endif
#endif /* _MEM_TYPES_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/mem_types.h
|
C
|
apache-2.0
| 1,465
|
/*
* Copyright (c) 2015, Realsil Semiconductor Corporation. All rights reserved.
*/
#ifndef _OSIF_H_
#define _OSIF_H_
#ifdef __cplusplus
extern "C" {
#endif
#ifndef false
#define false 0
#endif
#ifndef true
#define true (!false)
#endif
#ifndef bool
#define bool unsigned char
#endif
#ifndef CONFIG_PLATFORM_8721D
#define CONFIG_PLATFORM_8721D
#endif
#include <mem_types.h>
void *os_mem_alloc_intern(RAM_TYPE ram_type, size_t size,
const char *p_func, uint32_t file_line);
void *os_mem_zalloc_intern(RAM_TYPE ram_type, size_t size,
const char *p_func, uint32_t file_line);
void os_mem_free(void *p_block);
size_t os_mem_peek(RAM_TYPE ram_type);
bool os_msg_queue_create_intern(void **pp_handle, uint32_t msg_num, uint32_t msg_size,
const char *p_func, uint32_t file_line);
bool os_msg_queue_delete_intern(void *p_handle, const char *p_func, uint32_t file_line);
bool os_msg_send_intern(void *p_handle, void *p_msg, uint32_t wait_ms,
const char *p_func, uint32_t file_line);
bool os_msg_recv_intern(void *p_handle, void *p_msg, uint32_t wait_ms,
const char *p_func, uint32_t file_line);
bool os_task_create(void **pp_handle, const char *p_name, void (*p_routine)(void *),
void *p_param, uint16_t stack_size, uint16_t priority);
bool os_task_delete(void *p_handle);
void os_delay(uint32_t ms);
bool os_sem_create(void **pp_handle, uint32_t init_count, uint32_t max_count);
bool os_sem_delete(void *p_handle);
bool os_sem_take(void *p_handle, uint32_t wait_ms);
bool os_sem_give(void *p_handle);
#define os_mem_alloc(ram_type, size) \
os_mem_alloc_intern(ram_type, size, __func__, __LINE__)
#define os_mem_zalloc(ram_type, size) \
os_mem_zalloc_intern(ram_type, size, __func__, __LINE__)
#define os_msg_queue_create(pp_handle, msg_num, msg_size) \
os_msg_queue_create_intern(pp_handle, msg_num, msg_size, __func__, __LINE__)
#define os_msg_queue_delete(p_handle) \
os_msg_queue_delete_intern(p_handle, __func__, __LINE__)
#define os_msg_send(p_handle, p_msg, wait_ms) \
os_msg_send_intern(p_handle, p_msg, wait_ms, __func__, __LINE__)
#define os_msg_recv(p_handle, p_msg, wait_ms) \
os_msg_recv_intern(p_handle, p_msg, wait_ms, __func__, __LINE__)
#endif /* _OSIF_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/osif_customer.h
|
C
|
apache-2.0
| 2,397
|
/**
*****************************************************************************************
* Copyright(c) 2017, Realtek Semiconductor Corporation. All rights reserved.
************************************************************************************************************
* @file platform_utils.h
* @brief utility helper function for user application
* @author lory_xu
* @date 2017-02
* @version v1.0
***************************************************************************************
* @attention
* <h2><center>© COPYRIGHT 2017 Realtek Semiconductor Corporation</center></h2>
***************************************************************************************
*/
#ifndef _PLATFORM_UTILS_H_
#define _PLATFORM_UTILS_H_
#ifdef __cplusplus
extern "C" {
#endif
/*============================================================================*
* Header Files
*============================================================================*/
#include <stdint.h>
#include <stdbool.h>
/** @defgroup PLATFORM_UTILS Platform Utilities
* @brief Utility helper functions
* @{
*/
/*============================================================================*
* Functions
*============================================================================*/
/** @defgroup PLATFORM_UTILS_Exported_Functions Platform Utilities Exported Functions
* @brief
* @{
*/
/**
* @brief Generate random number given max number allowed
* @param max to specify max number that allowed
* @return random number
*/
extern uint32_t platform_random(uint32_t max);
/** @} */ /* End of group PLATFORM_UTILS_Exported_Functions */
/** @} */ /* End of group PLATFORM_UTILS */
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/inc/platform_utils.h
|
C
|
apache-2.0
| 1,893
|
/**
* Copyright (c) 2015, Realsil Semiconductor Corporation. All rights reserved.
*/
#include <stdint.h>
#include <string.h>
#include <stdbool.h>
#include <stdio.h>
#include <stdarg.h>
#include <mem_types.h>
#include "aos/kernel.h"
#include <aos/errno.h>
#include "k_api.h"
#define HCI_OS_DBG
void *os_mem_alloc_intern(RAM_TYPE ram_type, size_t size,
const char *p_func, uint32_t file_line)
{
HCI_OS_DBG("%s %d: %s\r\n",p_func, file_line, __func__);
return aos_malloc(size);
}
void *os_mem_zalloc_intern(RAM_TYPE ram_type, size_t size,
const char *p_func, uint32_t file_line)
{
HCI_OS_DBG("%s %d: %s\r\n",p_func, file_line, __func__);
void *ptr = aos_zalloc(size);
if (ptr == NULL) {
printf("os_mem_alloc_intern failed\n");
}
return ptr;
}
void os_mem_free(void *p_block)
{
aos_free(p_block);
}
size_t os_mem_peek(RAM_TYPE ram_type)
{
extern k_mm_head *g_kmm_head;
return g_kmm_head->free_size;
}
typedef struct xqueue_desc_t {
aos_queue_t queue_hdl;
int message_size;
char *buf;
} xqueue_desc;
bool os_msg_queue_create_intern(void **pp_handle, uint32_t msg_num, uint32_t msg_size,
const char *p_func, uint32_t file_line)
{
HCI_OS_DBG("%s %d: %s\r\n",p_func, file_line, __func__);
char *buf = aos_malloc(msg_size * msg_num);
if (buf == NULL) {
return false;
}
xqueue_desc *desc = aos_malloc(sizeof(xqueue_desc));
desc->message_size = msg_size;
desc->buf = buf;
if (aos_queue_new(&desc->queue_hdl, buf, msg_size * msg_num, msg_size) != 0) {
aos_free(desc);
aos_free(buf);
return false;
}
*pp_handle = desc;
return true;
}
bool os_msg_queue_delete_intern(void *p_handle, const char *p_func, uint32_t file_line)
{
HCI_OS_DBG("%s %d: %s\r\n",p_func, file_line, __func__);
xqueue_desc *desc = (xqueue_desc *)p_handle;
aos_queue_free(&desc->queue_hdl);
aos_free(desc->buf);
aos_free(desc);
return true;
}
bool os_msg_send_intern(void *p_handle, void *p_msg, uint32_t wait_ms,
const char *p_func, uint32_t file_line)
{
HCI_OS_DBG("%s %d: %s\r\n",p_func, file_line, __func__);
xqueue_desc *desc = (xqueue_desc *)p_handle;
if (aos_queue_send(&desc->queue_hdl, p_msg, desc->message_size) == 0)
return true;
else
return false;
}
bool os_msg_recv_intern(void *p_handle, void *p_msg, uint32_t wait_ms,
const char *p_func, uint32_t file_line)
{
HCI_OS_DBG("%s %d: %s\r\n",p_func, file_line, __func__);
xqueue_desc *desc = (xqueue_desc *)p_handle;
if (wait_ms == 0xFFFFFFFF)
wait_ms = 1000 * 1000 * 1000;
if (aos_queue_recv(&desc->queue_hdl, wait_ms, p_msg, (size_t*)&desc->message_size) == 0)
return true;
else
return false;
}
bool os_task_create(void **pp_handle, const char *p_name, void (*p_routine)(void *),
void *p_param, uint16_t stack_size, uint16_t priority)
{
int ret = 0;
ret = aos_task_new_ext((aos_task_t*)pp_handle, p_name, p_routine, p_param, stack_size * 4, AOS_DEFAULT_APP_PRI - priority + 8);
if (ret != 0) {
printf("Create Task \"%s\" Failed! ret=%d\n", p_name, ret);
}
HCI_OS_DBG("Create Task \"%s\"\n", p_name);
if (ret == 0) {
return true;
} else {
return false;
}
}
bool os_task_delete(void *p_handle)
{
int ret = 0;
ret = aos_task_delete(&p_handle);
if (ret == 0) {
return true;
} else {
return false;
}
}
void os_delay(uint32_t ms)
{
aos_msleep(ms);
}
bool os_sem_create(void **pp_handle, uint32_t init_count, uint32_t max_count)
{
aos_sem_t *aos_sema = aos_malloc(sizeof(aos_sem_t));
if (aos_sem_new(aos_sema, init_count) == 0) {
*pp_handle = aos_sema;
return true;
} else
return false;
}
bool os_sem_delete(void *p_handle)
{
if (p_handle != NULL) {
aos_sem_free(p_handle);
aos_free(p_handle);
}
p_handle = NULL;
return true;
}
bool os_sem_take(void *p_handle, uint32_t wait_ms)
{
if(wait_ms == 0xFFFFFFFF) {
wait_ms = AOS_WAIT_FOREVER;
}
if (aos_sem_wait(p_handle, wait_ms) == 0)
return true;
else
return false;
}
bool os_sem_give(void *p_handle)
{
aos_sem_signal(p_handle);
return true;
}
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/os/osif_customer.c
|
C
|
apache-2.0
| 4,461
|
/*
* Copyright (C) 2015-2021 Alibaba Group Holding Limited
*/
#ifndef __BT_VENDOR_DRV_H_
#define __BT_VENDOR_DRV_H_
#include <stdio.h>
#include <stdint.h>
#include "osif_customer.h"
#include "hci_if.h"
#include "hci_tp.h"
#include "wifi_conf.h"
bool bt_vendor_open_flag = false;
void *bt_vendor_open_sem = NULL;
void *bt_vendor_tx_sem = NULL;
unsigned int sleep(unsigned int seconds);
extern void hci_if_del_task(void);
extern void hci_if_deinit(void);
static bool bt_vendor_init_callback(T_HCI_IF_EVT evt, bool status, uint8_t *p_buf, uint32_t len)
{
if (evt == HCI_IF_EVT_OPENED) {
if (status == true) {
printf("hci_if_open success\r\n");
} else {
printf("hci_if_open fail\r\n");
}
bt_vendor_open_flag = status;
os_sem_give(bt_vendor_open_sem);
} else {
printf("Other event enter bt_vendor_init_callback! evt = 0x%x, status = 0x%x\r\n", evt, status);
}
}
static bool bt_vendor_tx_callback(void)
{
os_sem_give(bt_vendor_tx_sem);
}
/**
* 初始化BT驱动、加载patch、调节Coex，其他厂家IC初始化的操作
*
* @return 操作状态，0代表成功，其他值表示失败
*/
int bt_vendor_drv_bring_up(void)
{
int ret = 0;
if(bt_vendor_open_flag == true) {
printf("no need to bt_vendor_drv_bring_up again!\r\n");
return 1;
}
if (os_sem_create(&bt_vendor_open_sem, 0, 1) != true) {
printf("Init bt_vendor_open_sem error!\r\n");
return 1;
}
wifi_on(1);
sleep(1);
hci_if_open(bt_vendor_init_callback);
if (os_sem_take(bt_vendor_open_sem, 0xFFFFFFFF) == true) {
if (bt_vendor_open_flag == true) {
if (os_sem_create(&bt_vendor_tx_sem, 1, 1) != true) {
printf("Init bt_vendor_tx_sem error!\r\n");
ret = 1;
}
} else {
ret = 1;
}
} else {
printf("Take bt_vendor_open_sem error!\r\n");
ret = 1;
}
os_sem_delete(bt_vendor_open_sem);
hci_if_del_task();
hci_if_deinit();
return ret;
}
/**
* 设置RX事件回调，BT Driver收到EVENT/ACL数据后，通过此接口通知BT Stack进行读取操作
* @param[in] ready_to_rx 回调函数
* @return 操作状态，0代表成功，其他值表示失败
*/
int bt_vendor_drv_set_rx_ind(void (*ready_to_rx)(void))
{
if (bt_vendor_open_flag == true) {
hci_tp_set_rx_ind(ready_to_rx);
} else {
printf("must call after bt_vendor_drv_bring_up\r\n");
}
}
/**
* 从BT Controller读取EVENT/ACL数据
* @param[out] data 数据保存的起始内存地址
* @param[in] len 期望读取的数据长度
* @return 实际读取的数据长度
*/
size_t bt_vendor_drv_rx(uint8_t *data, size_t len)
{
return hci_tp_recv(data, len);
}
/**
* BT Stack通过此接口往Controller发送数据
* @param[in] data 数据的起始内存地址
* @param[in] len 期望发送的数据长度
* @param[in] reserve NULL
* @return 实际发送的数据长度
*/
size_t bt_vendor_drv_tx(uint8_t *data, size_t len, void *reserve)
{
os_sem_take(bt_vendor_tx_sem, 0xFFFFFFFF);
hci_tp_send(data, len, bt_vendor_tx_callback);
return len;
}
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/src/bt_vendor_drv.c
|
C
|
apache-2.0
| 3,192
|
/**
* Copyright (c) 2017, Realsil Semiconductor Corporation. All rights reserved.
*
*/
#include <stdio.h>
#include <string.h>
//#include "os_mem.h"
#include "osif_customer.h"
#include "hci_tp.h"
#include "hci_process.h"
#include "bt_types.h"
#include "hci_dbg.h"
#include "hci_uart.h"
#include "bt_board.h"
#include "hci_board.h"
//#include "trace_app.h"
typedef struct
{
P_HCI_TP_OPEN_CB open_cb;
uint8_t *tx_buf;
} T_HCI_UART;
T_HCI_UART hci_rtk;
T_HCI_UART *p_hci_rtk = &hci_rtk;
uint8_t g_hci_step = 0;
extern HCI_PROCESS_TABLE hci_process_table[];
extern uint8_t hci_total_step;
extern bool hci_board_complete(void);
//================================internal===========================
bool hci_rtk_tx_cb(void)
{
if (p_hci_rtk->tx_buf != NULL)
{
os_mem_free(p_hci_rtk->tx_buf);
p_hci_rtk->tx_buf = NULL;
}
return true;
}
//=================================external==========================
bool hci_adapter_send(uint8_t *p_buf, uint16_t len)
{
p_hci_rtk->tx_buf = p_buf;
return hci_tp_send(p_buf, len, hci_rtk_tx_cb);
}
//====================hci_tp.h================
void hci_tp_open(P_HCI_TP_OPEN_CB open_cb, P_HCI_TP_RX_IND rx_ind)
{
uint8_t ret = 0xff;
p_hci_rtk->open_cb = open_cb;
if(hci_board_init() == false)
{
hci_board_debug("%s:hci_board_init fail\n", __FUNCTION__);
p_hci_rtk->open_cb(false);
return;
}
bt_reset();
if(!hci_uart_init(rx_ind))
{
hci_board_debug("%s:uart_init fail\n", __FUNCTION__);
p_hci_rtk->open_cb(false);
return;
}
g_hci_step = 0;
ret = hci_process_table[g_hci_step].start_pro();
if(ret == HCI_TP_NOT_SEND)
{
g_hci_step++;
hci_process_table[g_hci_step].start_pro();
}
else
{
//NORMAL START
}
}
void hci_tp_close(void)
{
HCI_PRINT_INFO("hci_tp_close");
bt_power_off();
hci_uart_deinit();
return;
}
void hci_tp_set_rx_ind(void (*ready_to_rx)(void))
{
hci_board_debug("hci_tp_set_rx_ind\r\n");
hci_uart_set_rx_ind((P_UART_RX_CB)ready_to_rx);
return;
}
void hci_tp_del(void)
{
HCI_PRINT_INFO("hci_tp_del");
bt_power_off();
hci_uart_deinit();
return;
}
bool hci_tp_send(uint8_t *p_buf, uint16_t len, P_HCI_TP_TX_CB tx_cb)
{
return hci_uart_tx(p_buf, len, tx_cb);
}
uint16_t hci_tp_recv(uint8_t *p_buf, uint16_t size)
{
return hci_uart_recv(p_buf, size);
}
void hci_tp_config(uint8_t *p_buf, uint16_t len)
{
(void)len;
uint8_t pkt_type;
uint8_t evt_code;
uint16_t opcode;
uint8_t status;
uint8_t p_buf_len;
//hci_board_debug("hci tp config: state %08x\n", hci_hardware.state);
//HCI_PRINT_INFO("hci_tp_config: state %u, %b", hci_rtk.state, TRACE_BINARY(len, p_buf));
LE_STREAM_TO_UINT8(pkt_type, p_buf);
if (pkt_type != HCI_EVT_PKT)
{
/* Skip non-hci event pkt. */
hci_board_debug("\r\nERROR:%s:packet type is %x\n",__FUNCTION__, pkt_type);
return;
}
LE_STREAM_TO_UINT8(evt_code, p_buf);
LE_STREAM_TO_UINT8(p_buf_len, p_buf);
//STREAM_SKIP_LEN(p_buf, 1); /* Skip event len */
// hci_board_debug("\r\n%s:current step is %x, total step is %x\n",__FUNCTION__,g_hci_step,
// hci_total_step);
if (evt_code == HCI_COMMAND_COMPLETE)
{
STREAM_SKIP_LEN(p_buf, 1); /* Skip num of hci cmd pkts */
LE_STREAM_TO_UINT16(opcode, p_buf);
if (opcode == hci_process_table[g_hci_step].opcode)//check the opcode
{
LE_STREAM_TO_UINT8(status, p_buf);
if(status == 0)
{
if(hci_process_table[g_hci_step].check_func != NULL)
{
uint8_t ret;
ret = hci_process_table[g_hci_step].check_func(p_buf_len, p_buf);
switch(ret)
{
case HCI_TP_CHECK_OK:
goto hci_tp_config_ok;
break;
case HCI_TP_CHECK_AGAIN:
goto hci_tp_config_again;
break;
case HCI_TP_CONFIG_FAIL:
goto hci_tp_config_fail;
break;
case HCI_TP_CONFIG_END:
goto hci_tp_config_end;
break;
case HCI_TP_CHECK_ERROR:
p_hci_rtk->open_cb(false);
return;
break;
default:
hci_board_debug("\r\n%s:unexpect status is %x\n",__FUNCTION__,ret);
break;
}
}
else
{
if(p_buf_len == 4)
{
//hci_board_debug("\r\n%s:no need check is %x\n",__FUNCTION__, g_hci_step);
}
//hci_board_debug("\r\n%s:no need check is %x\n",__FUNCTION__, g_hci_step);
}
hci_tp_config_ok:
//next step
g_hci_step++;
if(g_hci_step == hci_total_step)
{
hci_board_debug("\r\n%s:BT INIT success %x\n",__FUNCTION__,g_hci_step);
if(hci_board_complete() == true)
{
p_hci_rtk->open_cb(true);
}
else
{
p_hci_rtk->open_cb(false);
return;
}
}
else
{
if(hci_process_table[g_hci_step].start_pro != NULL)
{
uint8_t ret;
ret = hci_process_table[g_hci_step].start_pro();
while(ret == HCI_TP_NOT_SEND)
{
g_hci_step++;
ret = hci_process_table[g_hci_step].start_pro();
}
}
else
{
hci_board_debug("\r\nERROR:%s:start_pro is null %x\n",__FUNCTION__, g_hci_step);
}
}
}
else
{
hci_board_debug("\r\nERROR:%s:wrong status is %x, opcode is 0x%x\n",__FUNCTION__,
status,opcode);
}
}
else
{
hci_board_debug("\r\nERROR:%s:wrong type is %x\n",__FUNCTION__, opcode);
}
}
else
{
hci_board_debug("\r\nERROR:%s:unhandle evt is %x\n", __FUNCTION__ ,evt_code);
}
return;
hci_tp_config_fail:
p_hci_rtk->open_cb(false);
return;
hci_tp_config_end:
p_hci_rtk->open_cb(true);
return;
hci_tp_config_again:
hci_process_table[g_hci_step].start_pro();
return;
}
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/src/hci_adapter.c
|
C
|
apache-2.0
| 7,341
|
/**
* Copyright (c) 2017, Realsil Semiconductor Corporation. All rights reserved.
*
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
//#include "os_mem.h"
//#include "os_sync.h"
//#include "os_sched.h"
#include "osif_customer.h"
#include <mem_types.h>
#include "hci_process.h"
#include "hci_tp.h"
#include "hci_dbg.h"
#include "bt_board.h"
//#include "trace_app.h"
#include "bt_types.h"
#include "hci_board.h"
#include "hci_uart.h"
extern void hci_normal_start(void);
extern bool bt_check_iqk(void);
extern bool hci_start_iqk(void);
extern uint8_t hci_tp_lgc_efuse[0x20];
extern uint8_t hci_tp_phy_efuse[19];
static uint8_t vendor_flow;
static uint8_t iqk_type = 0xff;
static uint8_t orignal_thermal[3];
//====================hci_patch_util.c================
uint8_t hci_tp_read_local_ver(void)
{
uint8_t *p_cmd;
uint8_t *p;
HCI_PRINT_TRACE("hci_tp_read_local_ver");
hci_normal_start();
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, 4);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_READ_LOCAL_VERSION_INFO);
LE_UINT8_TO_STREAM(p, 0); /* length */
hci_adapter_send(p_cmd, p - p_cmd);
//hci_tp_send(p_cmd, p - p_cmd, hci_rtk_tx_cb);
return HCI_TP_CHECK_OK;
}
else
{
return HCI_TP_CONFIG_FAIL;
}
}
uint8_t hci_read_local_version_check(uint8_t len, uint8_t *p_buf)
{
(void)len;
uint16_t lmp_subver;
/* Skip status, hci version, hci revision, lmp version & manufacture name */
STREAM_SKIP_LEN(p_buf, 6);
LE_STREAM_TO_UINT16(lmp_subver, p_buf);
HCI_PRINT_INFO("hci_tp_config: lmp_subver 0x%04x", lmp_subver);
if (lmp_subver != BT_DEFAUT_LMP_SUBVER)
{
HCI_PRINT_ERROR("hci_tp_config: Patch already exists");
hci_board_debug("%s: Patch already exists\n",__FUNCTION__);
return HCI_TP_CONFIG_END;
}
else
{
//hci_board_debug("hci_tp_config: lmp_subver 0x%04x\n", lmp_subver);
return HCI_TP_CHECK_OK;
}
}
uint8_t hci_tp_read_rom_ver(void)
{
uint8_t *p_cmd;
uint8_t *p;
HCI_PRINT_TRACE("hci_tp_read_rom_ver");
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, 4);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_VSC_READ_ROM_VERSION);
LE_UINT8_TO_STREAM(p, 0); /* length */
hci_adapter_send(p_cmd, p - p_cmd);
}
else
{
return HCI_TP_CONFIG_FAIL;
}
return HCI_TP_CHECK_OK;
}
extern bool hci_rtk_find_patch(uint8_t bt_hci_chip_id);
uint8_t hci_read_rom_check(uint8_t len, uint8_t *p_buf)
{
(void)len;
bool ret = false;
uint8_t rom_version;
uint8_t bt_hci_chip_id;
LE_STREAM_TO_UINT8(rom_version, p_buf);
HCI_PRINT_INFO("hci_tp_config: rom_version 0x%02x", rom_version);
bt_hci_chip_id = rom_version + 1;
hci_board_debug("%s: rom_version 0x%04x, bt_hci_chip_id 0x%04x\n", __FUNCTION__, rom_version, bt_hci_chip_id);
ret = hci_rtk_find_patch(bt_hci_chip_id);
if(ret == false)
{
hci_board_debug("\r\n%s: error operate\r\n",__FUNCTION__);
return HCI_TP_CHECK_ERROR;
}
return HCI_TP_CHECK_OK;
}
uint8_t hci_tp_read_thermal(void)
{
uint8_t *p_cmd;
uint8_t *p;
HCI_PRINT_TRACE("hci_tp_read_thermal");
if (rltk_wlan_is_mp())
{
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, 4);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_VSC_READ_THERMAL);
LE_UINT8_TO_STREAM(p, 0); /* length */
hci_adapter_send(p_cmd, p - p_cmd);
}
else
{
return HCI_TP_CONFIG_FAIL;
}
return HCI_TP_CHECK_OK;
}
else
{
return HCI_TP_NOT_SEND;
}
}
static int freq_cmp(const void *a, const void *b)
{
int _a = *(int *) a;
int _b = *(int *) b;
if (_a == 0)
return 1;
if (_b == 0)
return -1;
return _a - _b;
}
uint8_t hci_thermal_check(uint8_t len, uint8_t *p_buf)
{
(void)len;
(void)p_buf;
uint8_t thermal;
LE_STREAM_TO_UINT8(thermal, p_buf);
if (vendor_flow > 2) /* fortime */
{
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
hci_board_debug("%s: thermal_check 0x%02x\n",__FUNCTION__,thermal);
}
qsort(orignal_thermal, 3, sizeof(uint8_t), freq_cmp);
hci_board_debug("\n\rthermal_check OK orignal_thermal[1] = %x\n", orignal_thermal[1]);
thermal = orignal_thermal[1]&0x3F;
hci_board_debug("\n\rthermal_check OK thermal = %x\n", thermal);
hci_tp_phy_efuse[7]=thermal;
vendor_flow = 0;
return HCI_TP_CHECK_OK;
}
else
{
if(!CHECK_SW(EFUSE_SW_DRIVER_DEBUG_LOG))
{
hci_board_debug("%s: thermal_check 0x%02x, time %x\n",__FUNCTION__,thermal, vendor_flow);
}
orignal_thermal[vendor_flow]=thermal;
vendor_flow++;
return HCI_TP_CHECK_AGAIN;
}
}
//==========================patch==========================
typedef struct
{
uint8_t *fw_buf;
uint8_t *config_buf;
uint8_t patch_frag_cnt;
uint8_t patch_frag_idx;
uint8_t patch_frag_len;
uint8_t patch_frag_tail;
uint16_t fw_len;
uint16_t config_len;
uint32_t baudrate;
}T_HCI_PATCH;
T_HCI_PATCH hci_patch_info;
#define PATCH_FRAGMENT_MAX_SIZE 252
bool hci_set_patch(uint8_t *fw_addr,uint32_t fw_len, uint8_t *fw_config_addr, uint32_t
fw_config_len, uint32_t baudrate)
{
T_HCI_PATCH *p_hci_patch = &hci_patch_info;
uint32_t svn_version, coex_version, lmp_subversion;
p_hci_patch->fw_len = fw_len;
p_hci_patch->fw_buf = fw_addr;
p_hci_patch->config_buf = fw_config_addr;
p_hci_patch->config_len = fw_config_len;
p_hci_patch->patch_frag_idx = 0;
p_hci_patch->baudrate = baudrate;
//p_hci_patch->config_len = 0;
LE_ARRAY_TO_UINT32(svn_version, (p_hci_patch->fw_buf+p_hci_patch->fw_len-8));
LE_ARRAY_TO_UINT32(coex_version, (p_hci_patch->fw_buf+p_hci_patch->fw_len-12));
LE_ARRAY_TO_UINT32(lmp_subversion, (p_hci_patch->fw_buf+p_hci_patch->fw_len-4));
p_hci_patch->patch_frag_cnt = (p_hci_patch->fw_len + p_hci_patch->config_len) / PATCH_FRAGMENT_MAX_SIZE;
p_hci_patch->patch_frag_tail = (p_hci_patch->fw_len + p_hci_patch->config_len) % PATCH_FRAGMENT_MAX_SIZE;
if (p_hci_patch->patch_frag_tail)
{
p_hci_patch->patch_frag_cnt += 1;
}
else
{
p_hci_patch->patch_frag_tail = PATCH_FRAGMENT_MAX_SIZE;
}
HCI_PRINT_INFO("hci_rtk_load_patch:svn %d patch frag count %u, tail len %u",svn_version,
p_hci_patch->patch_frag_cnt, p_hci_patch->patch_frag_tail);
HCI_PRINT_INFO("BT patch:svn %d coex svn_version: %x LMP VERSION:%x\n",(int)svn_version, (unsigned int)coex_version,(unsigned int)lmp_subversion);
if (rltk_wlan_is_mp())
{
hci_board_debug("BT patch:svn %d coex svn_version: %x LMP VERSION:%x\n",(int)svn_version, (unsigned int)coex_version,(unsigned int)lmp_subversion);
}
(void)coex_version;
(void)lmp_subversion;
return true;
}
uint8_t hci_tp_download_patch(void)
{
uint8_t *p_cmd;
uint8_t *p;
uint8_t *p_frag;
uint16_t sent_len;
T_HCI_PATCH *p_hci_rtk = &hci_patch_info;
if (p_hci_rtk->patch_frag_idx < p_hci_rtk->patch_frag_cnt)
{
if (p_hci_rtk->patch_frag_idx == p_hci_rtk->patch_frag_cnt - 1)
{
HCI_PRINT_TRACE("hci_tp_download_patch: send last frag");
//hci_board_debug("hci_tp_download_patch: send last frag\n");
p_hci_rtk->patch_frag_idx |= 0x80;
p_hci_rtk->patch_frag_len = p_hci_rtk->patch_frag_tail;
}
else
{
p_hci_rtk->patch_frag_len = PATCH_FRAGMENT_MAX_SIZE;
}
}
//hci_board_debug("hci_tp_download_patch: frag index %d, len %d\n",
// p_hci_rtk->patch_frag_idx, p_hci_rtk->patch_frag_len);
HCI_PRINT_TRACE("hci_tp_download_patch: frag index %d, len %d",
p_hci_rtk->patch_frag_idx, p_hci_rtk->patch_frag_len);
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, HCI_CMD_HDR_LEN + 1 + p_hci_rtk->patch_frag_len);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_VSC_DOWNLOAD_PATCH);
LE_UINT8_TO_STREAM(p, 1 + p_hci_rtk->patch_frag_len); /* length */
LE_UINT8_TO_STREAM(p, p_hci_rtk->patch_frag_idx); /* frag index */
sent_len = (p_hci_rtk->patch_frag_idx & 0x7F) * PATCH_FRAGMENT_MAX_SIZE;
if (sent_len >= p_hci_rtk->fw_len) /* config patch domain */
{
p_frag = p_hci_rtk->config_buf + sent_len -p_hci_rtk->fw_len;
memcpy(p, p_frag, p_hci_rtk->patch_frag_len);
}
else if (sent_len + p_hci_rtk->patch_frag_len <= p_hci_rtk->fw_len) /* fw patch domain */
{
p_frag = p_hci_rtk->fw_buf + sent_len;
memcpy(p, p_frag, p_hci_rtk->patch_frag_len);
}
else /* accross fw and config patch domains */
{
p_frag = p_hci_rtk->fw_buf + sent_len;
memcpy(p, p_frag, p_hci_rtk->fw_len - sent_len);
p += p_hci_rtk->fw_len - sent_len;
memcpy(p, p_hci_rtk->config_buf, p_hci_rtk->patch_frag_len + sent_len - p_hci_rtk->fw_len);
}
p_hci_rtk->patch_frag_idx++;
hci_adapter_send(p_cmd, HCI_CMD_HDR_LEN + 1 + p_hci_rtk->patch_frag_len);
//hci_tp_send(p_cmd, HCI_CMD_HDR_LEN + 1 + p_hci_rtk->patch_frag_len, hci_rtk_tx_cb);
}
else
{
hci_board_debug("%s:p_cmd is NULL \n", __FUNCTION__);
return HCI_TP_CONFIG_FAIL;
}
return HCI_TP_CHECK_OK;
}
uint8_t hci_download_patch_check(uint8_t len, uint8_t *p_buf)
{
(void)len;
uint8_t index;
LE_STREAM_TO_UINT8(index, p_buf);
T_HCI_PATCH *p_hci_rtk = &hci_patch_info;
if (index & 0x80) /* receive the last fragment completed evt */
{
HCI_PRINT_INFO("Download patch completely\n");
//hci_board_debug("Download patch completely\n");
os_mem_free(p_hci_rtk->fw_buf);
os_mem_free(p_hci_rtk->config_buf);
return HCI_TP_CHECK_OK;
}
else
{
return HCI_TP_CHECK_AGAIN;
}
}
uint8_t hci_tp_set_controller_baudrate(void)
{
uint8_t *p_cmd;
uint8_t *p;
T_HCI_PATCH *p_hci_rtk = &hci_patch_info;
HCI_PRINT_TRACE("hci_tp_set_controller_baudrate: baudrate 0x%08x", p_hci_rtk->baudrate);
//hci_board_debug("hci_tp_set_controller_baudrate: baudrate 0x%08x\n", p_hci_rtk->baudrate);
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, HCI_CMD_HDR_LEN + 4);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_VSC_UPDATE_BAUDRATE);
LE_UINT8_TO_STREAM(p, 4); /* length */
LE_UINT32_TO_STREAM(p, p_hci_rtk->baudrate);
hci_adapter_send(p_cmd, p - p_cmd);
//hci_tp_send(p_cmd, p - p_cmd, hci_rtk_tx_cb);
}
else
{
hci_board_debug("%s:p_cmd is NULL \n", __FUNCTION__);
return HCI_TP_CONFIG_FAIL;
}
return HCI_TP_CHECK_OK;
}
static void hci_rtk_convert_buadrate(uint32_t bt_baudrate, uint32_t *uart_baudrate)
{
uint8_t i;
*uart_baudrate = 115200;
extern const BAUDRATE_MAP baudrates[];
extern unsigned int baudrates_length;
for (i = 0; i < baudrates_length; i++)
{
if (baudrates[i].bt_baudrate == bt_baudrate)
{
*uart_baudrate = baudrates[i].uart_baudrate;
return;
}
}
HCI_PRINT_TRACE("hci_rtk_convert_buadrate: use default baudrate[115200]");
return;
}
uint8_t hci_set_baudrate_check(uint8_t len, uint8_t *p_buf)
{
(void)len;
(void)p_buf;
uint32_t uart_baudrate;
T_HCI_PATCH *p_hci_rtk = &hci_patch_info;
hci_rtk_convert_buadrate(p_hci_rtk->baudrate, &uart_baudrate);
//hci_board_debug("hci_tp_set_controller_baudrate: baudrate %d\n", uart_baudrate);
hci_uart_set_baudrate(uart_baudrate);
os_delay(50);
return HCI_TP_CHECK_OK;
}
//==================================IQK=======LOK=======
uint8_t hci_tp_rf_radio_ver(uint8_t offset, uint16_t value)
{
uint8_t *p_cmd;
uint8_t *p;
HCI_PRINT_TRACE("hci_tp_rf_radio_ver");
hci_board_debug("hci_tp_rf_radio_ver\n");
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, 8);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_VENDOR_RF_RADIO_REG_WRITE);
LE_UINT8_TO_STREAM(p, 4); /* length */
LE_UINT8_TO_STREAM(p, offset); /* offset */
LE_UINT16_TO_STREAM(p, value); /* value */
LE_UINT8_TO_STREAM(p, 0); /* */
hci_adapter_send(p_cmd, p - p_cmd);
//hci_tp_send(p_cmd, p - p_cmd, hci_rtk_tx_cb);
}
else
{
return HCI_TP_CONFIG_FAIL;
}
return HCI_TP_CHECK_OK;
}
// after IQK done, reset iqk_type to let next bt init do bt_check_iqk
void reset_iqk_type(void) {
iqk_type = 0xff;
}
uint8_t hci_tp_rf_radio_ver_flow(void)
{
#define NONEEDSTARTIQK 0x02
if(iqk_type != NONEEDSTARTIQK)
{
if(bt_check_iqk() == true)
{
//hci_board_debug("we have iqk value: DUMP,\r\n");
return HCI_TP_NOT_SEND;
}
hci_board_debug("we need start iqk\r\n");
iqk_type = NONEEDSTARTIQK;
}
if(vendor_flow == 0)
{
hci_tp_rf_radio_ver(0x00, CALI_IQK_RF_STEP0);
}
else if(vendor_flow == 1)
{
hci_tp_rf_radio_ver(0x01, CALI_IQK_RF_STEP1);
}
else if(vendor_flow == 2)
{
hci_tp_rf_radio_ver(0x02, CALI_IQK_RF_STEP2);
}
else if(vendor_flow == 3)
{
hci_tp_rf_radio_ver(0x3f, CALI_IQK_RF_STEP3F);
}
else
{
hci_board_debug("IQK error\n");
}
return HCI_TP_CHECK_OK;
}
uint8_t hci_write_rf_check(uint8_t len, uint8_t *p_buf)
{
(void)len;
(void)p_buf;
if (vendor_flow >= 3) /* receive the last fragment completed evt */
{
if(hci_start_iqk()== false)
{
vendor_flow = 0;
return HCI_TP_CONFIG_FAIL;
}
hci_board_debug("\n\rIQK OK\n");
vendor_flow = 0;
return HCI_TP_CHECK_OK;
}
else
{
hci_board_debug("continue add %x\n", vendor_flow);
vendor_flow++;
return HCI_TP_CHECK_AGAIN;
}
}
uint8_t hci_tp_write_efuse_iqk(void)
{
uint8_t *p_cmd;
uint8_t *p;
HCI_PRINT_TRACE("hci_tp_write_efuse_iqk");
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, 23);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_VSC_VENDOR_IQK);
LE_UINT8_TO_STREAM(p, 19); /* length */
memcpy(p, hci_tp_phy_efuse, 19);
p+=19;
hci_adapter_send(p_cmd, p - p_cmd);
//hci_tp_send(p_cmd, p - p_cmd, hci_rtk_tx_cb);
return HCI_TP_CHECK_OK;
}
else
{
return HCI_TP_CONFIG_FAIL;
}
}
//=========================================================
uint8_t hci_tp_hci_reset(void)
{
uint8_t *p_cmd;
uint8_t *p;
HCI_PRINT_TRACE("hci_reset");
//hci_board_debug("hci_reset\n");
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, 4);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_HCI_RESET);
LE_UINT8_TO_STREAM(p, 0); /* length */
hci_adapter_send(p_cmd, p - p_cmd);
//hci_tp_send(p_cmd, p - p_cmd, hci_rtk_tx_cb);
}
else
{
return HCI_TP_CONFIG_FAIL;
}
return HCI_TP_CHECK_OK;
}
HCI_PROCESS_TABLE hci_process_table[] ={
#ifdef HCI_START_IQK
{HCI_VENDOR_RF_RADIO_REG_WRITE, hci_tp_rf_radio_ver_flow, hci_write_rf_check},
#endif
//pre donload patch
{HCI_READ_LOCAL_VERSION_INFO,hci_tp_read_local_ver, hci_read_local_version_check},
{HCI_VSC_READ_ROM_VERSION,hci_tp_read_rom_ver, hci_read_rom_check},
//download patch
{HCI_VSC_UPDATE_BAUDRATE,hci_tp_set_controller_baudrate, hci_set_baudrate_check},
{HCI_VSC_DOWNLOAD_PATCH,hci_tp_download_patch, hci_download_patch_check},
#ifdef FT_MODE
{HCI_VSC_READ_THERMAL,hci_tp_read_thermal, hci_thermal_check},
#endif
#ifdef HCI_WRITE_IQK
{HCI_VSC_VENDOR_IQK,hci_tp_write_efuse_iqk, NULL},
#endif
{HCI_HCI_RESET,hci_tp_hci_reset, NULL},
};
uint8_t hci_total_step = sizeof(hci_process_table)/sizeof(HCI_PROCESS_TABLE);
uint8_t hci_tp_tx_test_cmd(void)
{
uint8_t *p_cmd;
uint8_t *p;
//HCI_PRINT_TRACE("hci_tp_read_local_ver");
//
#define HCI_LE_TRANSMIT_TEST 0x201e
hci_board_debug("hci_tp_tx_test_cmd 2402, 0xFF, 0x00\n");
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, 7);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_LE_TRANSMIT_TEST);
LE_UINT8_TO_STREAM(p, 3);
LE_UINT8_TO_STREAM(p, 0);//TX_CHANNEL
LE_UINT8_TO_STREAM(p, 0xff);//length_of_test_data
LE_UINT8_TO_STREAM(p, 0);//packet_payload
hci_adapter_send(p_cmd, p - p_cmd);
//hci_tp_send(p_cmd, p - p_cmd, hci_rtk_tx_cb);
}
else
{
return HCI_TP_CONFIG_FAIL;
}
return HCI_TP_CHECK_OK;
}
uint8_t hci_tp_rx_test_cmd(void)
{
uint8_t *p_cmd;
uint8_t *p;
//HCI_PRINT_TRACE("hci_tp_read_local_ver");
//
#define HCI_LE_RECEIVE_TEST 0x201d
hci_board_debug("hci_tp_rx_test_cmd 2402\n");
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, 6);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_LE_RECEIVE_TEST);
LE_UINT8_TO_STREAM(p, 1);
LE_UINT8_TO_STREAM(p, 0);//TX_CHANNEL
hci_adapter_send(p_cmd, p - p_cmd);
//hci_tp_send(p_cmd, p - p_cmd, hci_rtk_tx_cb);
}
else
{
return HCI_TP_CONFIG_FAIL;
}
return HCI_TP_CHECK_OK;
}
uint8_t hci_tp_test_end_cmd(void)
{
uint8_t *p_cmd;
uint8_t *p;
#define HCI_LE_TEST_END 0x201f
hci_board_debug("hci_tp_rx_test_cmd 2402\n");
p_cmd = os_mem_zalloc(RAM_TYPE_DATA_ON, 6);
if (p_cmd != NULL)
{
p = p_cmd;
LE_UINT8_TO_STREAM(p, HCI_CMD_PKT);
LE_UINT16_TO_STREAM(p, HCI_LE_TEST_END);
LE_UINT8_TO_STREAM(p, 0);
hci_adapter_send(p_cmd, p - p_cmd);
//hci_tp_send(p_cmd, p - p_cmd, hci_rtk_tx_cb);
}
else
{
return HCI_TP_CONFIG_FAIL;
}
return HCI_TP_CHECK_OK;
}
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/board/common/src/hci_process.c
|
C
|
apache-2.0
| 19,502
|
/**
*****************************************************************************************
* Copyright(c) 2017, Realtek Semiconductor Corporation. All rights reserved.
*****************************************************************************************
* @file Mem_types.h
* @brief define memory types for RAM
* @date 2017.6.6
* @version v1.0
* *************************************************************************************
* @attention
* <h2><center>© COPYRIGHT 2017 Realtek Semiconductor Corporation</center></h2>
* *************************************************************************************
*/
#ifndef _MEM_TYPES_H_
#define _MEM_TYPES_H_
#ifdef __cplusplus
extern "C" {
#endif
/** @defgroup MEM_CONFIG Memory Configure
* @{
*/
/*============================================================================*
* Types
*============================================================================*/
/** @defgroup MEM_CONFIG_Exported_Types Memory Configure Exported Types
* @{
*/
typedef enum
{
RAM_TYPE_DATA_ON = 0,
RAM_TYPE_DATA_OFF = 1,
RAM_TYPE_BUFFER_ON = 2,
RAM_TYPE_BUFFER_OFF = 3,
RAM_TYPE_NUM = 4
} RAM_TYPE;
/** @} */ /* End of group MEM_TYPES_Exported_Types */
/** @} */ /* End of group MEM_CONFIG */
#ifdef __cplusplus
}
#endif
#endif /* _MEM_TYPES_H_ */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/bluetooth/realtek/sdk/inc/platform/mem_types.h
|
C
|
apache-2.0
| 1,465
|
/**
******************************************************************************
* @file rl6548.c
* @author
* @version V1.0.0
* @date 2018-12-12
* @brief This file provides firmware functions to manage the following
* functionalities of the Audio codec peripheral:
* - Codec Initialization
* - Codec parameters configuration
* - SI read/write configuration
* - SI Clock configuration
*
******************************************************************************
* @attention
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2018, Realtek Semiconductor Corporation. All rights reserved.
******************************************************************************
*/
#include "ameba_soc.h"
#include "rl6548.h"
#include "rl6548_eq_table.h"
/**
* @brief Enables or disables the specified AUDIO SI peripheral.
* @param new_state: new state of the SIx peripheral.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void AUDIO_SI_Cmd(u8 new_state)
{
AUDIO_SI_TypeDef* SIx = AUDIO_SI_DEV;
if (new_state == ENABLE) {
SIx->SI_CTRLR &= ~ BIT_CTRLR_SI_DISABLE;
} else {
SIx->SI_CTRLR |= BIT_CTRLR_SI_DISABLE;
}
}
/**
* @brief SI write codec register.
* @param address: codec register address.
* @param data: data which write to register.
* @retval None
*/
void AUDIO_SI_WriteReg(u32 address, u32 data)
{
u32 cnt = 0;
AUDIO_SI_TypeDef* SIx = AUDIO_SI_DEV;
SIx->SI_CTRLR = (address << 8) | (data << 16) | BIT_CTRLR_SI_WR_START;
while((SIx->SI_CTRLR & BIT_CTRLR_SI_WR_START) && (++cnt) < 100000);
if (cnt == 100000){
DBG_8195A("write codec reg fail!!\n");
}
}
/**
* @brief SI read codec register.
* @param address: codec register address.
* @retval value of register.
*/
u16 AUDIO_SI_ReadReg(u32 address)
{
u32 reg_value = 0;
u32 cnt = 0;
AUDIO_SI_TypeDef* SIx = AUDIO_SI_DEV;
/* Configure Read command */
SIx->SI_CTRLR = (address << 8) | BIT_CTRLR_SI_RD_START;
do {
reg_value = SIx->SI_CTRLR;
/* waiting for read done */
} while((reg_value & BIT_CTRLR_SI_RD_START) && (++cnt) < 100000);
if (cnt == 100000){
DBG_8195A("read codec reg fail!!\n");
return 0;
}
return ((reg_value & BIT_CTRLR_SI_DATA) >> 16);
}
/**
* @brief Turn on or turn off the clock of register bank of audio codec.
* @param new_state: new state of the clock of register bank of audio codec.
* This parameter can be: ENABLE or DISABLE.
* @retval None
*/
void AUDIO_SI_ClkCmd(u8 new_state)
{
AUDIO_SI_TypeDef* SIx = AUDIO_SI_DEV;
if (new_state == ENABLE) {
SIx->SI_CLK_EN |= BIT_SI_CLK_EN;
} else {
SIx->SI_CLK_EN &= ~ BIT_SI_CLK_EN;
}
}
/**
* @brief Initialize codec peripheral.
* @param sample_rate: codec ADC and DAC sample rate.
* This parameter can be one of the following values:
* @arg SR_8K: sample rate is 8kHz
* @arg SR_16K: sample rate is 16kHz
* @arg SR_32K: sample rate is 32kHz
* @arg SR_48K: sample rate is 48kHz
* @arg SR_96K: sample rate is 96kHz
* @arg SR_44P1K: sample rate is 44.1kHz
* @arg SR_88P2K: sample rate is 88.2kHz
* @param word_len: data sample bit
* This parameter can be one of the following values:
* @arg WL_16: sample bit is 16 bit
* @arg WL_24: sample bit is 24 bit
* @arg WL_8: sample bit is 8 bit
* @param mono_stereo: mono channel or stereo channel
* This parameter can be one of the following values:
* @arg CH_STEREO: stereo channel, channel number is 2
* @arg CH_MONO: mono channel, channel number is 1
* @param application: application mode
* This parameter can be one of the following values:
* @arg APP_AMIC_IN: analog microphone in
* @arg APP_DMIC_IN: digital microphone in
* @arg APP_LINE_IN: line in
* @arg APP_LINE_OUT: line out
* @arg APP_DAAD_LPBK: loopback
* @return None
*/
void CODEC_Init(u32 sample_rate, u32 word_len, u32 mono_stereo, u32 application)
{
uint32_t reg_value = 0, reg_value2 = 0, reg_value3 = 0;
reg_value = HAL_READ32(SYSTEM_CTRL_BASE_LP, REG_AUDIO_SHARE_PAD_CTRL);
reg_value &= ~(BIT_LSYS_MASK_AC_LDO_REG << BIT_LSYS_SHIFT_AC_LDO_REG);
//restore the pad power
if (is_power_supply18()){
reg_value |= ((u32)0x68) << BIT_LSYS_SHIFT_AC_LDO_REG;
}
else{
reg_value |= ((u32)0x2A) << BIT_LSYS_SHIFT_AC_LDO_REG;
}
HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_AUDIO_SHARE_PAD_CTRL, reg_value);
/* ================= CODEC initialize ======================== */
if ((application&APP_DAAD_LPBK) == APP_DAAD_LPBK){
reg_value3 = (1<<BIT_ADC_L_AD_ZDET_TOUT | 1<<BIT_ADC_L_AD_ZDET_FUNC | 2<<BIT_ADC_L_ADJ_HPF_COEF_SEL);
AUDIO_SI_WriteReg(ADC_L_CTRL, reg_value3);
reg_value3 = 0;
reg_value3 = (1<<BIT_ADC_R_AD_ZDET_TOUT | 1<<BIT_ADC_R_AD_ZDET_FUNC | 2<<BIT_ADC_R_ADJ_HPF_COEF_SEL);
AUDIO_SI_WriteReg(ADC_R_ADJ_D, reg_value3);
reg_value3 = 0;
reg_value = AUDIO_SI_ReadReg(ASRC_CTRL);
reg_value |= (1 | 1<<BIT_ASRC_FTK_LOOP_EN | 1<<BIT_ASRC_256FS_SYS_SEL);
AUDIO_SI_WriteReg(ASRC_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ASRC_CTRL);
reg_value |= (1 << BIT_ASRC_EN);
AUDIO_SI_WriteReg(ASRC_CTRL, reg_value);
reg_value3 = (1<<BIT_DA_L_EN | 1<<BIT_DA_R_EN | 1<<BIT_MOD_L_EN | 1<<BIT_MOD_R_EN | 1<<BIT_DA_ANA_CLK_EN | 1<<BIT_DA_FIFO_EN\
| 1<<BIT_AD_L_EN | 1<<BIT_AD_R_EN | 1<<BIT_AD_FIFO_EN | 1<<BIT_AD_ANA_CLK_EN | 1<<BIT_AD_ANA_L_EN | 1<<BIT_AD_ANA_R_EN);
AUDIO_SI_WriteReg(DAC_ADC_MIC_CLK_CTRL,reg_value3);
reg_value3 = 0;
reg_value = AUDIO_SI_ReadReg(DAC_L_MUTE_CTRL);
reg_value |= (1<<BIT_DAAD_LPBK_EN);
AUDIO_SI_WriteReg(DAC_L_MUTE_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ADC_DMIC_L_FILTER_CTRL);
reg_value &= (0xffff&(~(1<<BIT_ADC_L_DMIC_MIX_MUTE)));
reg_value |= (1<<BIT_ADC_L_AD_MIX_MUTE);
AUDIO_SI_WriteReg(ADC_DMIC_L_FILTER_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ADC_DMIC_R_FILTER_CTRL);
reg_value &= (0xffff&(~(1<<BIT_ADC_R_DMIC_MIX_MUTE)));
reg_value |= (1<<BIT_ADC_R_AD_MIX_MUTE);
AUDIO_SI_WriteReg(ADC_DMIC_R_FILTER_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(DAC_ADC_MIC_CLK_CTRL);
reg_value |= (1<<BIT_DMIC_L_EN | 1<<BIT_DMIC_R_EN | 1<<BIT_DMIC_CLK_EN);
AUDIO_SI_WriteReg(DAC_ADC_MIC_CLK_CTRL, reg_value);
reg_value3 = (1 | 1<<BIT_ASRC_FTK_LOOP_EN | 1<<BIT_ASRC_256FS_SYS_SEL | 1<<BIT_ASRC_EN);
AUDIO_SI_WriteReg(ASRC_CTRL, reg_value3);
reg_value3 = 0;
AUDIO_SI_WriteReg(DAC_ADC_SR_CTRL, (sample_rate << 4) | sample_rate);
reg_value3 = (1<<BIT_I2S_RST_N_REG);
AUDIO_SI_WriteReg(I2S_CTRL, reg_value3);
reg_value3 = 0;
return;
}
reg_value = AUDIO_SI_ReadReg(MICBST_CTRL); //VREF voltage selection
reg_value &= (0xffff&(~(3<<BIT_VREF_VREFSEL)));
reg_value |= (2<<BIT_VREF_VREFSEL);
AUDIO_SI_WriteReg(MICBST_CTRL, reg_value);
if ((application&APP_LINE_OUT) == APP_LINE_OUT){
reg_value = AUDIO_SI_ReadReg(DAC_ADC_MIC_CLK_CTRL); //dac modulation/filter/fifo on
reg_value |= (1<<BIT_DA_L_EN | 1<<BIT_DA_R_EN | 1<<BIT_MOD_L_EN | 1<<BIT_MOD_R_EN | 1<<BIT_DA_ANA_CLK_EN | 1<<BIT_DA_FIFO_EN);
AUDIO_SI_WriteReg(DAC_ADC_MIC_CLK_CTRL, reg_value);
//step1
reg_value = AUDIO_SI_ReadReg(GEN_CTRL);
reg_value &= (1<<BIT_DTSDM_POW_L | 1<<BIT_DTSDM_POW_R);
reg_value |= (1<<BIT_DAC_ADDACK_POW | 1<<BIT_DAC_CKXEN | 1<<BIT_DAC_L_POW | 1<<BIT_DAC_R_POW | 1<<BIT_DPRAMP_POW | 1<<BIT_DTSDM_CKXEN);
AUDIO_SI_WriteReg(GEN_CTRL, reg_value);
reg_value3 = (3<<BIT_HPO_DPRSELL | 3<<BIT_HPO_DPRSELR | 1<< BIT_HPO_ENAL | 1<< BIT_HPO_ENAR |\
1<<BIT_HPO_ENDPL | 1<<BIT_HPO_ENDPR | 1<<BIT_HPO_L_POW);
AUDIO_SI_WriteReg(HPO_CTRL, reg_value3);
reg_value3 = 0;
reg_value = AUDIO_SI_ReadReg(HPO_MIC_CTRL);
reg_value &= (1<<BIT_MICBIAS_POW | 3<<BIT_MICBIAS_VSET);
reg_value |= (2<<BIT_HPO_ML | 2 <<BIT_HPO_MR | 1<<BIT_HPO_R_POW | 1<<BIT_HPO_SEL | 1<<BIT_HPO_SER | 1<<BIT_MBIAS_POW | 1<<BIT_VREF_POW);
AUDIO_SI_WriteReg(HPO_MIC_CTRL, reg_value);
reg_value3 = (1<<BIT_CKX_MICBIAS_EN);
AUDIO_SI_WriteReg(CK_DEPOP_MICBIAS, reg_value3);
reg_value3 = 0;
//step2
reg_value3 = (0xffff & (~(1<<BIT_HPO_CLPDPR | 1<<BIT_HPO_CLR | 1<<BIT_HPO_OPNDPL | 1<<BIT_HPO_OPNDPR)));
AUDIO_SI_WriteReg(HPO_CTRL, reg_value3);
reg_value3 = 0;
reg_value = AUDIO_SI_ReadReg(HPO_MIC_CTRL);
reg_value &= (1<<BIT_MICBIAS_POW | 3<<BIT_MICBIAS_VSET);
reg_value |= (2<<BIT_HPO_ML | 2<<BIT_HPO_MR | 1<<BIT_HPO_OPPDPR | 1<<BIT_HPO_R_POW | 1<<BIT_HPO_SEL | 1<<BIT_HPO_SER | 1<<BIT_MBIAS_POW | 1<<BIT_VREF_POW);
AUDIO_SI_WriteReg(HPO_MIC_CTRL, reg_value);
//step3
reg_value = AUDIO_SI_ReadReg(GEN_CTRL);
reg_value &= (1<<BIT_DTSDM_POW_L | 1<<BIT_DTSDM_POW_R);
reg_value |= (1<<BIT_DAC_ADDACK_POW | 1<<BIT_DAC_CKXEN | 1<<BIT_DAC_L_POW | 1<<BIT_DAC_R_POW | 1<<BIT_DPRAMP_ENRAMP | 1<<BIT_DPRAMP_POW | 1<<BIT_DTSDM_CKXEN);
AUDIO_SI_WriteReg(GEN_CTRL, reg_value);
reg_value3 = (1<<BIT_BB_CK_DEPOP_EN | 1<<BIT_CKX_MICBIAS_EN);
AUDIO_SI_WriteReg(CK_DEPOP_MICBIAS, reg_value3);
reg_value3 = 0;
}
if (((application&APP_AMIC_IN) == APP_AMIC_IN) || ((application&APP_LINE_IN) == APP_LINE_IN)){
reg_value = AUDIO_SI_ReadReg(HPO_MIC_CTRL); //vref power on
reg_value &= (0xffff & (~(1<<BIT_MICBST_ENDFL | 1<<BIT_MICBST_ENDFR )));
reg_value |= (1<<BIT_MBIAS_POW | 1<<BIT_VREF_POW);
AUDIO_SI_WriteReg(HPO_MIC_CTRL, reg_value);
DelayUs(5);
if ((application&APP_AMIC_IN) == APP_AMIC_IN){
reg_value = AUDIO_SI_ReadReg(CK_DEPOP_MICBIAS); //micbias chopper clock enable
reg_value |= (1<<BIT_CKX_MICBIAS_EN);
AUDIO_SI_WriteReg(CK_DEPOP_MICBIAS, reg_value);
reg_value = AUDIO_SI_ReadReg(HPO_MIC_CTRL); //release micbias chopper clock gate and mic_bias on
reg_value |= (1<<BIT_MICBIAS_ENCHX | 1<<BIT_MICBIAS_POW);
AUDIO_SI_WriteReg(HPO_MIC_CTRL, reg_value);
DelayUs(100);
reg_value = AUDIO_SI_ReadReg(MICBST_CTRL); //PGA on and unmute mic
reg_value &= (0xffff & (~(3<<BIT_MICBST_MUTE_L | 3<<BIT_MICBST_MUTE_R)));
reg_value |= (2<<BIT_MICBST_MUTE_L | 2<<BIT_MICBST_MUTE_R | 3<<BIT_MICBST_POW);
AUDIO_SI_WriteReg(MICBST_CTRL, reg_value);
}
else{
reg_value = AUDIO_SI_ReadReg(MICBST_CTRL); //PGA on and unmute line-in
reg_value &= (0xffff & (~(3<<BIT_MICBST_GSELL | 3<<BIT_MICBST_GSELR | 3<<BIT_MICBST_MUTE_L | 3<<BIT_MICBST_MUTE_R)));
reg_value |= (1<<BIT_MICBST_MUTE_L | 1<<BIT_MICBST_MUTE_R | 3<<BIT_MICBST_POW);
AUDIO_SI_WriteReg(MICBST_CTRL, reg_value);
}
}
if (((application&APP_AMIC_IN) == APP_AMIC_IN) || ((application&APP_LINE_IN) == APP_LINE_IN) || ((application&APP_LINE_OUT) == APP_LINE_OUT)) {
DelayMs(200);
}
if ((application&APP_LINE_OUT) == APP_LINE_OUT){
//step5
reg_value = AUDIO_SI_ReadReg(GEN_CTRL);
reg_value &= (1<<BIT_DTSDM_POW_L | 1<<BIT_DTSDM_POW_R);
reg_value |= (1<<BIT_DAC_ADDACK_POW | 1<<BIT_DAC_CKXEN | 1<<BIT_DAC_L_POW | 1<<BIT_DAC_R_POW | 1<<BIT_DTSDM_CKXEN);
AUDIO_SI_WriteReg(GEN_CTRL, reg_value);
reg_value3 = (3<<BIT_HPO_DPRSELL | 3<<BIT_HPO_DPRSELR | 3<<BIT_HPO_ENAL | 1<<BIT_HPO_L_POW);
AUDIO_SI_WriteReg(HPO_CTRL, reg_value3);
reg_value3 = 0;
reg_value = AUDIO_SI_ReadReg(HPO_MIC_CTRL);
reg_value &= (1<<BIT_MICBIAS_POW | 3<<BIT_MICBIAS_VSET);
reg_value |= (2<<BIT_HPO_ML | 2<<BIT_HPO_MR | 2<<BIT_HPO_OPPDPR | 1<<BIT_HPO_SEL | 1<<BIT_HPO_SER | 1<<BIT_MBIAS_POW | 1<<BIT_VREF_POW);
AUDIO_SI_WriteReg(HPO_MIC_CTRL, reg_value);
reg_value3 = (1<<BIT_CKX_MICBIAS_EN);
AUDIO_SI_WriteReg(CK_DEPOP_MICBIAS, reg_value3);
reg_value3 = 0;
}
if (((application&APP_AMIC_IN) == APP_AMIC_IN) || ((application&APP_LINE_IN) == APP_LINE_IN)){
reg_value = AUDIO_SI_ReadReg(GEN_CTRL); //adc on
reg_value |= (1<<BIT_DAC_ADDACK_POW | 1<<BIT_DTSDM_CKXEN | 1<<BIT_DTSDM_POW_L | 1<<BIT_DTSDM_POW_R);
AUDIO_SI_WriteReg(GEN_CTRL, reg_value);
DelayUs(50);
}
/* Configure ADC and DAC corresponding clock */
reg_value3 = (1<<BIT_DA_L_EN | 1<<BIT_DA_R_EN | 1<<BIT_MOD_L_EN | 1<<BIT_MOD_R_EN | 1<<BIT_DA_ANA_CLK_EN | 1<<BIT_DA_FIFO_EN | 1<<BIT_AD_L_EN\
| 1<<BIT_AD_R_EN | 1<<BIT_AD_FIFO_EN | 1<<BIT_AD_ANA_CLK_EN | 1<<BIT_AD_ANA_L_EN | 1<<BIT_AD_ANA_R_EN);
AUDIO_SI_WriteReg(DAC_ADC_MIC_CLK_CTRL, reg_value3);
reg_value3 = 0;
/* Left channel: Enable High pass filter enable control (filter DC), analog ADC input path mute control Left Channel */
/* Enable ADC SRC 1st LPF control and ADC SRC 2nd LPF control, DMIC SRC 1st LPF fc:46.92kHz */
reg_value3 = (1<<BIT_ADC_L_DMIC_LPF1ST_FC_SEL | 1<<BIT_ADC_L_AD_LPF2ND_EN | 1<<BIT_ADC_L_AD_LPF1ST_EN | 1<<BIT_ADC_L_DMIC_MIX_MUTE | 1<<BIT_ADC_L_AD_DCHPF_EN);
AUDIO_SI_WriteReg(ADC_DMIC_L_FILTER_CTRL, reg_value3);
reg_value3 = 0;
/* Right channel: Enable High pass filter enable control (filter DC), analog ADC input path mute control Left Channel */
/* Enable ADC SRC 1st LPF control and ADC SRC 2nd LPF control, DMIC SRC 1st LPF fc:46.92kHz */
reg_value3 = (1<<BIT_ADC_R_DMIC_LPF1ST_FC_SEL | 1<<BIT_ADC_R_AD_LPF2ND_EN | 1<<BIT_ADC_R_AD_LPF1ST_EN | 1<<BIT_ADC_R_DMIC_MIX_MUTE | 1<<BIT_ADC_R_AD_DCHPF_EN);
AUDIO_SI_WriteReg(ADC_DMIC_R_FILTER_CTRL, reg_value3);
reg_value3 = 0;
if (((application&APP_AMIC_IN) == APP_AMIC_IN) || ((application&APP_LINE_IN) == APP_LINE_IN)){
reg_value = AUDIO_SI_ReadReg(ADC_L_CTRL);
reg_value2 = AUDIO_SI_ReadReg(ADC_R_ADJ_D);
reg_value &= (0xffff&(~(7<<BIT_ADC_L_ADJ_HPF_COEF_SEL | 3<<BIT_ADC_L_AD_ZDET_FUNC)));
reg_value |= (1<<BIT_ADC_L_ADJ_HPF_2ND_EN);
reg_value2 &= (0xffff & (~(7<<BIT_ADC_R_ADJ_HPF_COEF_SEL | 3<<BIT_ADC_R_AD_ZDET_FUNC)));
reg_value2 |= (1<<BIT_ADC_R_ADJ_HPF_2ND_EN);
switch(sample_rate){
case SR_8K:
case SR_16K:
break;
case SR_32K:
reg_value |= (1<<BIT_ADC_L_ADJ_HPF_COEF_SEL);
reg_value2 |= (1<<BIT_ADC_R_ADJ_HPF_COEF_SEL);
break;
case SR_44P1K:
case SR_48K:
reg_value |= (2<<BIT_ADC_L_ADJ_HPF_COEF_SEL);
reg_value2 |= (2<<BIT_ADC_R_ADJ_HPF_COEF_SEL);
break;
case SR_88P2K:
case SR_96K:
reg_value |= (3<<BIT_ADC_L_ADJ_HPF_COEF_SEL);
reg_value2 |= (3<<BIT_ADC_R_ADJ_HPF_COEF_SEL);
break;
default:
break;
}
AUDIO_SI_WriteReg(ADC_L_CTRL, reg_value);
AUDIO_SI_WriteReg(ADC_R_ADJ_D, reg_value2);
DelayMs(50); //maybe need fine tune per board
}
reg_value3 = (1<<BIT_AUDIO_IP_TCON_EN | 1<<BIT_ASRC_FTK_LOOP_EN | 1<<BIT_ASRC_256FS_SYS_SEL | 1<<BIT_ASRC_EN);
AUDIO_SI_WriteReg(ASRC_CTRL, reg_value3);
reg_value3 = 0;
/* ADC and DAC sample rate 16K */
AUDIO_SI_WriteReg(DAC_ADC_SR_CTRL, (sample_rate << 4) | sample_rate);
/* Left channel: mon DAC Lch 128fs-domain mixer sidetone path mute enable, Digital DAC & ADC loop back control, mon DAC Lch dvol mute enable */
reg_value = AUDIO_SI_ReadReg(DAC_L_MUTE_CTRL);
//AUDIO_SI_WriteReg(0xfb, 0x4);
reg_value |= BIT3;
AUDIO_SI_WriteReg(DAC_L_MUTE_CTRL, reg_value & 0xfff9);
/* Right channel: mon DAC Rch 128fs-domain mixer sidetone path mute enable, Digital DAC & ADC loop back control, mon DAC Rch dvol mute enable */
reg_value = AUDIO_SI_ReadReg(DAC_R_MUTE_CTRL);
reg_value |= BIT3;
AUDIO_SI_WriteReg(DAC_R_MUTE_CTRL, reg_value & 0xfff9);
/* Enable control for dac filter; ALC is stereo mode */
reg_value = AUDIO_SI_ReadReg(ALC_MIN_GAIN);
reg_value &= (0xffff &(~(1<<BIT_DA_STEREO_MODE_EN)));
if (mono_stereo == CH_STEREO){
reg_value |= BIT8;
}
AUDIO_SI_WriteReg(ALC_MIN_GAIN, reg_value);
reg_value = AUDIO_SI_ReadReg(DAC_L_CTRL);
reg_value &= (0xff<<BIT_DAC_L_DA_GAIN | 1<<BIT_DAC_L_DAHPF_EN | 2<<BIT_DAC_L_DA_DITHER_SEL);
reg_value |= (2 << BIT_DAC_L_DA_ZDET_FUNC);
AUDIO_SI_WriteReg(DAC_L_CTRL, reg_value);
AUDIO_SI_WriteReg(DAC_R_CTRL, reg_value);
if ((application&APP_DMIC_IN) == APP_DMIC_IN){
reg_value = AUDIO_SI_ReadReg(ADC_DMIC_L_FILTER_CTRL);
reg_value &= (0xffff & (~(1<<BIT_ADC_L_DMIC_RI_FA_SEL | 1<<BIT_ADC_L_DMIC_MIX_MUTE)));
reg_value |= (1<<BIT_ADC_L_DMIC_RI_FA_SEL | 1<<BIT_ADC_L_DMIC_LPF2ND_EN | 1<<BIT_ADC_L_DMIC_LPF1ST_EN | 1<<BIT_ADC_L_AD_MIX_MUTE | 1<<BIT_ADC_L_AD_DCHPF_EN);
AUDIO_SI_WriteReg(ADC_DMIC_L_FILTER_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ADC_L_CTRL);
reg_value |= (1<<BIT_ADC_L_ADJ_HPF_2ND_EN);
AUDIO_SI_WriteReg(ADC_L_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ADC_DMIC_R_FILTER_CTRL);
reg_value &= (0xffff & (~(1<<BIT_ADC_R_DMIC_RI_FA_SEL | 1<<BIT_ADC_R_DMIC_MIX_MUTE)));
reg_value |= (1<<BIT_ADC_L_DMIC_LPF2ND_EN | 1<<BIT_ADC_L_DMIC_LPF1ST_EN | 1<<BIT_ADC_L_AD_MIX_MUTE | 1<<BIT_ADC_L_AD_DCHPF_EN);
AUDIO_SI_WriteReg(ADC_DMIC_R_FILTER_CTRL, reg_value); //bit0: 0 means latching rising edge, whereas 1 means falling edge.
reg_value = AUDIO_SI_ReadReg(ADC_R_ADJ_D);
reg_value |= (1<<BIT_ADC_R_ADJ_HPF_2ND_EN);
AUDIO_SI_WriteReg(ADC_R_ADJ_D, reg_value);
reg_value = AUDIO_SI_ReadReg(DAC_ADC_SR_CTRL);
reg_value &= (0xffff&(~(7<<BIT_DMIC_CLK_SEL)));
reg_value |= (1<<BIT_DMIC_CLK_SEL);
AUDIO_SI_WriteReg(DAC_ADC_SR_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(DAC_ADC_MIC_CLK_CTRL);
reg_value |= (1<<BIT_DMIC_L_EN | 1<<BIT_DMIC_R_EN | 1<<BIT_DMIC_CLK_EN);
AUDIO_SI_WriteReg(DAC_ADC_MIC_CLK_CTRL, reg_value);
}
if ((sample_rate == SR_96K) || (sample_rate == SR_88P2K)){
reg_value = AUDIO_SI_ReadReg(DAC_ADC_SR_CTRL);
reg_value &= (0xffff &(~(15<<BIT_ASRC_FSI_RATE_MANUAL)));
reg_value |= (1<<BIT_ASRC_FSI_RATE_MANUAL);
AUDIO_SI_WriteReg(DAC_ADC_SR_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ASRC_CTRL);
reg_value &= (0xffff&(~(3<<BIT_ASRC_256FS_SYS_SEL)));
AUDIO_SI_WriteReg(ASRC_CTRL, reg_value);
}
reg_value = ((word_len << 4) |mono_stereo | 0x0080);
AUDIO_SI_WriteReg(I2S_CTRL, reg_value);
}
/**
* @brief Set line out to differential mode.
* @param None
* @return None
*/
void CODEC_SetLineoutDifferential(){
uint32_t reg_value = 0;
reg_value = AUDIO_SI_ReadReg(HPO_MIC_CTRL);
reg_value &= (0xffff&(~(1<<BIT_HPO_SEL | 1<<BIT_HPO_SER)));
AUDIO_SI_WriteReg(HPO_MIC_CTRL, reg_value);
}
/**
* @brief Set codec volume by controlling mon DAC channel dvol gain.
* @param vol_lch: mon DAC Lch dvol gain control(0.375dB/step)
* This parameter can be one of the following values:
* @arg 8'hAF: 0dB
* @arg ...
* @arg 8'h00: -65.625dB
* @param vol_rch: mon DAC Rch dvol gain control(0.375dB/step)
* This parameter can be one of the following values:
* @arg 8'hAF: 0dB
* @arg ...
* @arg 8'h00: -65.625dB
* @return None
*/
void CODEC_SetVolume(u8 vol_lch, u8 vol_rch)
{
u32 reg_value = 0;
reg_value = AUDIO_SI_ReadReg(DAC_L_CTRL);
reg_value &= ~0xff;
reg_value |= vol_lch;
AUDIO_SI_WriteReg(DAC_L_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(DAC_R_CTRL);
reg_value &= ~0xff;
reg_value |= vol_rch;
AUDIO_SI_WriteReg(DAC_R_CTRL, reg_value);
}
/**
* @brief Get codec mon DAC channel gain control.
* @param vol: mon DAC DAC channel dvol gain
* @note vol value high 8 bits is rch gain, low 8 bits are lch gain
* @return None
*/
void CODEC_GetVolume(u16 *vol)
{
u8 vol_lch = 0;
u8 vol_rch = 0;
vol_lch = AUDIO_SI_ReadReg(DAC_L_CTRL) & 0xff;
vol_rch = AUDIO_SI_ReadReg(DAC_R_CTRL) & 0xff;
*vol = (vol_rch << 8) | vol_lch;
}
/**
* @brief Set codec ADC and DAC sample rate.
* @param sample_rate: codec ADC and DAC sample rate.
* This parameter can be one of the following values:
* @arg SR_8K: sample rate is 8kHz
* @arg SR_16K: sample rate is 16kHz
* @arg SR_32K: sample rate is 32kHz
* @arg SR_48K: sample rate is 48kHz
* @arg SR_96K: sample rate is 96kHz
* @arg SR_44P1K: sample rate is 44.1kHz
* @arg SR_88P2K: sample rate is 88.2kHz
* @return None
*/
void CODEC_SetSr(u32 sample_rate){
u32 reg_value = 0;
if ((sample_rate == SR_96K) || (sample_rate == SR_88P2K)){
reg_value = AUDIO_SI_ReadReg(DAC_ADC_SR_CTRL);
reg_value &= (7<<BIT_DMIC_CLK_SEL | 1<<BIT_ASRC_FSI_GATING_EN);
reg_value |= (0x0800|(sample_rate << 4) | sample_rate);
AUDIO_SI_WriteReg(DAC_ADC_SR_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ASRC_CTRL);
reg_value &= (0xffff & (~(3<<BIT_ASRC_256FS_SYS_SEL)));
AUDIO_SI_WriteReg(ASRC_CTRL, reg_value);
}
else{
reg_value = AUDIO_SI_ReadReg(DAC_ADC_SR_CTRL);
reg_value &= (7<<BIT_DMIC_CLK_SEL | 1<<BIT_ASRC_FSI_GATING_EN);
reg_value |= ((sample_rate << 4) | sample_rate);
AUDIO_SI_WriteReg(DAC_ADC_SR_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ASRC_CTRL);
reg_value &= (0xffff & (~(3<<BIT_ASRC_256FS_SYS_SEL)));
reg_value |=(1<<BIT_ASRC_256FS_SYS_SEL);
AUDIO_SI_WriteReg(ASRC_CTRL, reg_value);
}
}
/**
* @brief Set codec ADC and DAC channel number.
* @param mono_stereo: codec ADC and DAC channel number.
* This parameter can be one of the following values:
* @arg CH_MONO: mono
* @arg CH_STEREO: stereo
* @return None
*/
void CODEC_SetCh(u32 mono_stereo){
u32 reg_value = 0;
reg_value = AUDIO_SI_ReadReg(I2S_CTRL);
reg_value &= (0xffff & ~(1<<BIT_EN_I2S_MONO));
reg_value |= mono_stereo;
AUDIO_SI_WriteReg(I2S_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ALC_MIN_GAIN);
reg_value &= (0xffff & ~(1<<BIT_DA_STEREO_MODE_EN));
if (mono_stereo == CH_STEREO){
reg_value |= BIT8;
}
AUDIO_SI_WriteReg(ALC_MIN_GAIN, reg_value);
}
/**
* @brief Set codec ADC gain.
* @param ad_gain_left: ADC left channel digital volume gain
* This parameter can be one of the following values:
* @arg 7'h00: -17.625dB
* @arg ...
* @arg 7'h2f: 0dB
* @arg 7'h30: 0.375dB
* @arg ...
* @arg 7'h7f: 30dB
* @param ad_gain_right: ADC right channel digital volume gain
* This parameter can be one of the following values:
* @arg 7'h00: -17.625dB
* @arg ...
* @arg 7'h2f: 0dB
* @arg 7'h30: 0.375dB
* @arg ...
* @arg 7'h7f: 30dB
* @note ADC digital volume is -17.625dB~+30dB in 0.375 dB step.
* @return None
*/
void CODEC_SetAdcGain(u32 ad_gain_left, u32 ad_gain_right)
{
u32 reg_value = 0;
reg_value = AUDIO_SI_ReadReg(ADC_L_GAIN);
reg_value &= ~(0x7f<<ADC_L_AD_GAIN);
reg_value |= (ad_gain_left << ADC_L_AD_GAIN);
AUDIO_SI_WriteReg(ADC_L_GAIN, reg_value);
reg_value = AUDIO_SI_ReadReg(ADC_R_GAIN);
reg_value &= ~(0x7f<<ADC_R_AD_GAIN);
reg_value |= (ad_gain_left << ADC_R_AD_GAIN);
AUDIO_SI_WriteReg(ADC_R_GAIN, reg_value);
}
/**
* @brief Set codec amic boost.
* @param amic_bst_left: AMIC left channel boost gain
* This parameter can be one of the following values:
* @arg 2'b00: 0dB
* @arg 2'b01: 20dB
* @arg 2'b10: 30dB
* @arg 2'b11: 40dB
* @param amic_bst_right: AMIC right channel boost gain
* This parameter can be one of the following values:
* @arg 2'b00: 0dB
* @arg 2'b01: 20dB
* @arg 2'b10: 30dB
* @arg 2'b11: 40dB
* @return None
*/
void CODEC_SetAmicBst(u32 amic_bst_left, u32 amic_bst_right)
{
u32 reg_value = 0;
reg_value = AUDIO_SI_ReadReg(MICBST_CTRL);
reg_value &= ~(15<<BIT_MICBST_GSELL);
reg_value |= ((amic_bst_left&0x03)|((amic_bst_right&0x03)<<2));
AUDIO_SI_WriteReg(MICBST_CTRL, reg_value);
}
/**
* @brief Set codec dmic boost.
* @param dmic_bst_left: DMIC left channel boost gain
* This parameter can be one of the following values:
* @arg 2'b00: 0dB
* @arg 2'b01: 12dB
* @arg 2'b10: 24dB
* @arg 2'b11: 36dB
* @param dmic_bst_right: DMIC right channel boost gain
* This parameter can be one of the following values:
* @arg 2'b00: 0dB
* @arg 2'b01: 12dB
* @arg 2'b10: 24dB
* @arg 2'b11: 36dB
* @return None
*/
void CODEC_SetDmicBst(u32 dmic_bst_left, u32 dmic_bst_right)
{
u32 reg_value = 0;
reg_value = AUDIO_SI_ReadReg(ADC_L_CTRL);
reg_value &= ~(3<<BIT_ADC_L_DMIC_BOOST_GAIN);
reg_value |= (dmic_bst_left&0x03)<<BIT_ADC_L_DMIC_BOOST_GAIN;
AUDIO_SI_WriteReg(ADC_L_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ADC_R_ADJ_D);
reg_value &= ~(3<<BIT_ADC_R_DMIC_BOOST_GAIN);
reg_value |= (dmic_bst_right&0x03)<<BIT_ADC_R_DMIC_BOOST_GAIN;
AUDIO_SI_WriteReg(ADC_R_ADJ_D, reg_value);
}
/**
* @brief Set MIC_BIAS output voltage.
* @param mic_bias: micphone bias voltage setting
* This parameter can be one of the following values:
* @arg 2'b00: 0.90*AVCC
* @arg 2'b01: 0.86*AVCC
* @arg 2'b10: 0.75*AVCC
* @arg 2'b11: reserved
* @note AVCC is 2.8V@3.3V operation mode or 1.7V@1.8V operation mode
* @return None
*/
void CODEC_SetMicBias(u8 mic_bias)
{
u32 reg_value = 0;
reg_value = AUDIO_SI_ReadReg(HPO_MIC_CTRL);
reg_value &= ~(3<<BIT_MICBIAS_VSET);
reg_value |= ((mic_bias&0x03) << BIT_MICBIAS_VSET);
AUDIO_SI_WriteReg(HPO_MIC_CTRL, reg_value);
}
/**
* @brief mute or unmute per ad channel.
* @param mute_lch: mute option for left ad channel
* This parameter can be one of the following values:
* @arg MUTE_DISABLE: unmute
* @arg MUTE_ENABLE: mute
* @arg MUTE_NO_ACT: no modification
* @param mute_rch: mute option for right ad channel
* This parameter can be one of the following values:
* @arg MUTE_DISABLE: unmute
* @arg MUTE_ENABLE: mute
* @arg MUTE_NO_ACT: no modification
* @return None
*/
void CODEC_MuteRecord(u32 mute_lch, u32 mute_rch)
{
u32 reg_value = 0;
if (mute_lch == MUTE_ENABLE){
reg_value = AUDIO_SI_ReadReg(ADC_L_CTRL); //left ad mute
reg_value |= (1<<BIT_ADC_L_AD_MUTE);
AUDIO_SI_WriteReg(ADC_L_CTRL, reg_value);
}
else if (mute_lch == MUTE_DISABLE){
reg_value = AUDIO_SI_ReadReg(ADC_L_CTRL); //left ad unmute
reg_value &= (0xffff & (~(1<<BIT_ADC_L_AD_MUTE)));
AUDIO_SI_WriteReg(ADC_L_CTRL, reg_value);
}
if (mute_rch == MUTE_ENABLE){
reg_value = AUDIO_SI_ReadReg(ADC_R_ADJ_D); //right ad mute
reg_value |= (1<<BIT_ADC_R_AD_MUTE);
AUDIO_SI_WriteReg(ADC_R_ADJ_D, reg_value);
}
else if (mute_rch == MUTE_DISABLE){
reg_value = AUDIO_SI_ReadReg(ADC_R_ADJ_D); //right ad unmute
reg_value &= (0xffff & (~(1<<BIT_ADC_R_AD_MUTE)));
AUDIO_SI_WriteReg(ADC_R_ADJ_D, reg_value);
}
return;
}
/**
* @brief mute or unmute per da channel.
* @param mute_lch: mute option for left da channel
* This parameter can be one of the following values:
* @arg MUTE_DISABLE: unmute
* @arg MUTE_ENABLE: mute
* @arg MUTE_NO_ACT: no modification
* @param mute_rch: mute option for right da channel
* This parameter can be one of the following values:
* @arg MUTE_DISABLE: unmute
* @arg MUTE_ENABLE: mute
* @arg MUTE_NO_ACT: no modification
* @return None
*/
void CODEC_MutePlay(u32 mute_lch, u32 mute_rch)
{
u32 reg_value = 0;
if (mute_lch == MUTE_ENABLE){
reg_value = AUDIO_SI_ReadReg(DAC_L_MUTE_CTRL); //left da mut
reg_value |= (1<<BIT_DAC_L_DA_MUTE);
AUDIO_SI_WriteReg(DAC_L_MUTE_CTRL, reg_value);
}
else if (mute_lch == MUTE_DISABLE){
reg_value = AUDIO_SI_ReadReg(DAC_L_MUTE_CTRL); //left da unmute
reg_value &= (0xffff & (~(1<<BIT_DAC_L_DA_MUTE)));
AUDIO_SI_WriteReg(DAC_L_MUTE_CTRL, reg_value);
}
if (mute_rch == MUTE_ENABLE){
reg_value = AUDIO_SI_ReadReg(DAC_R_MUTE_CTRL); //right da mute
reg_value |= (1<<BIT_DAC_R_DA_MUTE);
AUDIO_SI_WriteReg(DAC_R_MUTE_CTRL, reg_value);
}
else if (mute_rch == MUTE_DISABLE){
reg_value = AUDIO_SI_ReadReg(DAC_R_MUTE_CTRL); //right da unmute
reg_value &= (0xffff & (~(1<<BIT_DAC_R_DA_MUTE)));
AUDIO_SI_WriteReg(DAC_R_MUTE_CTRL, reg_value);
}
return;
}
/**
* @brief De-initialize codec peripheral.
* @param application: application mode
* This parameter can be one of the following values:
* @arg APP_AMIC_IN: analog microphone in
* @arg APP_DMIC_IN: digital microphone in
* @arg APP_LINE_IN: line in
* @arg APP_LINE_OUT: line out
* @return None
*/
void CODEC_DeInit(u32 application)
{
u32 reg_value = 0;
if (((application&APP_AMIC_IN) == APP_AMIC_IN) || ((application&APP_LINE_IN) == APP_LINE_IN)){
#if 0
reg_value = AUDIO_SI_ReadReg(ADC_DMIC_L_FILTER_CTRL); //left ad filter off
reg_value &= ~0x4000;
AUDIO_SI_WriteReg(ADC_DMIC_L_FILTER_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ADC_DMIC_R_FILTER_CTRL); //right ad filter off
reg_value &= ~0x4000;
AUDIO_SI_WriteReg(ADC_DMIC_R_FILTER_CTRL, reg_value);
#endif
reg_value = AUDIO_SI_ReadReg(GEN_CTRL); //adc off
reg_value &= ~(1<<BIT_DTSDM_POW_L | 1<<BIT_DTSDM_POW_R);
AUDIO_SI_WriteReg(GEN_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(MICBST_CTRL); //PGA off and path mute
reg_value &= ~(3<<BIT_MICBST_POW);
reg_value |= (3<<BIT_MICBST_MUTE_L | 3<<BIT_MICBST_MUTE_R);
AUDIO_SI_WriteReg(MICBST_CTRL, reg_value);
if ((application&APP_AMIC_IN) == APP_AMIC_IN){
reg_value = AUDIO_SI_ReadReg(HPO_MIC_CTRL); //mic_bias off
reg_value &= ~(1<<BIT_MICBIAS_POW);
AUDIO_SI_WriteReg(HPO_MIC_CTRL, reg_value);
}
}
if ((application&APP_DMIC_IN) == APP_DMIC_IN){
reg_value = AUDIO_SI_ReadReg(DAC_ADC_MIC_CLK_CTRL);//dmic clock off
reg_value &= ~(1<<BIT_DMIC_L_EN | 1<<BIT_DMIC_R_EN | 1<<BIT_DMIC_CLK_EN);
AUDIO_SI_WriteReg(DAC_ADC_MIC_CLK_CTRL, reg_value);
}
if ((application&APP_LINE_OUT) == APP_LINE_OUT){
reg_value = AUDIO_SI_ReadReg(HPO_CTRL); //amplifier off
reg_value &= ~(1<<BIT_HPO_ENAL | 1<<BIT_HPO_ENAR);
AUDIO_SI_WriteReg(HPO_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(HPO_MIC_CTRL); //path mute and right channel off
reg_value &= ~(1<<BIT_HPO_R_POW);
reg_value |= (3<< BIT_HPO_ML | 3<<BIT_HPO_MR);
AUDIO_SI_WriteReg(HPO_MIC_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(HPO_CTRL); //left channel off and amplifier off
reg_value &= ~(1<<BIT_HPO_L_POW);
AUDIO_SI_WriteReg(HPO_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(GEN_CTRL); //dac off
reg_value &= ~(1<<BIT_DAC_L_POW | 1<<BIT_DAC_R_POW);
AUDIO_SI_WriteReg(GEN_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(DAC_ADC_MIC_CLK_CTRL); //dac modulation/filter/fifo reset
reg_value &= ~(1<<BIT_DA_L_EN | 1<<BIT_DA_R_EN | 1<<BIT_MOD_L_EN | 1<<BIT_MOD_R_EN | 1<<BIT_DA_ANA_CLK_EN | 1<<BIT_DA_FIFO_EN);
AUDIO_SI_WriteReg(DAC_ADC_MIC_CLK_CTRL, reg_value);
}
}
/**
* @brief Config codec DA path EQ parameters.
* @param sample_rate: codec DAC sample rate.
* This parameter can be one of the following values:
* @arg SR_8K: sample rate is 8kHz
* @arg SR_16K: sample rate is 16kHz
* @arg SR_48K: sample rate is 48kHz
* @arg SR_44P1K: sample rate is 44.1kHz
* @return None
*/
void CODEC_DacEqConfig(u32 sample_rate)
{
u32 cnt;
u32 eq_en_num;
u32 *eq_param;
switch (sample_rate){
case SR_44P1K:
eq_en_num = eq_44p1k_en_num;
eq_param = (u32 *)eq_param_44p1k;
break;
case SR_48K:
eq_en_num = eq_48k_en_num;
eq_param = (u32 *)eq_param_48k;
break;
case SR_8K:
eq_en_num = eq_8k_en_num;
eq_param = (u32 *)eq_param_8k;
break;
case SR_16K:
eq_en_num = eq_16k_en_num;
eq_param = (u32 *)eq_param_16k;
break;
default:
eq_en_num = 0;
break;
}
if (!eq_en_num){
return;
}
for(cnt=0; cnt<eq_en_num*5; cnt++){
AUDIO_SI_WriteReg(DAC_L_BIQUAD_H0_1L + cnt*2, (u16)(eq_param[cnt]));
AUDIO_SI_WriteReg(DAC_L_BIQUAD_H0_1H + cnt*2, (u16)((eq_param[cnt])>>16));
}
for(cnt=0; cnt<eq_en_num*5; cnt++){
AUDIO_SI_WriteReg(DAC_R_BIQUAD_H0_1L + cnt*2, (u16)(eq_param[cnt]));
AUDIO_SI_WriteReg(DAC_R_BIQUAD_H0_1H + cnt*2, (u16)((eq_param[cnt])>>16));
}
AUDIO_SI_WriteReg(DAC_L_BQ_EQ_CTRL, 0x0);
AUDIO_SI_WriteReg(DAC_L_BQ_EQ_CTRL, 0x1);
AUDIO_SI_WriteReg(DAC_R_BQ_EQ_CONTROL, 0x0);
AUDIO_SI_WriteReg(DAC_R_BQ_EQ_CONTROL, 0x1);
}
/**
* @brief Enable ALC function and set limiter threshold value
* @param limiter_val: ALC main-limiter threshold level (at amplitude domain) control
* This parameter can be one of the following values:
* @arg 32'h00: 0dB
* @arg 32'h01: -0.375dB
* @arg 32'h02: -0.750dB
* @arg ...
* @arg 32'h3F: -23.625dB
* @return None
*/
void CODEC_SetALC(u32 limiter_val)
{
u32 reg_value = AUDIO_SI_ReadReg(ALC_DRC_CTRL);
reg_value |= (1 | 1 << 6);
AUDIO_SI_WriteReg(ALC_DRC_CTRL, reg_value);
reg_value = AUDIO_SI_ReadReg(ALC_RATE_CTRL);
reg_value |= (limiter_val << 10);
AUDIO_SI_WriteReg(ALC_RATE_CTRL, reg_value);
}
/**
* @brief De-initialize ALC function.
* @param None
* @return None
*/
void CODEC_ALC_deinit()
{
u32 reg_value = AUDIO_SI_ReadReg(ALC_DRC_CTRL);
reg_value &= (~(1 | 1 << 6));
AUDIO_SI_WriteReg(ALC_DRC_CTRL, reg_value);
}
/******************* (C) COPYRIGHT 2018 Realtek Semiconductor *****END OF FILE****/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/si/rl6548.c
|
C
|
apache-2.0
| 33,394
|
/**
******************************************************************************
* @file rl6548.h
* @author
* @version V1.0.0
* @date 2018-12-12
* @brief This file contains all the functions prototypes for the audio codec firmware
* library.
******************************************************************************
* @attention
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2018, Realtek Semiconductor Corporation. All rights reserved.
******************************************************************************
*/
#ifndef __RL6548_H__
#define __RL6548_H__
/** @addtogroup AmebaD_Periph_Driver
* @{
*/
/** @defgroup audio
* @brief audio driver modules
* @{
*/
/** @addtogroup audio
* @verbatim
*****************************************************************************************
* Introduction
*****************************************************************************************
* codec:
* - Support anti-pop function to reduce audible pop
* - Support AMIC-in, DMIC-in, Line-in and Line-out
* - Sample rate: 8/16/32/44.1/48/96 KHz
* - Sample bit: 16 bit, 24 bit, 8bit
* - Channel number: mono or stereo
* - Data format: I2S, Left justified, PCM mode A, PCM mode B, PCM mode A-N, PCM mode B-N
* - Gain Control in ADC and DAC Path
*
* audio SI:
* - Base Address: AUDIO_SI_DEV
* - can use to configure codec register
*
*****************************************************************************************
* How to use audio SI & codec API
*****************************************************************************************
* To use audio codec si, the following steps are mandatory:
*
* 1. Open audio codec clock and function using
* PLLx_Set(0, ENABLE); (x is 0 or 1)
* RCC_PeriphClockCmd(APBPeriph_AUDIOC, APBPeriph_AUDIOC_CLOCK, ENABLE);
* RCC_PeriphClockCmd(APBPeriph_SPORT, APBPeriph_SPORT_CLOCK, ENABLE);
*
* 2. AUDIO SI enable:
* AUDIO_SI_Cmd(ENABLE).
*
* 3. Write AUDIO Codec registers using:
* AUDIO_SI_WriteReg(address, data);
*
* 4. Read AUDIO Codec registers using:
* AUDIO_SI_ReadReg(address);
*
* @note Turn on AUDIO Codec register bank clock using:
* AUDIO_SI_ClkCmd(ENABLE);
*
* @note Turn off AUDIO Codec register bank clock using:
* AUDIO_SI_ClkCmd(DISABLE);
*
* To use audio codec si, the following steps are mandatory:
*
* 1. Codec initialize using
* CODEC_Init(sample_rate, word_len, mono_stereo, application);
*
* 2. Codec set volume using
* CODEC_SetVolume(vol_lch, vol_rch);
*
* 3. Codec get volume using
* CODEC_GetVolume(*vol);
*
* 4. Set codec ADC and DAC sample rate using
* CODEC_SetSr(sample_rate);
*
* 5. Set codec ADC gain using
* CODEC_SetAdcGain(ad_gain_left, ad_gain_right);
*
* 6. Set codec MIC_BIAS output voltage
* CODEC_SetMicBias(mic_bias);
*
* 7. Codec de-initialize using
* CODEC_DeInit(application);
*
* @note All other functions can be used separately to modify, if needed,
* a specific feature of the AUDIO
*****************************************************************************************
* @endverbatim
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup AUDIO_Exported_Constants AUDIO Exported Constants
* @{
*/
/** @defgroup CODEC_sample_rate AUDIO Codec Sample Rate
* @{
*/
#define SR_48K ((u32)0x00000000)
#define SR_96K ((u32)0x00000001)
#define SR_32K ((u32)0x00000003)
#define SR_16K ((u32)0x00000005)
#define SR_8K ((u32)0x00000007)
#define SR_44P1K ((u32)0x00000008)
#define SR_88P2K ((u32)0x00000009)
/**
* @}
*/
/** @defgroup CODEC_word_len AUDIO Codec Word Len
* @{
*/
#define WL_16 ((u32)0x00000000)
#define WL_24 ((u32)0x00000002)
#define WL_8 ((u32)0x00000003)
/**
* @}
*/
/** @defgroup CODEC_channel_mode AUDIO Codec Channel Mode
* @{
*/
#define CH_STEREO ((u32)0x00000000)
#define CH_MONO ((u32)0x00000001)
/**
* @}
*/
/** @defgroup CODEC_application_mode AUDIO CODEC Application Mode
* @{
*/
#define APP_AMIC_IN ((u32)0x00000001)
#define APP_DMIC_IN ((u32)0x00000002)
#define APP_LINE_IN ((u32)0x00000004)
#define APP_LINE_OUT ((u32)0x00000008)
#define APP_DAAD_LPBK ((u32)0x00000010)
/**
* @}
*/
/** @defgroup CODEC_mute_action AUDIO CODEC mute action per channel
* @{
*/
#define MUTE_DISABLE ((u32)0x00000000)
#define MUTE_ENABLE ((u32)0x00000001)
#define MUTE_NO_ACT ((u32)0x00000002)
/**
* @}
*/
/** @defgroup Codec_rx_channel_selection AUDIO CODEC Rx Channel Selection
* @{
*/
#define RX_CH_LR ((u32)0x00000000)
#define RX_CH_RL ((u32)0x00000001)
#define RX_CH_LL ((u32)0x00000002)
#define RX_CH_RR ((u32)0x00000003)
/**
* @}
*/
/**
* @}
*/
/** @defgroup Register Macro Definition and Bit Definition
* @{
*/
#define GEN_CTRL 0x00
#define HPO_CTRL 0x01
#define HPO_MIC_CTRL 0x02
#define MICBST_CTRL 0x03
#define DEBUG_BUS_SEL 0x04
#define CK_DEPOP_MICBIAS 0x0c
#define SIDETONE_CTRL 0x0f
#define I2S_CTRL 0x10
#define ADC_DMIC_L_FILTER_CTRL 0x11
#define ADC_L_CTRL 0x12
#define ADC_L_GAIN 0x13
#define ADC_DMIC_R_FILTER_CTRL 0x14
#define ADC_R_ADJ_D 0x15
#define ADC_R_GAIN 0x16
#define DAC_ADC_SR_CTRL 0x17
#define DAC_ADC_MIC_CLK_CTRL 0x18
#define ASRC_FTK_SDM_INI 0x19
#define GEN_SRC_CLK_CTRL 0x1a
#define ASRC_CTRL 0x1b
#define ALC_ATK_CTRL 0x1c
#define ALC_ZD_BK 0x1d
#define ALC_DRC_CTRL 0x1e
#define ALC_NOISE_CTRL 0x1f
#define ALC_VAL_CTRL 0x20
#define ALC_RATE_CTRL 0x21
#define ALC_RC_WD_CTRL 0x22
#define ALC_TH_CTRL 0x23
#define ALC_ZERO_CTRL 0x24
#define ALC_LIMITER_TH1 0x25
#define ALC_LIMITER_TH2 0x26
#define ALC_MIN_GAIN 0x27
#define ALC_MODE_CTRL 0x28
#define ALC_STATUS_REG 0x29
#define DAC_L_SILENCE_CTRL 0xf6
#define DAC_R_SILENCE_CTRL 0Xf7
#define ADC_L_SILENCE_CTRL 0xf8
#define ADC_R_SILENCE_CTRL 0xf9
#define DAC_L_CTRL 0xfa
#define DAC_L_MUTE_CTRL 0xfb
#define DAC_R_CTRL 0xfc
#define DAC_R_MUTE_CTRL 0xfd
#define DAC_L_BQ_EQ_CTRL 0x2a
#define DAC_L_BIQUAD_H0_1L 0x2b
#define DAC_L_BIQUAD_H0_1H 0x2c
#define DAC_L_BIQUAD_B1_1L 0x2d
#define DAC_L_BIQUAD_B1_1H 0x2e
#define DAC_L_BIQUAD_B2_1L 0x2f
#define DAC_L_BIQUAD_B2_1H 0x30
#define DAC_L_BIQUAD_A1_1L 0x31
#define DAC_L_BIQUAD_A1_1H 0x32
#define DAC_L_BIQUAD_A2_1L 0x33
#define DAC_L_BIQUAD_A2_1H 0x34
#define DAC_L_BIQUAD_H0_2L 0x35
#define DAC_L_BIQUAD_H0_2H 0x36
#define DAC_L_BIQUAD_B1_2L 0x37
#define DAC_L_BIQUAD_B1_2H 0x38
#define DAC_L_BIQUAD_B2_2L 0x39
#define DAC_L_BIQUAD_B2_2H 0x3a
#define DAC_L_BIQUAD_A1_2L 0x3b
#define DAC_L_BIQUAD_A1_2H 0x3c
#define DAC_L_BIQUAD_A2_2L 0x3d
#define DAC_L_BIQUAD_A2_2H 0x3e
#define DAC_L_BIQUAD_H0_3L 0x3f
#define DAC_L_BIQUAD_H0_3H 0x40
#define DAC_L_BIQUAD_B1_3L 0x41
#define DAC_L_BIQUAD_B1_3H 0x42
#define DAC_L_BIQUAD_B2_3L 0x43
#define DAC_L_BIQUAD_B2_3H 0x44
#define DAC_L_BIQUAD_A1_3L 0x45
#define DAC_L_BIQUAD_A1_3H 0x46
#define DAC_L_BIQUAD_A2_3L 0x47
#define DAC_L_BIQUAD_A2_3H 0x48
#define DAC_L_BIQUAD_H0_4L 0x49
#define DAC_L_BIQUAD_H0_4H 0x4a
#define DAC_L_BIQUAD_B1_4L 0x4b
#define DAC_L_BIQUAD_B1_4H 0x4c
#define DAC_L_BIQUAD_B2_4L 0x4d
#define DAC_L_BIQUAD_B2_4H 0x4e
#define DAC_L_BIQUAD_A1_4L 0x4f
#define DAC_L_BIQUAD_A1_4H 0x50
#define DAC_L_BIQUAD_A2_4L 0x51
#define DAC_L_BIQUAD_A2_4H 0x52
#define DAC_L_BIQUAD_H0_5L 0x53
#define DAC_L_BIQUAD_H0_5H 0x54
#define DAC_L_BIQUAD_B1_5L 0x55
#define DAC_L_BIQUAD_B1_5H 0x56
#define DAC_L_BIQUAD_B2_5L 0x57
#define DAC_L_BIQUAD_B2_5H 0x58
#define DAC_L_BIQUAD_A1_5L 0x59
#define DAC_L_BIQUAD_A1_5H 0x5a
#define DAC_L_BIQUAD_A2_5L 0x5b
#define DAC_L_BIQUAD_A2_5H 0x5c
#define DAC_R_BQ_EQ_CONTROL 0x5d
#define DAC_R_BIQUAD_H0_1L 0x5e
#define DAC_R_BIQUAD_H0_1H 0x5f
#define DAC_R_BIQUAD_B1_1L 0x60
#define DAC_R_BIQUAD_B1_1H 0x61
#define DAC_R_BIQUAD_B2_1L 0x62
#define DAC_R_BIQUAD_B2_1H 0x63
#define DAC_R_BIQUAD_A1_1L 0x64
#define DAC_R_BIQUAD_A1_1H 0x65
#define DAC_R_BIQUAD_A2_1L 0x66
#define DAC_R_BIQUAD_A2_1H 0x67
#define DAC_R_BIQUAD_H0_2L 0x68
#define DAC_R_BIQUAD_H0_2H 0x69
#define DAC_R_BIQUAD_B1_2L 0x6a
#define DAC_R_BIQUAD_B1_2H 0x6b
#define DAC_R_BIQUAD_B2_2L 0x6c
#define DAC_R_BIQUAD_B2_2H 0x6d
#define DAC_R_BIQUAD_A1_2L 0x6e
#define DAC_R_BIQUAD_A1_2H 0x6f
#define DAC_R_BIQUAD_A2_2L 0x70
#define DAC_R_BIQUAD_A2_2H 0x71
#define DAC_R_BIQUAD_H0_3L 0x72
#define DAC_R_BIQUAD_H0_3H 0x73
#define DAC_R_BIQUAD_B1_3L 0x74
#define DAC_R_BIQUAD_B1_3H 0x75
#define DAC_R_BIQUAD_B2_3L 0x76
#define DAC_R_BIQUAD_B2_3H 0x77
#define DAC_R_BIQUAD_A1_3L 0x78
#define DAC_R_BIQUAD_A1_3H 0x79
#define DAC_R_BIQUAD_A2_3L 0x7a
#define DAC_R_BIQUAD_A2_3H 0x7b
#define DAC_R_BIQUAD_H0_4L 0x7c
#define DAC_R_BIQUAD_H0_4H 0x7d
#define DAC_R_BIQUAD_B1_4L 0x7e
#define DAC_R_BIQUAD_B1_4H 0x7f
#define DAC_R_BIQUAD_B2_4L 0x80
#define DAC_R_BIQUAD_B2_4H 0x81
#define DAC_R_BIQUAD_A1_4L 0x82
#define DAC_R_BIQUAD_A1_4H 0x83
#define DAC_R_BIQUAD_A2_4L 0x84
#define DAC_R_BIQUAD_A2_4H 0x85
#define DAC_R_BIQUAD_H0_5L 0x86
#define DAC_R_BIQUAD_H0_5H 0x87
#define DAC_R_BIQUAD_B1_5L 0x88
#define DAC_R_BIQUAD_B1_5H 0x89
#define DAC_R_BIQUAD_B2_5L 0x8a
#define DAC_R_BIQUAD_B2_5H 0x8b
#define DAC_R_BIQUAD_A1_5L 0x8c
#define DAC_R_BIQUAD_A1_5H 0x8d
#define DAC_R_BIQUAD_A2_5L 0x8e
#define DAC_R_BIQUAD_A2_5H 0x8f
#define ADC_L_BQ_EQ_CONTROL 0x90
#define ADC_L_BIQUAD_H0_1L 0x91
#define ADC_L_BIQUAD_H0_1H 0x92
#define ADC_L_BIQUAD_B1_1L 0x93
#define ADC_L_BIQUAD_B1_1H 0x94
#define ADC_L_BIQUAD_B2_1L 0x95
#define ADC_L_BIQUAD_B2_1H 0x96
#define ADC_L_BIQUAD_A1_1L 0x97
#define ADC_L_BIQUAD_A1_1H 0x98
#define ADC_L_BIQUAD_A2_1L 0x99
#define ADC_L_BIQUAD_A2_1H 0x9a
#define ADC_L_BIQUAD_H0_2L 0x9b
#define ADC_L_BIQUAD_H0_2H 0x9c
#define ADC_L_BIQUAD_B1_2L 0x9d
#define ADC_L_BIQUAD_B1_2H 0x9e
#define ADC_L_BIQUAD_B2_2L 0x9f
#define ADC_L_BIQUAD_B2_2H 0xa0
#define ADC_L_BIQUAD_A1_2L 0xa1
#define ADC_L_BIQUAD_A1_2H 0xa2
#define ADC_L_BIQUAD_A2_2L 0xa3
#define ADC_L_BIQUAD_A2_2H 0xa4
#define ADC_L_BIQUAD_H0_3L 0xa5
#define ADC_L_BIQUAD_H0_3H 0xa6
#define ADC_L_BIQUAD_B1_3L 0xa7
#define ADC_L_BIQUAD_B1_3H 0xa8
#define ADC_L_BIQUAD_B2_3L 0xa9
#define ADC_L_BIQUAD_B2_3H 0xaa
#define ADC_L_BIQUAD_A1_3L 0xab
#define ADC_L_BIQUAD_A1_3H 0xac
#define ADC_L_BIQUAD_A2_3L 0xad
#define ADC_L_BIQUAD_A2_3H 0xae
#define ADC_L_BIQUAD_H0_4L 0xaf
#define ADC_L_BIQUAD_H0_4H 0xb0
#define ADC_L_BIQUAD_B1_4L 0xb1
#define ADC_L_BIQUAD_B1_4H 0xb2
#define ADC_L_BIQUAD_B2_4L 0xb3
#define ADC_L_BIQUAD_B2_4H 0xb4
#define ADC_L_BIQUAD_A1_4L 0xb5
#define ADC_L_BIQUAD_A1_4H 0xb6
#define ADC_L_BIQUAD_A2_4L 0xb7
#define ADC_L_BIQUAD_A2_4H 0xb8
#define ADC_L_BIQUAD_H0_5L 0xb9
#define ADC_L_BIQUAD_H0_5H 0xba
#define ADC_L_BIQUAD_B1_5L 0xbb
#define ADC_L_BIQUAD_B1_5H 0xbc
#define ADC_L_BIQUAD_B2_5L 0xbd
#define ADC_L_BIQUAD_B2_5H 0xbe
#define ADC_L_BIQUAD_A1_5L 0xbf
#define ADC_L_BIQUAD_A1_5H 0xc0
#define ADC_L_BIQUAD_A2_5L 0xc1
#define ADC_L_BIQUAD_A2_5H 0xc2
#define ADC_R_BQ_EQ_CONTROL 0xc3
#define ADC_R_BIQUAD_H0_1L 0xc4
#define ADC_R_BIQUAD_H0_1H 0xc5
#define ADC_R_BIQUAD_B1_1L 0xc6
#define ADC_R_BIQUAD_B1_1H 0xc7
#define ADC_R_BIQUAD_B2_1L 0xc8
#define ADC_R_BIQUAD_B2_1H 0xc9
#define ADC_R_BIQUAD_A1_1L 0xca
#define ADC_R_BIQUAD_A1_1H 0xcb
#define ADC_R_BIQUAD_A2_1L 0xcc
#define ADC_R_BIQUAD_A2_1H 0xcd
#define ADC_R_BIQUAD_H0_2L 0xce
#define ADC_R_BIQUAD_H0_2H 0xcf
#define ADC_R_BIQUAD_B1_2L 0xd0
#define ADC_R_BIQUAD_B1_2H 0xd1
#define ADC_R_BIQUAD_B2_2L 0xd2
#define ADC_R_BIQUAD_B2_2H 0xd3
#define ADC_R_BIQUAD_A1_2L 0xd4
#define ADC_R_BIQUAD_A1_2H 0xd5
#define ADC_R_BIQUAD_A2_2L 0xd6
#define ADC_R_BIQUAD_A2_2H 0xd7
#define ADC_R_BIQUAD_H0_3L 0xd8
#define ADC_R_BIQUAD_H0_3H 0xd9
#define ADC_R_BIQUAD_B1_3L 0xda
#define ADC_R_BIQUAD_B1_3H 0xdb
#define ADC_R_BIQUAD_B2_3L 0xdc
#define ADC_R_BIQUAD_B2_3H 0xdd
#define ADC_R_BIQUAD_A1_3L 0xde
#define ADC_R_BIQUAD_A1_3H 0xdf
#define ADC_R_BIQUAD_A2_3L 0xe0
#define ADC_R_BIQUAD_A2_3H 0xe1
#define ADC_R_BIQUAD_H0_4L 0xe2
#define ADC_R_BIQUAD_H0_4H 0xe3
#define ADC_R_BIQUAD_B1_4L 0xe4
#define ADC_R_BIQUAD_B1_4H 0xe5
#define ADC_R_BIQUAD_B2_4L 0xe6
#define ADC_R_BIQUAD_B2_4H 0xe7
#define ADC_R_BIQUAD_A1_4L 0xe8
#define ADC_R_BIQUAD_A1_4H 0xe9
#define ADC_R_BIQUAD_A2_4L 0xea
#define ADC_R_BIQUAD_A2_4H 0xeb
#define ADC_R_BIQUAD_H0_5L 0xec
#define ADC_R_BIQUAD_H0_5H 0xed
#define ADC_R_BIQUAD_B1_5L 0xee
#define ADC_R_BIQUAD_B1_5H 0xef
#define ADC_R_BIQUAD_B2_5L 0xf0
#define ADC_R_BIQUAD_B2_5H 0xf1
#define ADC_R_BIQUAD_A1_5L 0xf2
#define ADC_R_BIQUAD_A1_5H 0xf3
#define ADC_R_BIQUAD_A2_5L 0xf4
#define ADC_R_BIQUAD_A2_5H 0xf5
//0x00
#define BIT_DAC_ADDACK_POW 0
#define BIT_DAC_CKXEN 1
#define BIT_DAC_CKXSEL 2
#define BIT_DAC_L_POW 3
#define BIT_DAC_R_POW 4
#define BIT_DPRAMP_CSEL 5
#define BIT_DPRAMP_ENRAMP 7
#define BIT_DPRAMP_POW 8
#define BIT_DTSDM_CKXEN 9
#define BIT_DTSDM_POW_L 10
#define BIT_DTSDM_POW_R 11
#define BIT_HPO_CLL 12
#define BIT_HPO_CLNDPL 13
#define BIT_HPO_CLNDPR 14
#define BIT_HPO_CLPDPL 15
//0x01
#define BIT_HPO_CLPDPR 0
#define BIT_HPO_CLR 1
#define BIT_HPO_DPRSELL 2
#define BIT_HPO_DPRSELR 4
#define BIT_HPO_ENAL 6
#define BIT_HPO_ENAR 7
#define BIT_HPO_ENDPL 8
#define BIT_HPO_ENDPR 9
#define BIT_HPO_L_POW 10
#define BIT_HPO_MDPL 11
#define BIT_HPO_MDPR 12
#define BIT_HPO_OPNDPL 13
#define BIT_HPO_OPNDPR 14
#define BIT_HPO_OPPDPL 15
//0x02
#define BIT_HPO_ML 0
#define BIT_HPO_MR 2
#define BIT_HPO_OPPDPR 4
#define BIT_HPO_R_POW 5
#define BIT_HPO_SEL 6
#define BIT_HPO_SER 7
#define BIT_MBIAS_POW 8
#define BIT_MICBIAS_ENCHX 9
#define BIT_MICBIAS_POW 10
#define BIT_MICBIAS_VSET 11
#define BIT_MICBST_ENDFL 13
#define BIT_MICBST_ENDFR 14
#define BIT_VREF_POW 15
//0x03
#define BIT_MICBST_GSELL 0
#define BIT_MICBST_GSELR 2
#define BIT_MICBST_MUTE_L 4
#define BIT_MICBST_MUTE_R 6
#define BIT_MICBST_POW 8
#define BIT_VREF_VREFSEL 10
//0x0c
#define BIT_SEL_BB_CK_DEPOP 0
#define BIT_MICBIAS_OC 2
#define BIT_BB_CK_DEPOP_EN 3
#define BIT_CKX_MICBIAS_EN 4
//0x10
#define BIT_EN_I2S_MONO 0
#define BIT_I2S_EN_PCM_N_MODE 1
#define BIT_I2S_DATA_FORMAT_SEL 2
#define BIT_I2S_DATA_LEN_SEL 4
#define BIT_INV_I2S_SCLK 6
#define BIT_I2S_RST_N_REG 7
#define BIT_SEL_I2S_RX_CH 8
#define BIT_SEL_I2S_TX_CH 10
#define BIT_STEREO_I2S_SELF_LPBK_EN 12
//0x11
#define BIT_ADC_L_DMIC_RI_FA_SEL 0
#define BIT_ADC_L_DMIC_LPF2ND_EN 3
#define BIT_ADC_L_DMIC_LPF1ST_EN 4
#define BIT_ADC_L_DMIC_LPF1ST_FC_SEL 5
#define BIT_ADC_L_AD_LPF2ND_EN 8
#define BIT_ADC_L_AD_LPF1ST_EN 9
#define BIT_ADC_L_AD_LPF1ST_FC_SEL 10
#define BIT_ADC_L_AD_MIX_MUTE 12
#define BIT_ADC_L_DMIC_MIX_MUTE 13
#define BIT_ADC_L_AD_DCHPF_EN 14
//0x12
#define BIT_ADC_L_AD_COMP_GAIN 0
#define BIT_ADC_L_ADJ_HPF_2ND_EN 2
#define BIT_ADC_L_ADJ_HPF_COEF_SEL 3
#define BIT_ADC_L_DMIC_BOOST_GAIN 6
#define BIT_ADC_L_AD_MUTE 8
#define BIT_ADC_L_AD_ZDET_FUNC 9
#define BIT_ADC_L_AD_ZDET_TOUT 11
//0x13
#define ADC_L_ADJ_HPF_COEF_NUM 0
#define ADC_L_AD_GAIN 6
//0x14
#define BIT_ADC_R_DMIC_RI_FA_SEL 0
#define BIT_ADC_R_DMIC_LPF2ND_EN 3
#define BIT_ADC_R_DMIC_LPF1ST_EN 4
#define BIT_ADC_R_DMIC_LPF1ST_FC_SEL 5
#define BIT_ADC_R_AD_LPF2ND_EN 8
#define BIT_ADC_R_AD_LPF1ST_EN 9
#define BIT_ADC_R_AD_LPF1ST_FC_SEL 10
#define BIT_ADC_R_AD_MIX_MUTE 12
#define BIT_ADC_R_DMIC_MIX_MUTE 13
#define BIT_ADC_R_AD_DCHPF_EN 14
//0x15
#define BIT_ADC_R_AD_COMP_GAIN 0
#define BIT_ADC_R_ADJ_HPF_2ND_EN 2
#define BIT_ADC_R_ADJ_HPF_COEF_SEL 3
#define BIT_ADC_R_DMIC_BOOST_GAIN 6
#define BIT_ADC_R_AD_MUTE 8
#define BIT_ADC_R_AD_ZDET_FUNC 9
#define BIT_ADC_R_AD_ZDET_TOUT 11
//0x16
#define ADC_R_ADJ_HPF_COEF_NUM 0
#define ADC_R_AD_GAIN 6
//0x17
#define BIT_DAC_SAMPLE_RATE 0
#define BIT_ADC_SAMPLE_RATE 4
#define BIT_DMIC_CLK_SEL 8
#define BIT_ASRC_FSI_RATE_MANUAL 11
#define BIT_ASRC_FSI_GATING_EN 15
//0x18
#define BIT_DA_L_EN 0
#define BIT_DA_R_EN 1
#define BIT_MOD_L_EN 2
#define BIT_MOD_R_EN 3
#define BIT_DA_ANA_CLK_EN 4
#define BIT_DA_FIFO_EN 5
#define BIT_ST_EN 6
#define BIT_AD_L_EN 7
#define BIT_AD_R_EN 8
#define BIT_AD_FIFO_EN 9
#define BIT_AD_ANA_CLK_EN 10
#define BIT_AD_ANA_L_EN 11
#define BIT_AD_ANA_R_EN 12
#define BIT_DMIC_L_EN 13
#define BIT_DMIC_R_EN 14
#define BIT_DMIC_CLK_EN 15
//0x1b
#define BIT_AUDIO_IP_TCON_EN 0
#define BIT_ASRC_FTK_LOOP_EN 1
#define BIT_ASRC_256FS_SYS_SEL 2
#define BIT_ASRC_EN 4
#define BIT_SIDETONE_IN_SEL 5
//0x27
#define BIT_ALC_MIN_GAIN 0
#define BIT_DA_STEREO_MODE_EN 8
//0xfa
#define BIT_DAC_L_DA_GAIN 0
#define BIT_DAC_L_DAHPF_EN 8
#define BIT_DAC_L_DA_DITHER_SEL 9
#define BIT_DAC_L_DA_ZDET_FUNC 11
#define BIT_DAC_L_DA_ZDET_TOUT 13
#define BIT_DAC_L_DMIX_IN_SEL 15
//0xfb
#define BIT_DAC_L_DA_MUTE 0
#define BIT_DAAD_LPBK_EN 1
#define BIT_DAC_L_DMIX_MUTE_128FS_DA 2
#define BIT_DAC_L_DMIX_MUTE_128FS_SIDETONE 3
//0xfd
#define BIT_DAC_R_DA_MUTE 0
#define BIT_DAC_R_DMIX_MUTE_128FS_DA 2
#define BIT_DAC_R_DMIX_MUTE_128FS_SIDETONE 3
/** @defgroup AUDIO_Exported_Functions AUDIO Exported Functions
* @{
*/
/** @defgroup AUDIO_SI_functions
* @{
*/
void AUDIO_SI_Cmd(u8 new_state);
void AUDIO_SI_WriteReg(u32 address, u32 data);
u16 AUDIO_SI_ReadReg(u32 address);
void AUDIO_SI_ClkCmd(u8 new_state);
/**
* @}
*/
/** @defgroup AUDIO_codec_functions
* @{
*/
void CODEC_Init(u32 sample_rate, u32 word_len, u32 mono_stereo, u32 application);
void CODEC_SetVolume(u8 vol_lch, u8 vol_rch);
void CODEC_GetVolume(u16 *vol);
void CODEC_SetSr(u32 sample_rate);
void CODEC_SetAdcGain(u32 ad_gain_left, u32 ad_gain_right);
void CODEC_SetAmicBst(u32 amic_bst_left, u32 amic_bst_right);
void CODEC_SetDmicBst(u32 dmic_bst_left, u32 dmic_bst_right);
void CODEC_SetMicBias(u8 mic_bias);
void CODEC_MuteRecord(u32 mute_lch, u32 mute_rch);
void CODEC_MutePlay(u32 mute_lch, u32 mute_rch);
void CODEC_DeInit(u32 application);
void CODEC_DacEqConfig(u32 sample_rate);
void CODEC_SetALC(u32 limiter_val);
void CODEDC_ALC_deinit();
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif
/******************* (C) COPYRIGHT 2018 Realtek Semiconductor *****END OF FILE****/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/si/rl6548.h
|
C
|
apache-2.0
| 20,790
|
const int eq_44p1k_en_num = 0x05;
const int eq_48k_en_num = 0x05;
const int eq_8k_en_num = 0x05;
const int eq_16k_en_num = 0x05;
const int eq_param_44p1k[] = {
0x02001235,
0xfc01518b,
0x01feb12d,
0x03fed2d3,
0xfe012a74,
0x02000000,
0xfc025f1a,
0x01fdabc6,
0x03fda0e6,
0xfe02543a,
0x02000000,
0xfc04b360,
0x01fb7603,
0x03fb4ca0,
0xfe0489fd,
0x02008d29,
0xfc0ac5e0,
0x01f5dec1,
0x03f65179,
0xfe0909b9,
0x02000000,
0xfc147836,
0x01ee150b,
0x03eb87ca,
0xfe11eaf5,
};
const int eq_param_48k[] = {
0x020010bb,
0xfc0135f3,
0x01fecc59,
0x03feeb79,
0xfe01123b,
0x02000000,
0xfc022d11,
0x01fddc1d,
0x03fdd2ef,
0xfe0223e3,
0x02000000,
0xfc044ee9,
0x01fbd40a,
0x03fbb117,
0xfe042bf6,
0x020081c8,
0xfc09db8a,
0x01f6af8a,
0x03f72587,
0xfe084f42,
0x02000000,
0xfc12a480,
0x01ef83bc,
0x03ed5b80,
0xfe107c44,
};
const int eq_param_8k[] = {
0x02000000,
0xfc16d09c,
0x01ec47ef,
0x03e92f64,
0xfe13b811,
0x02000000,
0xfc32d2dd,
0x01d94e9d,
0x03cd2d23,
0xfe26b163,
0x02000000,
0xfc53aeb7,
0x01c7096e,
0x03ac5149,
0xfe38f692,
0x02000000,
0xfda2c2d4,
0x0157efe8,
0x025d3d2c,
0xfea81018,
0x02000000,
0xfed149c5,
0x0117062f,
0x012eb63b,
0xfee8f9d1,
};
const int eq_param_16k[] = {
0x0000bf68,
0x03fffff8,
0x02000007,
0x03c72f58,
0xfe35d308,
0x021d6453,
0xfc6de63f,
0x01b5c253,
0x03c69354,
0xfe13b811,
0x023da05a,
0xfd26baeb,
0x016d15dc,
0x03310c35,
0xfe295859,
0x02000000,
0xfed149c5,
0x0117062f,
0x012eb63b,
0xfee8f9d1,
0x02000000,
0xff6b511a,
0x00fa1ffd,
0x0094aee6,
0xff05e003,
};
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/si/rl6548_eq_table.h
|
C
|
apache-2.0
| 1,562
|
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************/
#ifndef WLANCONFIG_H
#define WLANCONFIG_H
/*
* Include user defined options first. Anything not defined in these files
* will be set to standard values. Override anything you dont like!
*/
#include "platform_opts.h"
#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B) || defined(CONFIG_PLATFORM_8721D) || defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8710C)
#ifndef CONFIG_PLATFORM_AMEBA_X
#define CONFIG_PLATFORM_AMEBA_X 1
#endif
#else
#define CONFIG_PLATFORM_AMEBA_X 0
#endif
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#if defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8710C)
#define CONFIG_AXI_HCI
#else
#define CONFIG_LX_HCI
#endif
#else
#if defined(CONFIG_PLATFOMR_CUSTOMER_RTOS)
#define PLATFORM_CUSTOMER_RTOS 1
#define CONFIG_LWIP_LAYER 0
#else
#define PLATFORM_FREERTOS 1
#endif
#if 1
#undef PLATFORM_FREERTOS
//#undef PLATFORM_ALIOS
#define PLATFORM_ALIOS 1
#endif
#ifdef USE_SDIO_INTERFACE
#define CONFIG_SDIO_HCI
#else
#define CONFIG_GSPI_HCI
#endif
#endif // #if (CONFIG_PLATFORM_AMEBA_X == 1)
#if defined(CONFIG_HARDWARE_8188F) || defined(CONFIG_HARDWARE_8192E)|| defined(CONFIG_HARDWARE_8723D) || defined(CONFIG_HARDWARE_8821C) || defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_HARDWARE_8188E) || defined(CONFIG_PLATFORM_8721D) || defined(CONFIG_PLATFORM_8710C)
#define CONFIG_FW_C2H_PKT
#define PHYDM_LINUX_CODING_STYLE 1
#else
#define PHYDM_LINUX_CODING_STYLE 0
#endif
#if (PHYDM_LINUX_CODING_STYLE == 1)
#define PHYDM_NEW_INTERFACE 1
#else
#define PHYDM_NEW_INTERFACE 0
#endif
#ifndef CONFIG_INIC_EN
#define CONFIG_INIC_EN 0 //For iNIC project
#endif
#if CONFIG_INIC_EN
#define CONFIG_LWIP_LAYER 0
#endif
#ifndef CONFIG_WIFI_CRITICAL_CODE_SECTION
#define CONFIG_WIFI_CRITICAL_CODE_SECTION
#endif
#define CONFIG_LITTLE_ENDIAN
#define CONFIG_80211N_HT
#define CONFIG_RECV_REORDERING_CTRL
#define RTW_NOTCH_FILTER 0
#define CONFIG_EMBEDDED_FWIMG
#define CONFIG_PHY_SETTING_WITH_ODM
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#define HAL_MAC_ENABLE 1
#define HAL_BB_ENABLE 1
#define HAL_RF_ENABLE 1
#endif
#if (CONFIG_PLATFORM_AMEBA_X == 1)
/* Patch when dynamic mechanism is not ready */
//#define CONFIG_DM_PATCH
#endif
//#define CONFIG_DEBUG
//#define CONFIG_DEBUG_RTL871X
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define CONFIG_MEM_MONITOR MEM_MONITOR_SIMPLE
#define WLAN_INTF_DBG 0
//#define CONFIG_DEBUG_DYNAMIC
//#define DBG_TX 1
//#define DBG_XMIT_BUF 1
//#define DBG_XMIT_BUF_EXT 1
#define DBG_TX_DROP_FRAME
#else
#define CONFIG_MEM_MONITOR MEM_MONITOR_SIMPLE
//#define CONFIG_TRACE_SKB
//#define WLAN_INTF_DBG
#endif // CONFIG_PLATFORM_AMEBA_X
//#define CONFIG_DONT_CARE_TP
//#define CONFIG_HIGH_TP
//#define CONFIG_MEMORY_ACCESS_ALIGNED
#define CONFIG_POWER_SAVING
#ifdef CONFIG_POWER_SAVING
#define CONFIG_IPS
#define CONFIG_LPS
#ifdef CONFIG_LPS
#define CONFIG_LPS_CHK_BY_TP
#endif
//#define CONFIG_LPS_LCLK
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#ifdef CONFIG_LPS_LCLK
#define CONFIG_DETECT_CPWM_BY_POLLING
#define LPS_RPWM_WAIT_MS 300
#endif
#else
#define CONFIG_LPS_32K
#define TDMA_POWER_SAVING
#endif
#define CONFIG_WAIT_PS_ACK
#define CONFIG_FW_PSTIMEOUT
#endif
#define BAD_MIC_COUNTERMEASURE 1
#define DEFRAGMENTATION 1
#define RX_AGGREGATION 1
#define RX_AMSDU 1
#define WIFI_LOGO_CERTIFICATION 0
#if defined(CONFIG_PLATFORM_8711B)
#define CONFIG_FW_C2H_PKT
#endif
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#if defined(CONFIG_PLATFORM_8195A)
#define CONFIG_USE_TCM_HEAP 1 /* USE TCM HEAP */
#endif
#define CONFIG_RECV_TASKLET_THREAD
#define CONFIG_XMIT_TASKLET_THREAD
#else
#define CONFIG_XMIT_THREAD_MODE
#endif // CONFIG_PLATFORM_AMEBA_X
//#define CONFIG_RECV_THREAD_MODE /* Wlan IRQ Polling Mode*/
//#define CONFIG_ISR_THREAD_MODE_POLLING /* Wlan IRQ Polling Mode*/
//1 Chris
#ifndef CONFIG_SDIO_HCI
#define CONFIG_ISR_THREAD_MODE_INTERRUPT /* Wlan IRQ Interrupt Mode*/
#endif
#if defined(CONFIG_ISR_THREAD_MODE_POLLING) && defined(CONFIG_ISR_THREAD_MODE_INTERRUPT)
#error "CONFIG_ISR_THREAD_MODE_POLLING and CONFIG_ISR_THREAD_MODE_INTERRUPT are mutually exclusive. "
#endif
//#define CONFIG_RECV_TASK_THREAD_MODE
#if (CONFIG_PLATFORM_AMEBA_X == 1)
/* CRC DMEM optimized mode consume 1k less SRM memory consumption */
#define CRC_IMPLEMENTATION_MODE CRC_IMPLEMENTATION_DMEM_OPTIMIZED
#endif
/* AES DMEM optimized mode comsume 10k less memory compare to
IMEM optimized mode AES_IMPLEMENTATION_IMEM_OPTIMIZED */
#define AES_IMPLEMENTATION_MODE AES_IMPLEMENTATION_DMEM_OPTIMIZED
#define USE_SKB_AS_XMITBUF 1
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define USE_XMIT_EXTBUFF 1
#else
#define USE_XMIT_EXTBUFF 0
#endif
#define USE_MUTEX_FOR_SPINLOCK 1
// remove function to reduce code
#define NOT_SUPPORT_5G
#define SUPPORT_5G_CHANNEL 0
#if !defined(CONFIG_HARDWARE_8192E)
#define NOT_SUPPORT_RF_MULTIPATH
#endif
#define NOT_SUPPORT_VHT
//#define NOT_SUPPORT_40M
#define NOT_SUPPORT_80M
#if defined(CONFIG_PLATFORM_8195A)
#define NOT_SUPPORT_BBSWING
#endif
#ifdef CONFIG_HIGH_TP_TEST
#undef NOT_SUPPORT_40M
#endif
#define NOT_SUPPORT_OLD_CHANNEL_PLAN
#define NOT_SUPPORT_BT
#define CONFIG_WIFI_SPEC 0
#define CONFIG_FAKE_EFUSE 0
#if CONFIG_FAKE_EFUSE
#define FAKE_CHIPID CHIPID_8710BN
#endif
#define CONFIG_AUTO_RECONNECT 1
#define ENABLE_HWPDN_PIN
#define SUPPORT_SCAN_BUF 1
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#define BE_I_CUT 1
#endif
/* For WPA2 */
#define CONFIG_INCLUDE_WPA_PSK
#ifdef CONFIG_INCLUDE_WPA_PSK
#define CONFIG_MULTIPLE_WPA_STA
#define PSK_SUPPORT_TKIP 1
#endif
#define CONFIG_PMKSA_CACHING
/* For WPA3 */
#define CONFIG_IEEE80211W
#define CONFIG_SAE_SUPPORT
#ifdef CONFIG_SAE_SUPPORT
#define CONFIG_SAE_DH_SUPPORT 1
#define ALL_DH_GROUPS
#endif
/* For repeater mode */
#define CONFIG_REPEATER 0
#if defined(CONFIG_REPEATER) && CONFIG_REPEATER
#define NOT_SUPPORT_40M
#endif
/* For promiscuous mode */
#define CONFIG_PROMISC
#define PROMISC_DENY_PAIRWISE 0
/* For Simple Link */
#ifndef CONFIG_INCLUDE_SIMPLE_CONFIG
//#define CONFIG_INCLUDE_SIMPLE_CONFIG 1
#endif
// for probe request with custom vendor specific IE
#define CONFIG_CUSTOM_IE
#if (CONFIG_PLATFORM_AMEBA_X == 0)
/* For multicast */
#define CONFIG_MULTICAST
#endif
#define CONFIG_RX_PACKET_APPEND_FCS
/* For STA+AP Concurrent MODE */
#define CONFIG_CONCURRENT_MODE
#ifdef CONFIG_CONCURRENT_MODE
//#define CONFIG_MCC_MODE
#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8710C)
#define CONFIG_RUNTIME_PORT_SWITCH
#endif
#ifdef CONFIG_BRIDGE
#define NET_IF_NUM ((CONFIG_ETHERNET) + (CONFIG_BRIDGE) + (CONFIG_WLAN) + 1)
#else
#define NET_IF_NUM ((CONFIG_ETHERNET) + (CONFIG_WLAN) + 1)
#endif
#else
#define NET_IF_NUM ((CONFIG_ETHERNET) + (CONFIG_WLAN))
#endif
/****************** For EAP auth configurations *******************/
#define CONFIG_TLS 1
#define CONFIG_PEAP 1
#define CONFIG_TTLS 1
// DO NOT change the below config of EAP
#ifdef PRE_CONFIG_EAP
#undef CONFIG_TLS
#define CONFIG_TLS 1
#undef CONFIG_PEAP
#define CONFIG_PEAP 1
#undef CONFIG_TTLS
#define CONFIG_TTLS 1
#endif
// enable 1X code in lib_wlan as default (increase 380 bytes)
#define CONFIG_EAP
#if CONFIG_TLS || CONFIG_PEAP || CONFIG_TTLS
#define EAP_REMOVE_UNUSED_CODE 1
#endif
#define EAP_SSL_VERIFY_SERVER
#if CONFIG_TLS
#define EAP_SSL_VERIFY_CLIENT
#endif
#if CONFIG_TTLS
#define EAP_MSCHAPv2
#define EAP_TTLS_MSCHAPv2
//#define EAP_TTLS_EAP
//#define EAP_TTLS_MSCHAP
//#define EAP_TTLS_PAP
//#define EAP_TTLS_CHAP
#endif
/****************** End of EAP configurations *******************/
/* For WPS and P2P */
#define CONFIG_WPS
#if 0
#define CONFIG_WPS_AP
#define CONFIG_P2P_NEW
#if (!defined(SUPPORT_SCAN_BUF)||!defined(CONFIG_WPS_AP)) && defined(CONFIG_P2P_NEW)
#error "If CONFIG_P2P_NEW, need to SUPPORT_SCAN_BUF"
#endif
#endif
#define CONFIG_NEW_SIGNAL_STAT_PROCESS
#define CONFIG_SKIP_SIGNAL_SCALE_MAPPING
/* For AP_MODE */
#define CONFIG_AP_MODE
extern unsigned char g_user_ap_sta_num;
#define USER_AP_STA_NUM g_user_ap_sta_num
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#if defined(CONFIG_PLATFORM_8721D)
#define AP_STA_NUM 5
#else
#define AP_STA_NUM 3 //2014/10/27 modify to 3
#endif
#define USE_DEDICATED_BCN_TX 0
#if USE_DEDICATED_BCN_TX
#error "WLAN driver for Ameba should not enable USE_DEDICATED_BCN_TX"
#endif
#else
extern unsigned int g_ap_sta_num;
#define AP_STA_NUM 3//g_ap_sta_num
#endif
#ifdef CONFIG_AP_MODE
#if defined(CONFIG_PLATFORM_8195A)
//softap sent qos null0 polling client alive or not
#define CONFIG_AP_POLLING_CLIENT_ALIVE
#endif
#define CONFIG_NATIVEAP_MLME
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define CONFIG_INTERRUPT_BASED_TXBCN
#endif
#ifdef CONFIG_INTERRUPT_BASED_TXBCN
//#define CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
#define CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
#endif
// #define CONFIG_GK_REKEY
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#define USE_DEDICATED_BCN_TX 1
#endif
#if CONFIG_INIC_EN
// #define REPORT_STA_EVENT //useless
#endif
#else
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#define USE_DEDICATED_BCN_TX 0
#endif
#endif
#if defined(CONFIG_AP_MODE) && defined(CONFIG_GK_REKEY) && !defined(CONFIG_MULTIPLE_WPA_STA)
#error "If CONFIG_GK_REKEY when CONFIG_AP_MODE, need to CONFIG_MULTIPLE_WPA_STA"
#endif
#if (CONFIG_PLATFORM_AMEBA_X == 0)
#if !defined(CONFIG_AP_MODE) && defined(CONFIG_CONCURRENT_MODE)
#error "If CONFIG_CONCURRENT_MODEE, need to CONFIG_AP_MODE"
#endif
#endif
/* For efuse or flash config */
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define CONFIG_RW_PHYSICAL_EFUSE 0 // Mask efuse user blocks
#define CONFIG_HIDE_PROTECT_EFUSE 1
#define CONFIG_ADAPTOR_INFO_CACHING_FLASH 1
#define CHECK_FLASH_VALID_MASK 1
#define CHECK_EFUSE_VALID_MASK 1
/* For K-free */
#define CONFIG_RF_GAIN_OFFSET
#endif // CONFIG_PLATFORM_AMEBA_X
/* For MP_MODE */
//#define CONFIG_MP_INCLUDED
#ifdef CONFIG_MP_INCLUDED
#define MP_DRIVER 1
#define CONFIG_MP_IWPRIV_SUPPORT
// #define HAL_EFUSE_MEMORY
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define MP_REG_TEST
#endif
#else
#define MP_DRIVER 0
#if defined(CONFIG_PLATFORM_8195A)
//Control wifi mcu function
#define CONFIG_LITTLE_WIFI_MCU_FUNCTION_THREAD
#define CONFIG_ODM_REFRESH_RAMASK
#define CONFIG_ANTENNA_DIVERSITY
//#define CONFIG_ANTENNA_DIVERSITY_FORCE_ON
//#define CONFIG_BT_COEXIST
#endif
#if defined(CONFIG_PLATFORM_8721D)
#define CONFIG_ANTENNA_DIVERSITY
//#define CONFIG_BT_COEXIST
//#define CONFIG_SW_MAILBOX_EN
//#define NEW_BT_COEX
#define CONFIG_BT_COEXIST_SOC
#endif
#if defined(CONFIG_PLATFORM_8710C)
//#define CONFIG_ANTENNA_DIVERSITY
//#define CONFIG_BT_COEXIST
//#define CONFIG_SW_MAILBOX_EN
//#define NEW_BT_COEX
#endif
#endif // #ifdef CONFIG_MP_INCLUDED
#ifdef CONFIG_BT_COEXIST
#undef NOT_SUPPORT_BT
#define CONFIG_BT_MAILBOX
#define CONFIG_BT_EFUSE
//#define CONFIG_BT_TWO_ANTENNA
#endif
// for Debug message
#define DBG 0
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#if(DBG == 0)
#define ROM_E_RTW_MSG 1
#define ROM_F_RTW_MSG 1
#if (CONFIG_INIC_EN == 0) && (PHYDM_LINUX_CODING_STYLE == 0)
/* For DM debug*/
// BB
#define DBG_RX_INFO 1
#define DBG_DM_DIG 1 // DebugComponents: bit0
#define DBG_DM_RA_MASK 1 // DebugComponents: bit1
#define DBG_DM_ANT_DIV 1 // DebugComponents: bit6
#define DBG_TX_RATE 1 // DebugComponents: bit9
#define DBG_DM_RA 1 // DebugComponents: bit9
#define DBG_DM_ADAPTIVITY 1 // DebugComponents: bit17
// RF
#define DBG_PWR_TRACKING 1 // DebugComponents: bit24
#define DBG_RF_IQK 1 // DebugComponents: bit26
#define DBG_RF_DPK 1 // DebugComponents:
// Common
#define DBG_PWR_INDEX 1 // DebugComponents: bit30
#endif
#endif
#endif
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#if defined(CONFIG_PLATFORM_8195A)
#undef CONFIG_RTL8195A
#define CONFIG_RTL8195A
#endif
#if defined(CONFIG_PLATFORM_8711B)
#ifndef CONFIG_RTL8711B
#define CONFIG_RTL8711B
#endif
#undef CONFIG_ADAPTOR_INFO_CACHING_FLASH
#define CONFIG_ADAPTOR_INFO_CACHING_FLASH 0
//#undef CONFIG_EAP
//#undef CONFIG_IPS
#define CONFIG_8710B_MOVE_TO_ROM
#define CONFIG_EFUSE_SEPARATE
#define CONFIG_MOVE_PSK_TO_ROM
#define CONFIG_WOWLAN
#define CONFIG_TRAFFIC_PROTECT
#define CONFIG_FABVERSION_UMC 1
#if (CONFIG_INIC_EN == 1)
#undef CONFIG_PROMISC
#undef CONFIG_WPS
#undef CONFIG_AP_MODE
#undef CONFIG_NATIVEAP_MLME
#undef CONFIG_INTERRUPT_BASED_TXBCN
#undef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
#undef USE_DEDICATED_BCN_TX
//#undef SUPPORT_SCAN_BUF
#undef CONFIG_CONCURRENT_MODE
#undef CONFIG_AUTO_RECONNECT
#endif
#endif
#if defined(CONFIG_PLATFORM_8721D)
#define CONFIG_EMPTY_EFUSE_PG_ENABLE
#define CONFIG_APP_CTRL_RF_ONOFF
#ifndef CONFIG_RTL8721D
#define CONFIG_RTL8721D
#endif
#undef NOT_SUPPORT_5G
#undef CONFIG_ADAPTOR_INFO_CACHING_FLASH
#define CONFIG_ADAPTOR_INFO_CACHING_FLASH 0
#define CONFIG_EFUSE_SEPARATE
#define CONFIG_WOWLAN
//#define CONFIG_TRAFFIC_PROTECT
#undef SUPPORT_5G_CHANNEL
#define SUPPORT_5G_CHANNEL 1
#define CONFIG_DFS
#define CONFIG_XMIT_ACK
#define TXBD_PRE_MALLOC
#define USER_CTL_POWER_SAVE
#define RTL8721D_SPECIFIC //Patch for rtl8721d, avoid misunderstanding when porting to next new IC
#ifdef CONFIG_DFS
#define CONFIG_DFS_ACTION
#endif
#define DBG_DM_DIG 0 // DebugComponents: bit0
//#define CONFIG_SUPPORT_DYNAMIC_TXPWR //rtw_phydm_fill_desc_dpt todo
#if (CONFIG_INIC_EN == 1)
#undef CONFIG_PROMISC
#undef CONFIG_WPS
#undef CONFIG_AP_MODE
#undef CONFIG_NATIVEAP_MLME
#undef CONFIG_INTERRUPT_BASED_TXBCN
#undef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
#undef USE_DEDICATED_BCN_TX
//#undef SUPPORT_SCAN_BUF
#undef CONFIG_CONCURRENT_MODE
#undef CONFIG_AUTO_RECONNECT
#endif
#define CONFIG_WLAN_SWITCH_MODE //save memory while switching mode without driver re-init
//#define LOW_POWER_WIFI_CONNECT
//#define LONG_PERIOD_TICKLESS
#endif
#if defined(CONFIG_PLATFORM_8195BHP)
#define CONFIG_RTL8195B
#undef CONFIG_EAP
// #undef CONFIG_ADAPTOR_INFO_CACHING_FLASH
// #define CONFIG_ADAPTOR_INFO_CACHING_FLASH 0
#undef CHECK_FLASH_VALID_MASK
#define CHECK_FLASH_VALID_MASK 0
#undef CHECK_EFUSE_VALID_MASK
#define CHECK_EFUSE_VALID_MASK 0
#undef CONFIG_RW_PHYSICAL_EFUSE
#define CONFIG_RW_PHYSICAL_EFUSE 1 // efuse_get realraw
#undef NOT_SUPPORT_5G
#undef NOT_SUPPORT_VHT
// #undef NOT_SUPPORT_40M
// #undef NOT_SUPPORT_80M
#undef DBG
#define DBG 1
#ifdef CONFIG_POWER_SAVING
#define CONFIG_LPS_LCLK
#ifdef CONFIG_LPS_LCLK
#define CONFIG_DETECT_CPWM_BY_POLLING
#define LPS_RPWM_WAIT_MS 300
#endif
#define CONFIG_LPS_PG
#endif
#define CONFIG_80211AC_VHT
#undef CONFIG_IPS
// #define CONFIG_NO_FW
#define CONFIG_EX_FW_BIN
#define CONFIG_WOWLAN
#define CONFIG_WOWLAN_HW_CAM
#define CONFIG_WOWLAN_CUSTOM_PATTERN
#ifdef CONFIG_WOWLAN
#define CONFIG_WOWLAN_TCP_KEEP_ALIVE
#endif
#define LOAD_FW_HEADER_FROM_DRIVER
#define FW_IQK
// #define RTW_IQK_FW_OFFLOAD
#define CONFIG_PHY_CAPABILITY_QUERY
#define CONFIG_ISR_THREAD_MODE_INTERRUPT /* Wlan IRQ Interrupt Mode*/
// #define CONFIG_WLAN_RF_CNTL
#define SUPPORT_5G_CHANNEL 1
#define CONFIG_DFS
#ifdef CONFIG_DFS
#define CONFIG_DFS_ACTION
#endif
#define DBG_DM_DIG 0 // DebugComponents: bit0
// #define CONFIG_DEBUG
#define RTW_HALMAC /* Use HALMAC architecture */
#define RTW_HALMAC_MU_BF 0
#define RTW_HALMAC_SU_BF 0
#define RTW_HALMAC_BT_COEX 0
#define RTW_HALMAC_DUMP_INFO 0
#define RTW_HALMAC_TXBF 0
#define RTW_HALMAC_FW_OFFLOAD 0
#define RTW_HALMAC_PHYSICAL_EFUSE 0
#define RTW_HALMAC_SIZE_OPTIMIZATION 1
#define RTW_HALMAC_SDIO_CIA_READ 0
#define RTW_HALMAC_LTE_COEX 0
#define CONFIG_MAC_LOOPBACK_DRIVER_RTL8195B 0
#endif
#if defined(CONFIG_PLATFORM_8710C)
#ifndef CONFIG_RTL8710C
#define CONFIG_RTL8710C
#endif
#undef CONFIG_EAP
#undef CONFIG_ADAPTOR_INFO_CACHING_FLASH
#undef CHECK_FLASH_VALID_MASK
#undef NOT_SUPPORT_40M
#define NOT_SUPPORT_40M
#define CONFIG_ADAPTOR_INFO_CACHING_FLASH 0
#undef CONFIG_RW_PHYSICAL_EFUSE
#define CONFIG_RW_PHYSICAL_EFUSE 1// efuse_get realraw enable physical read/write
#define LOAD_FW_HEADER_FROM_DRIVER
//#define CONFIG_EFUSE_SEPARATE
#define CONFIG_TRAFFIC_PROTECT
#ifdef CONFIG_POWER_SAVING
#define CONFIG_WOWLAN
//#define CONFIG_LPS_LCLK
#ifdef CONFIG_LPS_LCLK
//#define CONFIG_DETECT_CPWM_BY_POLLING
#define LPS_RPWM_WAIT_MS 300
#endif
//#define CONFIG_LPS_PG
//#define CONFIG_LPS_POFF
#ifdef CONFIG_WOWLAN
//#define CONFIG_WOWLAN_TCP_KEEP_ALIVE
#endif
#endif
#define DBG_DM_DIG 0 // DebugComponents: bit0
// #define CONFIG_DEBUG
//#define RTW_HALMAC /* Use HALMAC architecture */
//#define RTW_HALMAC_MU_BF 0
//#define RTW_HALMAC_SU_BF 0
//#define RTW_HALMAC_BT_COEX 0
//#define RTW_HALMAC_DUMP_INFO 0
//#define RTW_HALMAC_TXBF 0
//#define RTW_HALMAC_FW_OFFLOAD 0
//#define RTW_HALMAC_PHYSICAL_EFUSE 0
//#define RTW_HALMAC_SIZE_OPTIMIZATION 1
//#define RTW_HALMAC_SDIO_CIA_READ 0
//#define RTW_HALMAC_LTE_COEX 0
//#define CONFIG_MAC_LOOPBACK_DRIVER_RTL8710C 1 // 1: HAL+MAC LOOPBACK, 2: HAL+MAC+BB LOOPBACK 3: DRV+HAL+MAC LOOPBACK
#if defined(CONFIG_MAC_LOOPBACK_DRIVER_RTL8710C) && (CONFIG_MAC_LOOPBACK_DRIVER_RTL8710C == 3)
#define CONFIG_MAC_LOOPBACK_DRIVER_AMEBA
#endif
#define CONFIG_WLAN_SWITCH_MODE //save memory while switching mode without driver re-init
#endif
#elif defined(CONFIG_HARDWARE_8188F)
#define CONFIG_RTL8188F
#elif defined(CONFIG_HARDWARE_8192E)
#define CONFIG_RTL8192E
#elif defined(CONFIG_HARDWARE_8821C)
#define CONFIG_RTL8821C
#elif defined(CONFIG_HARDWARE_8723D)
#define CONFIG_RTL8723D
#elif defined(CONFIG_HARDWARE_8188E)
#define CONFIG_RTL8188E
#else
#define CONFIG_RTL8188E
#endif
#define RTL8192E_SUPPORT 0
#define RTL8812A_SUPPORT 0
#define RTL8821A_SUPPORT 0
#define RTL8723B_SUPPORT 0
#define RTL8195A_SUPPORT 0
#define RTL8188E_SUPPORT 0
#define RTL8188F_SUPPORT 0
#define RTL8711B_SUPPORT 0
#define RTL8721D_SUPPORT 0
#define RTL8821C_SUPPORT 0
#define RTL8723D_SUPPORT 0
#define RTL8195B_SUPPORT 0
#define RTL8710C_SUPPORT 0
#if defined(CONFIG_PLATFORM_8195A)
#undef RTL8195A_SUPPORT
#define RTL8195A_SUPPORT 1
#elif defined(CONFIG_PLATFORM_8711B)
#undef RTL8711B_SUPPORT
#define RTL8711B_SUPPORT 1
#elif defined(CONFIG_PLATFORM_8721D)
#undef RTL8721D_SUPPORT
#define RTL8721D_SUPPORT 1
#elif defined(CONFIG_PLATFORM_8195BHP)
#undef RTL8195B_SUPPORT
#define RTL8195B_SUPPORT 1
#elif defined(CONFIG_PLATFORM_8710C)
#undef RTL8710C_SUPPORT
#define RTL8710C_SUPPORT 1
#elif defined(CONFIG_HARDWARE_8188F)
#undef RTL8188F_SUPPORT
#define RTL8188F_SUPPORT 1
#elif defined(CONFIG_HARDWARE_8192E)
#undef RTL8192E_SUPPORT
#define RTL8192E_SUPPORT 1
#elif defined(CONFIG_HARDWARE_8821C)
#undef RTL8821C_SUPPORT
#define RTL8821C_SUPPORT 1
#elif defined(CONFIG_HARDWARE_8723D)
#undef RTL8723D_SUPPORT
#define RTL8723D_SUPPORT 1
#elif defined(CONFIG_HARDWARE_8188E)
#undef RTL8188E_SUPPORT
#define RTL8188E_SUPPORT 1
#else
#undef RTL8188E_SUPPORT
#define RTL8188E_SUPPORT 1
#endif
/* For DM support */
#if defined(CONFIG_RTL8188F)
#define RATE_ADAPTIVE_SUPPORT 0
#elif defined(CONFIG_RTL8821C)
#define RATE_ADAPTIVE_SUPPORT 0
#elif defined(CONFIG_RTL8192E)
#define RATE_ADAPTIVE_SUPPORT 0
#elif defined(CONFIG_RTL8723D)
#define RATE_ADAPTIVE_SUPPORT 0
#elif defined(CONFIG_PLATFORM_8711B)
#define RATE_ADAPTIVE_SUPPORT 0
#define CONFIG_ODM_REFRESH_RAMASK
#elif defined(CONFIG_PLATFORM_8721D)
#define RATE_ADAPTIVE_SUPPORT 0
//#define CONFIG_ODM_REFRESH_RAMASK
#elif defined(CONFIG_PLATFORM_8710C)
#define RATE_ADAPTIVE_SUPPORT 0
//#define CONFIG_ODM_REFRESH_RAMASK
#else
#define RATE_ADAPTIVE_SUPPORT 1
#endif
// adaptivity
#define RTW_ADAPTIVITY_EN_DISABLE 0
#define RTW_ADAPTIVITY_EN_ENABLE 1
#define CONFIG_RTW_ADAPTIVITY_EN RTW_ADAPTIVITY_EN_DISABLE
#define RTW_ADAPTIVITY_MODE_NORMAL 0
#define RTW_ADAPTIVITY_MODE_CARRIER_SENSE 1
#define CONFIG_RTW_ADAPTIVITY_MODE RTW_ADAPTIVITY_MODE_CARRIER_SENSE
#define CONFIG_RTW_ADAPTIVITY_DML 0
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define CONFIG_POWER_TRAINING_WIL 0 // in RA
#else
#define POWER_BY_RATE_SUPPORT 0
#endif
#if (CONFIG_PLATFORM_AMEBA_X == 1)
#define RTL8195A_FOR_TEST_CHIP 0
//#define CONFIG_WIFI_TEST 1
//#define CONFIG_MAC_LOOPBACK_DRIVER 1
//#define CONFIG_WLAN_HAL_TEST 1
//#define SKB_PRE_ALLOCATE_TX 1
#ifdef CONFIG_HIGH_TP_TEST
#define SKB_PRE_ALLOCATE_RX 1
#else
#define SKB_PRE_ALLOCATE_RX 0
#endif
#if (!defined(CONFIG_PLATFORM_8721D))
#define TX_CHECK_DSEC_ALWAYS 1
#endif
#define CONFIG_DBG_DISABLE_RDU_INTERRUPT
//#define CONFIG_WLAN_HAL_RX_TASK
#if (SKB_PRE_ALLOCATE_RX == 1)
#ifdef CONFIG_HIGH_TP_TEST
#define EXCHANGE_LXBUS_RX_SKB 1
#else
#define EXCHANGE_LXBUS_RX_SKB 0
#endif
#endif
#if (defined(CONFIG_FPGA) && !defined(CONFIG_PLATFORM_8710C))\
|| (defined(CONFIG_PLATFORM_8710C) && defined(CONFIG_MAC_LOOPBACK_DRIVER_RTL8710C) && (CONFIG_MAC_LOOPBACK_DRIVER_RTL8710C == 1))
//Enable mac loopback for test mode (Ameba)
#ifdef CONFIG_WIFI_NORMAL
#define CONFIG_TWO_MAC_DRIVER // for test mode
#else //CONFIG_WIFI_VERIFY
#define ENABLE_MAC_LB_FOR_TEST_MODE
#endif
#define AP_PSK_SUPPORT_TKIP
#endif
#ifdef ENABLE_MAC_LB_FOR_TEST_MODE
#define CONFIG_SUDO_PHY_SETTING
#define INT_HANDLE_IN_ISR 1
#ifdef CONFIG_LWIP_LAYER
#undef CONFIG_LWIP_LAYER
#define CONFIG_LWIP_LAYER 0
#else
#define CONFIG_LWIP_LAYER 0
#endif
#define CONFIG_WLAN_HAL_TEST
#define CONFIG_WLAN_HAL_RX_TASK
#define CONFIG_MAC_LOOPBACK_DRIVER_AMEBA 1
#define HAL_MAC_ENABLE 1
#if !defined(CONFIG_PLATFORM_8710C)
#define CONFIG_TWO_MAC_TEST_MODE
#endif
#if defined(CONFIG_MAC_LOOPBACK_DRIVER_RTL8710C) && (CONFIG_MAC_LOOPBACK_DRIVER_RTL8710C == 2)
// Enable BB loopback test
#define HAL_BB_ENABLE 1
#define HAL_RF_ENABLE 1
#define DISABLE_BB_RF 0
#else
#define DISABLE_BB_RF 1
#endif
#else
//#define CONFIG_TWO_MAC_DRIVER //for mornal driver; two mac
#if defined(CONFIG_TWO_MAC_DRIVER) || defined(CONFIG_MAC_LOOPBACK_DRIVER_AMEBA)
#define CONFIG_SUDO_PHY_SETTING
#define HAL_MAC_ENABLE 1
#define DISABLE_BB_RF 1
#else
#define HAL_MAC_ENABLE 1
#define HAL_BB_ENABLE 1
#define HAL_RF_ENABLE 1
#define DISABLE_BB_RF 0
#endif
//#define INT_HANDLE_IN_ISR 1
#endif
#endif // CONFIG_PLATFORM_AMEBA_X
#ifndef CONFIG_LWIP_LAYER
#define CONFIG_LWIP_LAYER 1
#endif
#define CONFIG_MAC_ADDRESS 0
//fast reconnection
//#define CONFIG_FAST_RECONNECTION 1
#if defined(CONFIG_INIC_EN)&&(CONFIG_INIC_EN==1)
#define CONFIG_RECV_REORDERING_CTRL //enable reordering for iNIC high throughput
#undef RX_AGGREGATION
#define RX_AGGREGATION 1
#undef NOT_SUPPORT_40M
#undef CONFIG_CONCURRENT_MODE
#endif
#if defined(CONFIG_HARDWARE_8821C)
#define FW_IQK
#define RTW_HALMAC
#define LOAD_FW_HEADER_FROM_DRIVER
#define RTW_HALMAC_SIZE_OPTIMIZATION 1
//#define CONFIG_NO_FW
#ifdef NOT_SUPPORT_5G
#undef NOT_SUPPORT_5G
#define SUPPORT_5G_CHANNEL 1
#endif
#endif
//#define CONFIG_ADDRESS_ALIGNMENT
#ifdef CONFIG_ADDRESS_ALIGNMENT
#define ALIGNMENT_SIZE 32
#endif
#define CONFIG_DFS
//#define CONFIG_EMPTY_EFUSE_PG_ENABLE
#define WLAN_WRAPPER_VERSION 1
#define TIME_THRES 20
/* 80211 - K V R */
#define CONFIG_IEEE80211K
#define CONFIG_LAYER2_ROAMING
#ifdef CONFIG_LAYER2_ROAMING
#define CONFIG_RTW_WNM
#define CONFIG_IEEE80211R
#endif
#endif //WLANCONFIG_H
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/include/autoconf.h
|
C
|
apache-2.0
| 24,248
|
/******************************************************************************
*
* Copyright(c) 2007 - 2021 Realtek Corporation. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************/
#ifndef __DRV_CONF_H__
#define __DRV_CONF_H__
#include "autoconf.h"
#if ((RTL8195A_SUPPORT==1) || (RTL8711B_SUPPORT==1) || (RTL8721D_SUPPORT == 1))
#include "platform_autoconf.h"
#endif
#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
#error "Shall be Linux or Windows, but not both!\n"
#endif
//Older Android kernel doesn't has CONFIG_ANDROID defined,
//add this to force CONFIG_ANDROID defined
#ifdef CONFIG_PLATFORM_ANDROID
#define CONFIG_ANDROID
#endif
#ifdef CONFIG_ANDROID
//Some Android build will restart the UI while non-printable ascii is passed
//between java and c/c++ layer (JNI). We force CONFIG_VALIDATE_SSID
//for Android here. If you are sure there is no risk on your system about this,
//mask this macro define to support non-printable ascii ssid.
//#define CONFIG_VALIDATE_SSID
#ifdef CONFIG_PLATFORM_ARM_SUNxI
#ifdef CONFIG_VALIDATE_SSID
#undef CONFIG_VALIDATE_SSID
#endif
#endif
//Android expect dbm as the rx signal strength unit
#define CONFIG_SIGNAL_DISPLAY_DBM
#endif
#if defined(CONFIG_HAS_EARLYSUSPEND) && defined (CONFIG_RESUME_IN_WORKQUEUE)
#warning "You have CONFIG_HAS_EARLYSUSPEND enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically"
#undef CONFIG_RESUME_IN_WORKQUEUE
#endif
#if defined(CONFIG_ANDROID_POWER) && defined (CONFIG_RESUME_IN_WORKQUEUE)
#warning "You have CONFIG_ANDROID_POWER enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically"
#undef CONFIG_RESUME_IN_WORKQUEUE
#endif
#ifdef CONFIG_RESUME_IN_WORKQUEUE //this can be removed, because there is no case for this...
#if !defined( CONFIG_WAKELOCK) && !defined(CONFIG_ANDROID_POWER)
#error "enable CONFIG_RESUME_IN_WORKQUEUE without CONFIG_WAKELOCK or CONFIG_ANDROID_POWER will suffer from the danger of wifi's unfunctionality..."
#error "If you still want to enable CONFIG_RESUME_IN_WORKQUEUE in this case, mask this preprossor checking and GOOD LUCK..."
#endif
#endif
//About USB VENDOR REQ
#if defined(CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX)
#warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC automatically"
#define CONFIG_USB_VENDOR_REQ_MUTEX
#endif
#if defined(CONFIG_VENDOR_REQ_RETRY) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX)
#warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_VENDOR_REQ_RETRY automatically"
#define CONFIG_USB_VENDOR_REQ_MUTEX
#endif
#ifndef CONFIG_RTW_ADAPTIVITY_EN
#define CONFIG_RTW_ADAPTIVITY_EN 0
#endif
#ifndef CONFIG_RTW_ADAPTIVITY_MODE
#define CONFIG_RTW_ADAPTIVITY_MODE 0
#endif
#ifndef CONFIG_RTW_ADAPTIVITY_DML
#define CONFIG_RTW_ADAPTIVITY_DML 0
#endif
#ifndef CONFIG_RTW_ADAPTIVITY_DC_BACKOFF
#define CONFIG_RTW_ADAPTIVITY_DC_BACKOFF 4
#endif
#ifndef CONFIG_RTW_NHM_EN
#define CONFIG_RTW_NHM_EN 0
#endif
#ifndef CONFIG_IFACE_NUMBER
#ifdef CONFIG_CONCURRENT_MODE
#define CONFIG_IFACE_NUMBER 2
#else
#define CONFIG_IFACE_NUMBER 1
#endif
#endif
//#include <rtl871x_byteorder.h>
#endif // __DRV_CONF_H__
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/include/drv_conf.h
|
C
|
apache-2.0
| 3,829
|
/******************************************************************************
*
* Copyright(c) 2007 - 2014 Realtek Corporation. All rights reserved.
*
* This is ROM code section.
*
*
******************************************************************************/
#ifndef ROM_AES_H
#define ROM_AES_H
typedef struct
{
u32 erk[64]; /* encryption round keys */
u32 drk[64]; /* decryption round keys */
int nr; /* number of rounds */
}aes_context;
#define AES_BLOCKSIZE8 8
#define AES_BLK_SIZE 16 // # octets in an AES block
typedef union _aes_block // AES cipher block
{
unsigned long x[AES_BLK_SIZE/4]; // access as 8-bit octets or 32-bit words
unsigned char b[AES_BLK_SIZE];
}aes_block;
void AES_WRAP(unsigned char * plain, int plain_len,
unsigned char * iv, int iv_len,
unsigned char * kek, int kek_len,
unsigned char *cipher, unsigned short *cipher_len);
void AES_UnWRAP(unsigned char * cipher, int cipher_len,
unsigned char * kek, int kek_len,
unsigned char * plain);
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/include/rom_aes.h
|
C
|
apache-2.0
| 1,141
|
/******************************************************************************
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_DEBUG_H__
#define __RTW_DEBUG_H__
#ifdef PLATFORM_WINDOWS
#define RTW_PRINT do {} while (0)
#define RTW_ERR do {} while (0)
#define RTW_WARN do {} while (0)
#define RTW_INFO do {} while (0)
#define RTW_DBG do {} while (0)
#define RTW_PRINT_SEL do {} while (0)
#define _RTW_PRINT do {} while (0)
#define _RTW_ERR do {} while (0)
#define _RTW_WARN do {} while (0)
#define _RTW_INFO do {} while (0)
#define _RTW_DBG do {} while (0)
#define _RTW_PRINT_SEL do {} while (0)
#else
#define RTW_PRINT(x, ...) do {} while (0)
#define RTW_ERR(x, ...) do {} while (0)
#define RTW_WARN(x,...) do {} while (0)
#define RTW_INFO(x,...) do {} while (0)
#define RTW_DBG(x,...) do {} while (0)
#define RTW_PRINT_SEL(x,...) do {} while (0)
#define _RTW_PRINT(x, ...) do {} while (0)
#define _RTW_ERR(x, ...) do {} while (0)
#define _RTW_WARN(x,...) do {} while (0)
#define _RTW_INFO(x,...) do {} while (0)
#define _RTW_DBG(x,...) do {} while (0)
#define _RTW_PRINT_SEL(x,...) do {} while (0)
#endif
#define _drv_always_ 1
#define _drv_emerg_ 2
#define _drv_alert_ 3
#define _drv_crit_ 4
#define _drv_err_ 5
#define _drv_warning_ 6
#define _drv_notice_ 7
#define _drv_info_ 8
#define _drv_dump_ 9
#define _drv_debug_ 10
#define _module_rtl871x_xmit_c_ BIT(0)
#define _module_xmit_osdep_c_ BIT(1)
#define _module_rtl871x_recv_c_ BIT(2)
#define _module_recv_osdep_c_ BIT(3)
#define _module_rtl871x_mlme_c_ BIT(4)
#define _module_mlme_osdep_c_ BIT(5)
#define _module_rtl871x_sta_mgt_c_ BIT(6)
#define _module_rtl871x_cmd_c_ BIT(7)
#define _module_cmd_osdep_c_ BIT(8)
#define _module_rtl871x_io_c_ BIT(9)
#define _module_io_osdep_c_ BIT(10)
#define _module_os_intfs_c_ BIT(11)
#define _module_rtl871x_security_c_ BIT(12)
#define _module_rtl871x_eeprom_c_ BIT(13)
#define _module_hal_init_c_ BIT(14)
#define _module_hci_hal_init_c_ BIT(15)
#define _module_rtl871x_ioctl_c_ BIT(16)
#define _module_rtl871x_ioctl_set_c_ BIT(17)
#define _module_rtl871x_ioctl_query_c_ BIT(18)
#define _module_rtl871x_pwrctrl_c_ BIT(19)
#define _module_hci_intfs_c_ BIT(20)
#define _module_hci_ops_c_ BIT(21)
#define _module_osdep_service_c_ BIT(22)
#define _module_mp_ BIT(23)
#define _module_hci_ops_os_c_ BIT(24)
#define _module_rtl871x_ioctl_os_c BIT(25)
#define _module_rtl8712_cmd_c_ BIT(26)
#define _module_fwcmd_c_ BIT(27)
#define _module_rtl8192c_xmit_c_ BIT(28)
#define _module_hal_xmit_c_ BIT(28)
#define _module_efuse_ BIT(29)
#define _module_rtl8712_recv_c_ BIT(30)
#define _module_rtl8712_led_c_ BIT(31)
#undef _MODULE_DEFINE_
#if defined _RTW_XMIT_C_
#define _MODULE_DEFINE_ _module_rtl871x_xmit_c_
#elif defined _XMIT_OSDEP_C_
#define _MODULE_DEFINE_ _module_xmit_osdep_c_
#elif defined _RTW_RECV_C_
#define _MODULE_DEFINE_ _module_rtl871x_recv_c_
#elif defined _RECV_OSDEP_C_
#define _MODULE_DEFINE_ _module_recv_osdep_c_
#elif defined _RTW_MLME_C_
#define _MODULE_DEFINE_ _module_rtl871x_mlme_c_
#elif defined _MLME_OSDEP_C_
#define _MODULE_DEFINE_ _module_mlme_osdep_c_
#elif defined _RTW_MLME_EXT_C_
#define _MODULE_DEFINE_ 1
#elif defined _RTW_STA_MGT_C_
#define _MODULE_DEFINE_ _module_rtl871x_sta_mgt_c_
#elif defined _RTW_CMD_C_
#define _MODULE_DEFINE_ _module_rtl871x_cmd_c_
#elif defined _CMD_OSDEP_C_
#define _MODULE_DEFINE_ _module_cmd_osdep_c_
#elif defined _RTW_IO_C_
#define _MODULE_DEFINE_ _module_rtl871x_io_c_
#elif defined _IO_OSDEP_C_
#define _MODULE_DEFINE_ _module_io_osdep_c_
#elif defined _OS_INTFS_C_
#define _MODULE_DEFINE_ _module_os_intfs_c_
#elif defined _RTW_SECURITY_C_
#define _MODULE_DEFINE_ _module_rtl871x_security_c_
#elif defined _RTW_EEPROM_C_
#define _MODULE_DEFINE_ _module_rtl871x_eeprom_c_
#elif defined _HAL_INTF_C_
#define _MODULE_DEFINE_ _module_hal_init_c_
#elif (defined _HCI_HAL_INIT_C_) || (defined _SDIO_HALINIT_C_)
#define _MODULE_DEFINE_ _module_hci_hal_init_c_
#elif defined _RTL871X_IOCTL_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_c_
#elif defined _RTL871X_IOCTL_SET_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_set_c_
#elif defined _RTL871X_IOCTL_QUERY_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_query_c_
#elif defined _RTL871X_PWRCTRL_C_
#define _MODULE_DEFINE_ _module_rtl871x_pwrctrl_c_
#elif defined _RTW_PWRCTRL_C_
#define _MODULE_DEFINE_ 1
#elif defined _HCI_INTF_C_
#define _MODULE_DEFINE_ _module_hci_intfs_c_
#elif defined _HCI_OPS_C_
#define _MODULE_DEFINE_ _module_hci_ops_c_
#elif defined _SDIO_OPS_C_
#define _MODULE_DEFINE_ 1
#elif defined _OSDEP_HCI_INTF_C_
#define _MODULE_DEFINE_ _module_hci_intfs_c_
#elif defined _OSDEP_SERVICE_C_
#define _MODULE_DEFINE_ _module_osdep_service_c_
#elif defined _HCI_OPS_OS_C_
#define _MODULE_DEFINE_ _module_hci_ops_os_c_
#elif defined _RTL871X_IOCTL_LINUX_C_
#define _MODULE_DEFINE_ _module_rtl871x_ioctl_os_c
#elif defined _RTL8712_CMD_C_
#define _MODULE_DEFINE_ _module_rtl8712_cmd_c_
#elif defined _RTL8192C_XMIT_C_
#define _MODULE_DEFINE_ 1
#elif defined _RTL8723AS_XMIT_C_
#define _MODULE_DEFINE_ 1
#elif defined _RTL8712_RECV_C_
#define _MODULE_DEFINE_ _module_rtl8712_recv_c_
#elif defined _RTL8192CU_RECV_C_
#define _MODULE_DEFINE_ _module_rtl8712_recv_c_
#elif defined _RTL871X_MLME_EXT_C_
#define _MODULE_DEFINE_ _module_mlme_osdep_c_
#elif defined _RTW_MP_C_
#define _MODULE_DEFINE_ _module_mp_
#elif defined _RTW_MP_IOCTL_C_
#define _MODULE_DEFINE_ _module_mp_
#elif defined _RTW_EFUSE_C_
#define _MODULE_DEFINE_ _module_efuse_
#endif
#ifdef PLATFORM_OS_CE
extern void rtl871x_cedbg(const char *fmt, ...);
#endif
extern u32 GlobalDebugEnable;
extern u8 OtherDebugPortEnable;
extern u16 GlobalDebugLevel;
#define RT_TRACE_F(_Comp, _Level, Fmt) do{}while(0)
#define _func_enter_ do{}while(0)
#define _func_exit_ do{}while(0)
#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) do{}while(0)
#ifdef PLATFORM_WINDOWS
#define DBG_871X do {} while(0)
#define MSG_8192C do {} while(0)
#define DBG_8192C do {} while(0)
#define DBG_871X_LEVEL do {} while(0)
#else
#define DBG_871X(x, ...) do {} while(0)
#define MSG_8192C(x, ...) do {} while(0)
#define DBG_8192C(x,...) do {} while(0)
#define DBG_871X_LEVEL(x,...) do {} while(0)
#endif
#ifdef CONFIG_BT_COEXIST
#define RTW_INFO(x,...) do {} while (0)
#define RTW_DBG_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0)
#endif
#undef _dbgdump
#ifdef PLATFORM_WINDOWS
#ifdef PLATFORM_OS_XP
#define _dbgdump DbgPrint
#elif defined PLATFORM_OS_CE
#define _dbgdump rtl871x_cedbg
#endif
#elif defined PLATFORM_LINUX
#define _dbgdump printk
#elif defined PLATFORM_ECOS
#define _dbgdump diag_printf
#elif defined(PLATFORM_FREERTOS) || defined(PLATFORM_CMSIS_RTOS) || defined(PLATFORM_CUSTOMER_RTOS)
#define _dbgdump_nr printf("\n\r"); printf
#define _dbgdump printf
#elif defined PLATFORM_FREEBSD
#define _dbgdump printf
#endif
#if !defined(CONFIG_PLATFORM_8195A) && !defined(CONFIG_PLATFORM_8711B) \
&& !defined(CONFIG_PLATFORM_8721D) && !defined(CONFIG_PLATFORM_8195B) \
&& !defined(CONFIG_PLATFORM_8710C)
#define DRIVER_PREFIX "RTL871X: "
#endif
#if defined (_dbgdump)
#undef DBG_871X_LEVEL
#if defined (__ICCARM__) || defined (__CC_ARM) ||defined(__GNUC__)
#define DBG_871X_LEVEL(level, ...) \
do {\
if(GlobalDebugEnable){\
if (level <= GlobalDebugLevel) {\
_dbgdump_nr(DRIVER_PREFIX __VA_ARGS__);\
}\
}\
}while(0)
extern int msg_uart_port(const char *fmt, ...);
#define RTW_PRINT_MSG(...) \
do {\
if(OtherDebugPortEnable){\
msg_uart_port(__VA_ARGS__);\
} else {\
_dbgdump(__VA_ARGS__);\
} \
}while(0)
#else
#define DBG_871X_LEVEL(level, fmt, arg...) \
do {\
if(GlobalDebugEnable){\
if (level <= GlobalDebugLevel) {\
if (level <= _drv_err_ && level > _drv_always_) {\
_dbgdump_nr(DRIVER_PREFIX"ERROR " fmt, ##arg);\
} \
else {\
_dbgdump_nr(DRIVER_PREFIX fmt, ##arg);\
} \
}\
}\
}while(0)
#endif //#ifdef __CC_ARM
#endif
#ifdef CONFIG_DEBUG
#if defined (_dbgdump)
#undef DBG_871X
#define DBG_871X(...) do {\
_dbgdump_nr(DRIVER_PREFIX __VA_ARGS__);\
}while(0)
#undef MSG_8192C
#define MSG_8192C(...) do {\
_dbgdump_nr(DRIVER_PREFIX __VA_ARGS__);\
}while(0)
#undef DBG_8192C
#define DBG_8192C(...) do {\
_dbgdump_nr(DRIVER_PREFIX __VA_ARGS__);\
}while(0)
#endif
#endif /* CONFIG_DEBUG */
//define RTW_INFO to get debug message of phydm
//command phydm dbg can open debug message from uart interface
#if (DBG == 1)
#undef RTW_INFO
#define RTW_INFO(fmt, arg...) \
do {\
_dbgdump_nr(DRIVER_PREFIX fmt, ##arg);\
} while (0)
#endif
#ifdef CONFIG_DEBUG_RTL871X
#ifndef _RTL871X_DEBUG_C_
extern u64 GlobalDebugComponents;
#endif
#if defined (_dbgdump) && defined (_MODULE_DEFINE_)
#undef RT_TRACE_F
#define RT_TRACE_F(_Comp, _Level, Fmt)\
do {\
if((_Comp & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) {\
_dbgdump_nr("%s [0x%08x,%d]", DRIVER_PREFIX, (unsigned int)_Comp, _Level);\
_dbgdump_nr Fmt;\
}\
}while(0)
#endif
#if defined (_dbgdump)
#undef _func_enter_
#define _func_enter_ \
do { \
if (GlobalDebugLevel >= _drv_debug_) \
{ \
_dbgdump_nr("\n %s : %s enters at %d\n", DRIVER_PREFIX, __FUNCTION__, __LINE__);\
} \
} while(0)
#undef _func_exit_
#define _func_exit_ \
do { \
if (GlobalDebugLevel >= _drv_debug_) \
{ \
_dbgdump_nr("\n %s : %s exits at %d\n", DRIVER_PREFIX, __FUNCTION__, __LINE__); \
} \
} while(0)
#undef RT_PRINT_DATA
#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \
if(((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) \
{ \
int __i; \
u8 *ptr = (u8 *)_HexData; \
_dbgdump("\r\n%s", DRIVER_PREFIX); \
_dbgdump(_TitleString "--------Len=%d\n\r", _HexDataLen); \
for( __i=0; __i<(int)_HexDataLen; __i++ ) \
{ \
_dbgdump("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" "); \
if (((__i + 1) % 16) == 0) _dbgdump("\n\r"); \
} \
_dbgdump("\n\r"); \
}
#endif
#endif /* CONFIG_DEBUG_RTL871X */
#ifdef CONFIG_PROC_DEBUG
int proc_get_drv_version(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_write_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_write_reg(struct file *file, const char *buffer,
unsigned long count, void *data);
int proc_get_read_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_read_reg(struct file *file, const char *buffer,
unsigned long count, void *data);
int proc_get_fwstate(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_sec_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mlmext_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_qos_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_ht_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_ap_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_adapter_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_trx_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mac_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mac_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_mac_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_bb_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_bb_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_bb_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rf_reg_dump4(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
#ifdef CONFIG_AP_MODE
int proc_get_all_sta_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
#endif
#ifdef DBG_MEMORY_LEAK
int proc_get_malloc_cnt(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
#endif
#ifdef CONFIG_FIND_BEST_CHANNEL
int proc_get_best_channel(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
#endif
int proc_get_rx_signal(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_rx_signal(struct file *file, const char *buffer,
unsigned long count, void *data);
#ifdef CONFIG_80211N_HT
int proc_get_cbw40_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_cbw40_enable(struct file *file, const char *buffer,
unsigned long count, void *data);
int proc_get_ampdu_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_ampdu_enable(struct file *file, const char *buffer,
unsigned long count, void *data);
int proc_get_rx_stbc(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_rx_stbc(struct file *file, const char *buffer,
unsigned long count, void *data);
#endif //CONFIG_80211N_HT
int proc_get_two_path_rssi(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_get_rssi_disp(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_rssi_disp(struct file *file, const char *buffer,
unsigned long count, void *data);
#endif //CONFIG_PROC_DEBUG
#endif //__RTW_DEBUG_H__
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/include/rtw_debug.h
|
C
|
apache-2.0
| 14,921
|
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
* @file wifi_constants.h
* @author
* @version
* @brief This file provides the data types used for wlan API.
******************************************************************************
*/
#ifndef _WIFI_CONSTANTS_H
#define _WIFI_CONSTANTS_H
/** @addtogroup nic NIC
* @ingroup wlan
* @brief NIC functions
* @{
*/
#ifdef __cplusplus
extern "C" {
#endif
#ifndef WLAN0_NAME
#define WLAN0_NAME "wlan0"
#endif
#ifndef WLAN1_NAME
#define WLAN1_NAME "wlan1"
#endif
#define WEP_ENABLED 0x0001
#define TKIP_ENABLED 0x0002
#define AES_ENABLED 0x0004
#define WSEC_SWFLAG 0x0008
#define AES_CMAC_ENABLED 0x0010
#define ENTERPRISE_ENABLED 0x0020
#define SHARED_ENABLED 0x00008000
#define WPA_SECURITY 0x00200000
#define WPA2_SECURITY 0x00400000
#define WPA3_SECURITY 0x00800000
#define WPS_ENABLED 0x10000000
#define RTW_MAX_PSK_LEN (64)
#define RTW_MIN_PSK_LEN (8)
#define MCSSET_LEN 16
/**
* @brief The enumeration lists the results of the function.
*/
enum
{
RTW_SUCCESS = 0, /**< Success */
RTW_PENDING = 1, /**< Pending */
RTW_TIMEOUT = 2, /**< Timeout */
RTW_PARTIAL_RESULTS = 3, /**< Partial results */
RTW_INVALID_KEY = 4, /**< Invalid key */
RTW_DOES_NOT_EXIST = 5, /**< Does not exist */
RTW_NOT_AUTHENTICATED = 6, /**< Not authenticated */
RTW_NOT_KEYED = 7, /**< Not keyed */
RTW_IOCTL_FAIL = 8, /**< IOCTL fail */
RTW_BUFFER_UNAVAILABLE_TEMPORARY = 9, /**< Buffer unavailable temporarily */
RTW_BUFFER_UNAVAILABLE_PERMANENT = 10, /**< Buffer unavailable permanently */
RTW_WPS_PBC_OVERLAP = 11, /**< WPS PBC overlap */
RTW_CONNECTION_LOST = 12, /**< Connection lost */
RTW_ERROR = -1, /**< Generic Error */
RTW_BADARG = -2, /**< Bad Argument */
RTW_BADOPTION = -3, /**< Bad option */
RTW_NOTUP = -4, /**< Not up */
RTW_NOTDOWN = -5, /**< Not down */
RTW_NOTAP = -6, /**< Not AP */
RTW_NOTSTA = -7, /**< Not STA */
RTW_BADKEYIDX = -8, /**< BAD Key Index */
RTW_RADIOOFF = -9, /**< Radio Off */
RTW_NOTBANDLOCKED = -10, /**< Not band locked */
RTW_NOCLK = -11, /**< No Clock */
RTW_BADRATESET = -12, /**< BAD Rate valueset */
RTW_BADBAND = -13, /**< BAD Band */
RTW_BUFTOOSHORT = -14, /**< Buffer too short */
RTW_BUFTOOLONG = -15, /**< Buffer too long */
RTW_BUSY = -16, /**< Busy */
RTW_NOTASSOCIATED = -17, /**< Not Associated */
RTW_BADSSIDLEN = -18, /**< Bad SSID len */
RTW_OUTOFRANGECHAN = -19, /**< Out of Range Channel */
RTW_BADCHAN = -20, /**< Bad Channel */
RTW_BADADDR = -21, /**< Bad Address */
RTW_NORESOURCE = -22, /**< Not Enough Resources */
RTW_UNSUPPORTED = -23, /**< Unsupported */
RTW_BADLEN = -24, /**< Bad length */
RTW_NOTREADY = -25, /**< Not Ready */
RTW_EPERM = -26, /**< Not Permitted */
RTW_NOMEM = -27, /**< No Memory */
RTW_ASSOCIATED = -28, /**< Associated */
RTW_RANGE = -29, /**< Not In Range */
RTW_NOTFOUND = -30, /**< Not Found */
RTW_WME_NOT_ENABLED = -31, /**< WME Not Enabled */
RTW_TSPEC_NOTFOUND = -32, /**< TSPEC Not Found */
RTW_ACM_NOTSUPPORTED = -33, /**< ACM Not Supported */
RTW_NOT_WME_ASSOCIATION = -34, /**< Not WME Association */
RTW_SDIO_ERROR = -35, /**< SDIO Bus Error */
RTW_WLAN_DOWN = -36, /**< WLAN Not Accessible */
RTW_BAD_VERSION = -37, /**< Incorrect version */
RTW_TXFAIL = -38, /**< TX failure */
RTW_RXFAIL = -39, /**< RX failure */
RTW_NODEVICE = -40, /**< Device not present */
RTW_UNFINISHED = -41, /**< To be finished */
RTW_NONRESIDENT = -42, /**< access to nonresident overlay */
RTW_DISABLED = -43 /**< Disabled in this build */
};
typedef unsigned long rtw_result_t;
/**
* @brief The enumeration lists the possible security types to set when connection.\n
* Station mode supports OPEN, WEP, and WPA2.\n
* AP mode support OPEN and WPA2.
*/
enum {
RTW_SECURITY_OPEN = 0, /**< Open security */
RTW_SECURITY_WEP_PSK = WEP_ENABLED, /**< WEP Security with open authentication */
RTW_SECURITY_WEP_SHARED = ( WEP_ENABLED | SHARED_ENABLED ), /**< WEP Security with shared authentication */
RTW_SECURITY_WPA_TKIP_PSK = ( WPA_SECURITY | TKIP_ENABLED ), /**< WPA Security with TKIP */
RTW_SECURITY_WPA_AES_PSK = ( WPA_SECURITY | AES_ENABLED ), /**< WPA Security with AES */
RTW_SECURITY_WPA_MIXED_PSK = ( WPA_SECURITY | AES_ENABLED | TKIP_ENABLED ), /**< WPA Security with AES & TKIP */
RTW_SECURITY_WPA2_AES_PSK = ( WPA2_SECURITY | AES_ENABLED ), /**< WPA2 Security with AES */
RTW_SECURITY_WPA2_TKIP_PSK = ( WPA2_SECURITY | TKIP_ENABLED ), /**< WPA2 Security with TKIP */
RTW_SECURITY_WPA2_MIXED_PSK = ( WPA2_SECURITY | AES_ENABLED | TKIP_ENABLED ), /**< WPA2 Security with AES & TKIP */
RTW_SECURITY_WPA_WPA2_TKIP_PSK = ( WPA_SECURITY | WPA2_SECURITY | TKIP_ENABLED), /**< WPA/WPA2 Security with TKIP */
RTW_SECURITY_WPA_WPA2_AES_PSK = ( WPA_SECURITY | WPA2_SECURITY | AES_ENABLED), /**< WPA/WPA2 Security with AES */
RTW_SECURITY_WPA_WPA2_MIXED_PSK = ( WPA_SECURITY | WPA2_SECURITY | TKIP_ENABLED | AES_ENABLED), /**< WPA/WPA2 Security with AES & TKIP */
RTW_SECURITY_WPA2_AES_CMAC = ( WPA2_SECURITY | AES_CMAC_ENABLED), /**< WPA2 Security with AES and Management Frame Protection */
RTW_SECURITY_WPA2_ENTERPRISE = ( WPA2_SECURITY | ENTERPRISE_ENABLED ), /**< WPA2 Security with 802.1X authentication>*/
RTW_SECURITY_WPA_WPA2_ENTERPRISE = ( WPA_SECURITY | WPA2_SECURITY | ENTERPRISE_ENABLED), /**<WPA/WPA2 Security with 802.1X authentication>*/
RTW_SECURITY_WPS_OPEN = WPS_ENABLED, /**< WPS with open security */
RTW_SECURITY_WPS_SECURE = (WPS_ENABLED | AES_ENABLED), /**< WPS with AES security */
RTW_SECURITY_WPA3_AES_PSK = (WPA3_SECURITY | AES_ENABLED), /**< WPA3-AES with AES security */
RTW_SECURITY_UNKNOWN = -1, /**< May be returned by scan function if security is unknown. Do not pass this to the join function! */
RTW_SECURITY_FORCE_32_BIT = 0x7fffffff /**< Exists only to force rtw_security_t type to 32 bits */
};
typedef unsigned long rtw_security_t;
enum {
RTW_ENCRYPTION_UNKNOWN = 0,
RTW_ENCRYPTION_OPEN = 1,
RTW_ENCRYPTION_WEP40 = 2,
RTW_ENCRYPTION_WPA_TKIP = 3,
RTW_ENCRYPTION_WPA_AES = 4,
RTW_ENCRYPTION_WPA2_TKIP = 5,
RTW_ENCRYPTION_WPA2_AES = 6,
RTW_ENCRYPTION_WPA2_MIXED = 7,
RTW_ENCRYPTION_WEP104 = 9,
RTW_ENCRYPTION_UNDEF = 0xFF,
};
typedef unsigned long rtw_encryption_t;
enum {
RTW_FALSE = 0,
RTW_TRUE = 1
};
typedef unsigned long rtw_bool_t;
/**
* @brief The enumeration lists the band types.
*/
enum {
RTW_802_11_BAND_5GHZ = 0, /**< Denotes 5GHz radio band */
RTW_802_11_BAND_2_4GHZ = 1 /**< Denotes 2.4GHz radio band */
};
typedef unsigned long rtw_802_11_band_t;
/**
* @brief The enumeration lists all the country codes able to set to Wi-Fi driver.
*/
enum {
/* CHANNEL PLAN */
RTW_COUNTRY_WORLD1, // 0x20
RTW_COUNTRY_ETSI1, // 0x21
RTW_COUNTRY_FCC1, // 0x22
RTW_COUNTRY_MKK1, // 0x23
RTW_COUNTRY_ETSI2, // 0x24
RTW_COUNTRY_FCC2, // 0x2A
RTW_COUNTRY_WORLD2, // 0x47
RTW_COUNTRY_MKK2, // 0x58
RTW_COUNTRY_GLOBAL, // 0x41
/* SPECIAL */
RTW_COUNTRY_WORLD, // WORLD1
RTW_COUNTRY_EU, // ETSI1
/* JAPANESE */
RTW_COUNTRY_JP, // MKK1
/* FCC , 19 countries*/
RTW_COUNTRY_AS, // FCC2
RTW_COUNTRY_BM,
RTW_COUNTRY_CA,
RTW_COUNTRY_DM,
RTW_COUNTRY_DO,
RTW_COUNTRY_FM,
RTW_COUNTRY_GD,
RTW_COUNTRY_GT,
RTW_COUNTRY_GU,
RTW_COUNTRY_HT,
RTW_COUNTRY_MH,
RTW_COUNTRY_MP,
RTW_COUNTRY_NI,
RTW_COUNTRY_PA,
RTW_COUNTRY_PR,
RTW_COUNTRY_PW,
RTW_COUNTRY_TW,
RTW_COUNTRY_US,
RTW_COUNTRY_VI,
/* others, ETSI */
RTW_COUNTRY_AD, // ETSI1
RTW_COUNTRY_AE,
RTW_COUNTRY_AF,
RTW_COUNTRY_AI,
RTW_COUNTRY_AL,
RTW_COUNTRY_AM,
RTW_COUNTRY_AN,
RTW_COUNTRY_AR,
RTW_COUNTRY_AT,
RTW_COUNTRY_AU,
RTW_COUNTRY_AW,
RTW_COUNTRY_AZ,
RTW_COUNTRY_BA,
RTW_COUNTRY_BB,
RTW_COUNTRY_BD,
RTW_COUNTRY_BE,
RTW_COUNTRY_BF,
RTW_COUNTRY_BG,
RTW_COUNTRY_BH,
RTW_COUNTRY_BL,
RTW_COUNTRY_BN,
RTW_COUNTRY_BO,
RTW_COUNTRY_BR,
RTW_COUNTRY_BS,
RTW_COUNTRY_BT,
RTW_COUNTRY_BY,
RTW_COUNTRY_BZ,
RTW_COUNTRY_CF,
RTW_COUNTRY_CH,
RTW_COUNTRY_CI,
RTW_COUNTRY_CL,
RTW_COUNTRY_CN,
RTW_COUNTRY_CO,
RTW_COUNTRY_CR,
RTW_COUNTRY_CX,
RTW_COUNTRY_CY,
RTW_COUNTRY_CZ,
RTW_COUNTRY_DE,
RTW_COUNTRY_DK,
RTW_COUNTRY_DZ,
RTW_COUNTRY_EC,
RTW_COUNTRY_EE,
RTW_COUNTRY_EG,
RTW_COUNTRY_ES,
RTW_COUNTRY_ET,
RTW_COUNTRY_FI,
RTW_COUNTRY_FR,
RTW_COUNTRY_GB,
RTW_COUNTRY_GE,
RTW_COUNTRY_GF,
RTW_COUNTRY_GH,
RTW_COUNTRY_GL,
RTW_COUNTRY_GP,
RTW_COUNTRY_GR,
RTW_COUNTRY_GY,
RTW_COUNTRY_HK,
RTW_COUNTRY_HN,
RTW_COUNTRY_HR,
RTW_COUNTRY_HU,
RTW_COUNTRY_ID,
RTW_COUNTRY_IE,
RTW_COUNTRY_IL,
RTW_COUNTRY_IN,
RTW_COUNTRY_IQ,
RTW_COUNTRY_IR,
RTW_COUNTRY_IS,
RTW_COUNTRY_IT,
RTW_COUNTRY_JM,
RTW_COUNTRY_JO,
RTW_COUNTRY_KE,
RTW_COUNTRY_KH,
RTW_COUNTRY_KN,
RTW_COUNTRY_KP,
RTW_COUNTRY_KR,
RTW_COUNTRY_KW,
RTW_COUNTRY_KY,
RTW_COUNTRY_KZ,
RTW_COUNTRY_LA,
RTW_COUNTRY_LB,
RTW_COUNTRY_LC,
RTW_COUNTRY_LI,
RTW_COUNTRY_LK,
RTW_COUNTRY_LR,
RTW_COUNTRY_LS,
RTW_COUNTRY_LT,
RTW_COUNTRY_LU,
RTW_COUNTRY_LV,
RTW_COUNTRY_MA,
RTW_COUNTRY_MC,
RTW_COUNTRY_MD,
RTW_COUNTRY_ME,
RTW_COUNTRY_MF,
RTW_COUNTRY_MK,
RTW_COUNTRY_MN,
RTW_COUNTRY_MO,
RTW_COUNTRY_MQ,
RTW_COUNTRY_MR,
RTW_COUNTRY_MT,
RTW_COUNTRY_MU,
RTW_COUNTRY_MV,
RTW_COUNTRY_MW,
RTW_COUNTRY_MX,
RTW_COUNTRY_MY,
RTW_COUNTRY_NG,
RTW_COUNTRY_NL,
RTW_COUNTRY_NO,
RTW_COUNTRY_NP,
RTW_COUNTRY_NZ,
RTW_COUNTRY_OM,
RTW_COUNTRY_PE,
RTW_COUNTRY_PF,
RTW_COUNTRY_PG,
RTW_COUNTRY_PH,
RTW_COUNTRY_PK,
RTW_COUNTRY_PL,
RTW_COUNTRY_PM,
RTW_COUNTRY_PT,
RTW_COUNTRY_PY,
RTW_COUNTRY_QA,
RTW_COUNTRY_RS,
RTW_COUNTRY_RU,
RTW_COUNTRY_RW,
RTW_COUNTRY_SA,
RTW_COUNTRY_SE,
RTW_COUNTRY_SG,
RTW_COUNTRY_SI,
RTW_COUNTRY_SK,
RTW_COUNTRY_SN,
RTW_COUNTRY_SR,
RTW_COUNTRY_SV,
RTW_COUNTRY_SY,
RTW_COUNTRY_TC,
RTW_COUNTRY_TD,
RTW_COUNTRY_TG,
RTW_COUNTRY_TH,
RTW_COUNTRY_TN,
RTW_COUNTRY_TR,
RTW_COUNTRY_TT,
RTW_COUNTRY_TZ,
RTW_COUNTRY_UA,
RTW_COUNTRY_UG,
RTW_COUNTRY_UY,
RTW_COUNTRY_UZ,
RTW_COUNTRY_VC,
RTW_COUNTRY_VE,
RTW_COUNTRY_VN,
RTW_COUNTRY_VU,
RTW_COUNTRY_WF,
RTW_COUNTRY_WS,
RTW_COUNTRY_YE,
RTW_COUNTRY_YT,
RTW_COUNTRY_ZA,
RTW_COUNTRY_ZW,
RTW_COUNTRY_MAX
};
typedef unsigned long rtw_country_code_t;
/**
* @brief The enumeration lists the adaptivity types.
*/
enum {
RTW_ADAPTIVITY_DISABLE = 0,
RTW_ADAPTIVITY_NORMAL, // CE
RTW_ADAPTIVITY_CARRIER_SENSE // MKK
};
typedef unsigned long rtw_adaptivity_mode_t;
/**
* @brief The enumeration lists the trp_tis types.
*/
enum {
RTW_TRP_TIS_DISABLE = 0,
RTW_TRP_TIS_NORMAL,
RTW_TRP_TIS_DYNAMIC, // enable dynamic mechanism
RTW_TRP_TIS_FIX_ACK_RATE, // fix ack rate to 6M
};
typedef unsigned long rtw_trp_tis_mode_t;
/**
* @brief The enumeration lists the supported operation mode by WIFI driver,
* including station and AP mode.
*/
enum {
RTW_MODE_NONE = 0,
RTW_MODE_STA,
RTW_MODE_AP,
RTW_MODE_STA_AP,
RTW_MODE_PROMISC,
RTW_MODE_P2P
};
typedef unsigned long rtw_mode_t;
enum {
RTW_SCAN_FULL = 0,
RTW_SCAN_SOCIAL,
RTW_SCAN_ONE
};
typedef unsigned long rtw_scan_mode_t;
/**
* @brief The enumeration lists the supported autoreconnect mode by WIFI driver.
*/
typedef enum{
RTW_AUTORECONNECT_DISABLE,
RTW_AUTORECONNECT_FINITE,
RTW_AUTORECONNECT_INFINITE
} rtw_autoreconnect_mode_t;
/**
* @brief The enumeration lists the status to describe the connection link.
*/
enum {
RTW_LINK_DISCONNECTED = 0,
RTW_LINK_CONNECTED
};
typedef unsigned long rtw_link_status_t;
/**
* @brief The enumeration lists the scan types.
*/
enum {
RTW_SCAN_TYPE_ACTIVE = 0x00, /**< Actively scan a network by sending 802.11 probe(s) */
RTW_SCAN_TYPE_PASSIVE = 0x01, /**< Passively scan a network by listening for beacons from APs */
RTW_SCAN_TYPE_PROHIBITED_CHANNELS = 0x04 /**< Passively scan on channels not enabled by the country code */
};
typedef unsigned long rtw_scan_type_t;
/**
* @brief The enumeration lists the bss types.
*/
enum {
RTW_BSS_TYPE_INFRASTRUCTURE = 0, /**< Denotes infrastructure network */
RTW_BSS_TYPE_ADHOC = 1, /**< Denotes an 802.11 ad-hoc IBSS network */
RTW_BSS_TYPE_ANY = 2, /**< Denotes either infrastructure or ad-hoc network */
RTW_BSS_TYPE_UNKNOWN = -1 /**< May be returned by scan function if BSS type is unknown. Do not pass this to the Join function */
};
typedef unsigned long rtw_bss_type_t;
enum {
RTW_SCAN_COMMAMD = 0x01
};
typedef unsigned long rtw_scan_command_t;
enum{
COMMAND1 = 0x01
};
typedef unsigned long rtw_command_type;
enum {
RTW_WPS_TYPE_DEFAULT = 0x0000,
RTW_WPS_TYPE_USER_SPECIFIED = 0x0001,
RTW_WPS_TYPE_MACHINE_SPECIFIED = 0x0002,
RTW_WPS_TYPE_REKEY = 0x0003,
RTW_WPS_TYPE_PUSHBUTTON = 0x0004,
RTW_WPS_TYPE_REGISTRAR_SPECIFIED = 0x0005,
RTW_WPS_TYPE_NONE = 0x0006,
RTW_WPS_TYPE_WSC = 0x0007
};
typedef unsigned long rtw_wps_type_t;
/**
* @brief The enumeration lists all the network bgn mode.
*/
enum {
RTW_NETWORK_B = 1,
RTW_NETWORK_BG = 3,
RTW_NETWORK_BGN = 11
};
typedef unsigned long rtw_network_mode_t;
/**
* @brief The enumeration lists the interfaces.
*/
enum {
RTW_STA_INTERFACE = 0, /**< STA or Client Interface */
RTW_AP_INTERFACE = 1, /**< SoftAP Interface */
};
typedef unsigned long rtw_interface_t;
/**
* @brief The enumeration lists the packet filter rules.
*/
enum {
RTW_POSITIVE_MATCHING = 0, /**< Receive the data matching with this pattern and discard the other data */
RTW_NEGATIVE_MATCHING = 1 /**< Discard the data matching with this pattern and receive the other data */
};
typedef unsigned long rtw_packet_filter_rule_t;
/**
* @brief The enumeration lists the promisc levels.
*/
enum {
RTW_PROMISC_DISABLE = 0, /**< Disable the promisc */
RTW_PROMISC_ENABLE = 1, /**< Fetch all ethernet packets */
RTW_PROMISC_ENABLE_1 = 2, /**< Fetch only B/M packets */
RTW_PROMISC_ENABLE_2 = 3, /**< Fetch all 802.11 packets*/
RTW_PROMISC_ENABLE_3 = 4, /**< Fetch only B/M 802.11 packets*/
RTW_PROMISC_ENABLE_4 = 5, /**< Fetch all 802.11 packets & MIMO PLCP headers. Please note that the PLCP header would be struct rtw_rx_info_t defined in wifi_structures.h*/
};
typedef unsigned long rtw_rcr_level_t;
/**
* @brief The enumeration lists the promisc rx type.
*/
#if defined(CONFIG_UNSUPPORT_PLCPHDR_RPT) && CONFIG_UNSUPPORT_PLCPHDR_RPT
enum {
RTW_RX_NORMAL = 0, /**< The supported 802.11 packet*/
RTW_RX_UNSUPPORT = 1, /**< Unsupported 802.11 packet info */
};
typedef unsigned long rtw_rx_type_t;
#endif
/**
* @brief The enumeration lists the disconnect reasons.
*/
enum{
RTW_NO_ERROR = 0,
RTW_NONE_NETWORK = 1,
RTW_CONNECT_FAIL = 2,
RTW_WRONG_PASSWORD = 3 ,
RTW_4WAY_HANDSHAKE_TIMEOUT = 4,
RTW_DHCP_FAIL = 5,
RTW_UNKNOWN,
};
typedef unsigned long rtw_connect_error_flag_t;
enum {
RTW_TX_PWR_PERCENTAGE_100 = 0, /* 100%, default target output power. */
RTW_TX_PWR_PERCENTAGE_75 = 1, /* 75% */
RTW_TX_PWR_PERCENTAGE_50 = 2, /* 50% */
RTW_TX_PWR_PERCENTAGE_25 = 3, /* 25% */
RTW_TX_PWR_PERCENTAGE_12_5 = 4, /* 12.5% */
};
typedef unsigned long rtw_tx_pwr_percentage_t;
/**
* @brief The enumeration is event type indicated from wlan driver.
*/
enum _WIFI_EVENT_INDICATE{
WIFI_EVENT_CONNECT = 0,
WIFI_EVENT_DISCONNECT = 1,
WIFI_EVENT_FOURWAY_HANDSHAKE_DONE = 2,
WIFI_EVENT_SCAN_RESULT_REPORT = 3,
WIFI_EVENT_SCAN_DONE = 4,
WIFI_EVENT_RECONNECTION_FAIL = 5,
WIFI_EVENT_SEND_ACTION_DONE = 6,
WIFI_EVENT_RX_MGNT = 7,
WIFI_EVENT_STA_ASSOC = 8,
WIFI_EVENT_STA_DISASSOC = 9,
WIFI_EVENT_STA_WPS_START = 10,
WIFI_EVENT_WPS_FINISH = 11,
WIFI_EVENT_EAPOL_START = 12,
WIFI_EVENT_EAPOL_RECVD = 13,
WIFI_EVENT_NO_NETWORK = 14,
WIFI_EVENT_BEACON_AFTER_DHCP = 15,
WIFI_EVENT_IP_CHANGED = 16,
WIFI_EVENT_ICV_ERROR = 17,
WIFI_EVENT_CHALLENGE_FAIL = 18,
WIFI_EVENT_SOFTAP_START = 19,
WIFI_EVENT_SOFTAP_STOP = 20,
WIFI_EVENT_MAX,
};
typedef unsigned long rtw_event_indicate_t;
#ifdef __cplusplus
}
#endif
/*\@}*/
#endif /* _WIFI_CONSTANTS_H */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/include/wifi_constants.h
|
C
|
apache-2.0
| 18,794
|
#ifndef __WIFI_PERFORMANCE_MONITOR_H__
#define __WIFI_PERFORMANCE_MONITOR_H__
#include <platform_stdlib.h>
#ifdef CONFIG_PLATFORM_8721D
#include "rtl8721d.h"
#endif
struct WIFI_TIME {
// RX related
u32 rx_mpdu_time;
u32 rx_mpdu_time1;
u32 rx_mpdu_time2;
u32 recv_entry_time;
u32 recv_func_time;
u32 recv_func_prehandle_time;
u32 validate_recv_frame_time;
u32 validate_recv_frame_time1;
u32 recv_func_posthandle_time;
u32 recv_func_posthandle_time1;
u32 recv_func_posthandle_time2;
u32 recv_func_posthandle_time3;
u32 process_recv_indicatepkts_time;
u32 rtw_recv_indicatept_time;
u32 rltk_netif_rx_time;
u32 netif_rx_time;
u32 ethernetif_recv_time;
u32 rltk_wlan_recv_time;
u32 netif_input_time;
//TX related
u32 wlan_send_time;
u32 wlan_send_time1;
u32 wlan_send_time2;
u32 wlan_send_skb_time;
u32 xmit_entry_time;
u32 xmit_time;
u32 xmit_time1;
u32 xmit_data_time;
u32 pre_xmitframe_time;
u32 pre_xmitframe_time1;
u32 pre_xmitframe_time2;
u32 xmitframe_direct_time;
u32 xmitframe_coalesce_time;
u32 dump_xframe_time;
};
#ifdef WIFI_PERFORMANCE_MONITOR
extern struct WIFI_TIME wifi_time_test;
void wifi_performance_print();
#define WIFI_MONITOR_TIMER_START(x) do {x = RTIM_TestTimer_GetCount(); \
} while(0);
#define WIFI_MONITOR_TIMER_END(x, len) do { if (len > 500) \
x = x - RTIM_TestTimer_GetCount(); \
else \
x = 0; \
}while(0);
#else
#define WIFI_MONITOR_TIMER_START(x)
#define WIFI_MONITOR_TIMER_END(x, len)
#endif
#endif //__WIFI_PERFORMANCE_MONITOR_H__
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/include/wifi_performance_monitor.h
|
C
|
apache-2.0
| 1,601
|
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
* @file wifi_structures.h
* @author
* @version
* @brief This file provides the data structures used for wlan API.
******************************************************************************
*/
#ifndef _WIFI_STRUCTURES_H
#define _WIFI_STRUCTURES_H
/** @addtogroup nic NIC
* @ingroup wlan
* @brief NIC functions
* @{
*/
//#include <freertos/freertos_service.h>
#include "wifi_constants.h"
#include "dlist.h"
#ifdef __cplusplus
extern "C" {
#endif
#if defined(__IAR_SYSTEMS_ICC__) || defined (__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack(1)
#endif
/**
* @brief The structure is used to describe the SSID.
*/
typedef struct rtw_ssid {
unsigned char len; /**< SSID length */
unsigned char val[33]; /**< SSID name (AP name) */
} rtw_ssid_t;
#if defined(__IAR_SYSTEMS_ICC__) || defined (__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack()
#endif
#if defined(__IAR_SYSTEMS_ICC__) || defined (__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack(1)
#endif
/**
* @brief The structure is used to describe the unique 6-byte MAC address.
*/
typedef struct rtw_mac {
unsigned char octet[6]; /**< Unique 6-byte MAC address */
} rtw_mac_t;
#if defined(__IAR_SYSTEMS_ICC__) || defined (__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack()
#endif
/**
* @brief The structure is used to describe the setting about SSID,
* security type, password and default channel, used to start AP mode.
* @note The data length of string pointed by ssid should not exceed 32,
* and the data length of string pointed by password should not exceed 64.
*/
typedef struct rtw_ap_info {
rtw_ssid_t ssid;
rtw_security_t security_type;
unsigned char *password;
int password_len;
int channel;
}rtw_ap_info_t;
/**
* @brief The structure is used to describe the station mode setting about SSID,
* security type and password, used when connecting to an AP.
* @note The data length of string pointed by ssid should not exceed 32,
* and the data length of string pointed by password should not exceed 64.
*/
typedef struct rtw_network_info {
rtw_ssid_t ssid;
rtw_mac_t bssid;
rtw_security_t security_type;
unsigned char *password;
int password_len;
int key_id;
}rtw_network_info_t;
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack(1)
#endif
/**
* @brief The structure is used to describe the scan result of the AP.
*/
typedef struct rtw_scan_result {
rtw_ssid_t SSID; /**< Service Set Identification (i.e. Name of Access Point) */
rtw_mac_t BSSID; /**< Basic Service Set Identification (i.e. MAC address of Access Point) */
signed short signal_strength; /**< Receive Signal Strength Indication in dBm. <-90=Very poor, >-30=Excellent */
rtw_bss_type_t bss_type; /**< Network type */
rtw_security_t security; /**< Security type */
rtw_wps_type_t wps_type; /**< WPS type */
unsigned int channel; /**< Radio channel that the AP beacon was received on */
rtw_802_11_band_t band; /**< Radio band */
} rtw_scan_result_t;
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack()
#endif
/**
* @brief The structure is used to describe the data needed by scan result handler function.
*/
typedef struct rtw_scan_handler_result {
rtw_scan_result_t ap_details;
rtw_bool_t scan_complete;
void* user_data;
} rtw_scan_handler_result_t;
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack(1)
#endif
/**
* @brief The structure is used to store the WIFI setting gotten from WIFI driver.
*/
typedef struct rtw_wifi_setting {
rtw_mode_t mode;
unsigned char ssid[33];
unsigned char channel;
rtw_security_t security_type;
unsigned char password[65];
unsigned char key_idx;
}rtw_wifi_setting_t;
#if defined(__IAR_SYSTEMS_ICC__) || defined(__GNUC__) || defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#pragma pack()
#endif
/**
* @brief The structure is used to describe the setting when configure the network.
*/
typedef struct rtw_wifi_config {
unsigned int boot_mode;
unsigned char ssid[32];
unsigned char ssid_len;
unsigned char security_type;
unsigned char password[65];
unsigned char password_len;
unsigned char channel;
} rtw_wifi_config_t;
/**
* @brief The structure is used to describe the maclist.
*/
typedef struct
{
unsigned int count; /**< Number of MAC addresses in the list */
rtw_mac_t mac_list[1]; /**< Variable length array of MAC addresses */
} rtw_maclist_t;
/**
* @brief The structure is used to describe the bss info of the network.\n
* It include the version, BSSID, beacon_period, capability, SSID,
* channel, atm_window, dtim_period, RSSI e.g.
*/
typedef struct {
unsigned int version; /**< version field */
unsigned int length; /**< byte length of data in this record, */
/* starting at version and including IEs */
rtw_mac_t BSSID;
unsigned short beacon_period; /**< units are Kusec */
unsigned short capability; /**< Capability information */
unsigned char SSID_len;
unsigned char SSID[32];
unsigned char channel;
// struct {
// uint32_t count; /* # rates in this set */
// uint8_t rates[16]; /* rates in 500kbps units w/hi bit set if basic */
// } rateset; /* supported rates */
// rtw_chanspec_t chanspec; /* chanspec for bss */
unsigned short atim_window; /**< units are Kusec */
unsigned char dtim_period; /**< DTIM period */
signed short RSSI; /**< receive signal strength (in dBm) */
unsigned char n_cap; /**< BSS is 802.11N Capable */
unsigned int nbss_cap; /**< 802.11N BSS Capabilities (based on HT_CAP_*) */
unsigned char basic_mcs[MCSSET_LEN]; /**< 802.11N BSS required MCS set */
unsigned short ie_offset; /**< offset at which IEs start, from beginning */
unsigned int ie_length; /**< byte length of Information Elements */
} rtw_bss_info_t;
/**
* @brief The structure is used to set WIFI packet filter pattern.
*/
typedef struct {
unsigned short offset; /**< Offset in bytes to start filtering (referenced to the start of the ethernet packet) */
unsigned short mask_size; /**< Size of the mask in bytes */
unsigned char* mask; /**< Pattern mask bytes to be ANDed with the pattern eg. "\xff00" (must be in network byte order) */
unsigned char* pattern; /**< Pattern bytes used to filter eg. "\x0800" (must be in network byte order) */
} rtw_packet_filter_pattern_t;
typedef struct ieee80211_frame_info{
unsigned short i_fc;
unsigned short i_dur;
unsigned char i_addr1[6];
unsigned char i_addr2[6];
unsigned char i_addr3[6];
unsigned short i_seq;
unsigned char bssid[6];
unsigned char encrypt;
signed char rssi;
#if defined(CONFIG_UNSUPPORT_PLCPHDR_RPT) && CONFIG_UNSUPPORT_PLCPHDR_RPT
rtw_rx_type_t type;
#endif
}ieee80211_frame_info_t;
#if defined(CONFIG_UNSUPPORT_PLCPHDR_RPT) && CONFIG_UNSUPPORT_PLCPHDR_RPT
typedef struct rtw_rx_info {
unsigned short length; // length without FCS
unsigned char filter; // 1: HT-20 2T and not LDPC pkt; 2: HT-40 2T and not LDPC pkt; 3: LDPC pkt
signed char rssi; // -128~-1
unsigned short channel; // channel which this pkt in
unsigned char agg:1; // aggregation pkt or not. If an AMPDU contains only one MPDU then above 'length' is the antual pkt length without FCS, buuut if it contains multiple MPDUs then above 'length' is useless because it cannot tell how many MPDUs are contained and how long is each MPDU.
unsigned char mcs:7; // mcs index
}rtw_rx_info_t;
struct rtw_plcp_info {
struct rtw_plcp_info *prev;
struct rtw_plcp_info *next;
rtw_rx_info_t rtw_plcp_info;
};
struct rtw_rx_buffer {
struct rtw_plcp_info *head;
struct rtw_plcp_info *tail;
};
#endif
typedef struct {
char filter_id;
rtw_packet_filter_pattern_t patt;
rtw_packet_filter_rule_t rule;
unsigned char enable;
}rtw_packet_filter_info_t;
typedef struct rtw_mac_filter_list{
struct list_head node;
unsigned char mac_addr[6];
}rtw_mac_filter_list_t;
typedef struct wowlan_pattern {
unsigned char eth_da[6];
unsigned char eth_sa[6];
unsigned char eth_proto_type[2];
unsigned char header_len[1];
//unsigned char header_content[8];
unsigned char ip_proto[1];
//unsigned char checksum[2];
unsigned char ip_sa[4];
unsigned char ip_da[4];
unsigned char src_port[2];
unsigned char dest_port[2];
unsigned char mask[5];
} wowlan_pattern_t;
#ifdef __cplusplus
}
#endif
/*\@}*/
#endif /* _WIFI_STRUCTURES_H */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/include/wifi_structures.h
|
C
|
apache-2.0
| 10,658
|
#include "rtw_opt_crypto_ssl.h"
#include "osdep_service.h"
/****************************************************************************************************
Function of Initialization
****************************************************************************************************/
int rtw_platform_set_calloc_free( void * (*calloc_func)( size_t, size_t ),
void (*free_func)( void * ) )
{
//mbedtls_platform_set_calloc_free(calloc_func, free_func);
}
/****************************************************************************************************
Function of ECC Algorithm
****************************************************************************************************/
static const unsigned char secp224r1_a[]={
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFE};
//***************************************************************************************************
// \brief initialization of ecp curve with group id
//
// \param ecc pointer of ecc curve structure
// \param group_id group_id defined by spec 12.4
//
// \return 0 if successful,
// -1 if group_id is not supported
//***************************************************************************************************
int rtw_crypto_ecc_init(sae_ecc_crypto *ecc,unsigned char group_id)
{
int ret = 0;
mbedtls_ecp_group_init(ecc);
switch (group_id){
case 19:
mbedtls_ecp_group_load( ecc, MBEDTLS_ECP_DP_SECP256R1);
mbedtls_mpi_init(&ecc->A);
mbedtls_mpi_copy(&ecc->A,&ecc->P);
mbedtls_mpi_set_bit(&ecc->A,0,0);
mbedtls_mpi_set_bit(&ecc->A,1,0);
break;
case 20:
mbedtls_ecp_group_load( ecc, MBEDTLS_ECP_DP_SECP384R1);
mbedtls_mpi_init(&ecc->A);
mbedtls_mpi_copy(&ecc->A,&ecc->P);
mbedtls_mpi_set_bit(&ecc->A,0,0);
mbedtls_mpi_set_bit(&ecc->A,1,0);
break;
case 21:
mbedtls_ecp_group_load( ecc, MBEDTLS_ECP_DP_SECP521R1);
mbedtls_mpi_init(&ecc->A);
mbedtls_mpi_copy(&ecc->A,&ecc->P);
mbedtls_mpi_set_bit(&ecc->A,0,0);
mbedtls_mpi_set_bit(&ecc->A,1,0);
break;
case 25:
mbedtls_ecp_group_load( ecc, MBEDTLS_ECP_DP_SECP192R1);
mbedtls_mpi_init(&ecc->A);
mbedtls_mpi_copy(&ecc->A,&ecc->P);
mbedtls_mpi_set_bit(&ecc->A,0,0);
mbedtls_mpi_set_bit(&ecc->A,1,0);
break;
case 26:
mbedtls_ecp_group_load( ecc, MBEDTLS_ECP_DP_SECP224R1);
mbedtls_mpi_init(&ecc->A);
mbedtls_mpi_read_binary(&ecc->A,secp224r1_a,28);
break;
default:
printf("\r\nmbedtls_ecc_init: no available ecc type: %d \n",group_id);
ret = -1;
break;
}
return ret;
}
//***************************************************************************************************
// \brief free of ecp curve
//
// \param ecc pointer of ecc curve structure
//
// \return void
//
//***************************************************************************************************
void rtw_crypto_ecc_free(sae_ecc_crypto *ecc)
{
mbedtls_mpi_free(&ecc->A);
mbedtls_ecp_group_free(ecc);
}
//***************************************************************************************************
// \brief get Parameter A of ECC
//
// \param ecc pointer of ecc curve structure
// \param a pointer of big number of a
//
// \return 0 if successful
// -1 if fail
//
//***************************************************************************************************
int rtw_crypto_ecc_get_param_a(sae_ecc_crypto *ecc, sae_crypto_bignum *a)
{
int ret = 0;
if((ecc == NULL) || (a == NULL)){
ret = -1;
return ret;
}
MBEDTLS_MPI_CHK(mbedtls_mpi_copy(a,&ecc->A));
cleanup:
return ret;
}
//***************************************************************************************************
// \brief get Parameter B of ECC
//
// \param ecc pointer of ecc curve structure
// \param a pointer of big number of a
//
// \return 0 if successful
// -1 if fail
//
//***************************************************************************************************
int rtw_crypto_ecc_get_param_b(sae_ecc_crypto *ecc, sae_crypto_bignum *b)
{
int ret = 0;
if((ecc == NULL) || (b == NULL)){
ret = -1;
return ret;
}
MBEDTLS_MPI_CHK(mbedtls_mpi_copy(b,&ecc->B));
cleanup:
return ret;
}
//***************************************************************************************************
// \brief get Order of ECC
//
// \param ecc pointer of ecc curve structure
// \param n pointer of big number of a
//
// \return 0 if successful
// -1 if fail
//
//***************************************************************************************************
int rtw_crypto_ecc_get_param_order(sae_ecc_crypto *ecc, sae_crypto_bignum *n)
{
int ret = 0;
if((ecc == NULL) || (n == NULL)){
ret = -1;
return ret;
}
MBEDTLS_MPI_CHK(mbedtls_mpi_copy(n,&ecc->N));
cleanup:
return ret;
}
//***************************************************************************************************
// \brief get Parameter B of ECC
//
// \param ecc pointer of ecc curve structure
// \param a pointer of big number of a
//
// \return 0 if successful
// -1 if fail
//
//***************************************************************************************************
int rtw_crypto_ecc_get_param_prime(sae_ecc_crypto *ecc, sae_crypto_bignum *prime)
{
int ret = 0;
if((ecc == NULL) || (prime == NULL)){
ret = -1;
return ret;
}
MBEDTLS_MPI_CHK(mbedtls_mpi_copy(prime,&ecc->P));
cleanup:
return ret;
}
/*********************************************************************************************
// \brief: import point from bignum
// \param ecc: pointer of ecc
// \param x: input point x
// \param y: input point y
// \param p: import point
//
return: 0 if successful
-1 if failed
*********************************************************************************************/
int rtw_crypto_ecc_point_read_bignum(sae_ecc_crypto *ecc,sae_crypto_bignum *x,sae_crypto_bignum *y,sae_ecc_point *p)
{
int ret = 0;
unsigned char *buf = NULL;
unsigned int buf_len;
unsigned int prime_len;
if((ecc == NULL) || (x == NULL) || (y == NULL) || (p == NULL)){
ret = -1;
goto cleanup;
}
prime_len = mbedtls_mpi_size(&ecc->P);
buf_len = 2*prime_len + 1;
buf = rtw_zmalloc(buf_len);
if(buf == NULL){
ret = -1;
goto cleanup;
}
buf[0] = 0x04;
if(rtw_crypto_bignum_write_binary(x,buf + 1,prime_len) < 0){
ret = -1;
goto cleanup;
}
if(rtw_crypto_bignum_write_binary(y,buf + 1 + prime_len,prime_len) < 0){
ret = -1;
goto cleanup;
}
ret = mbedtls_ecp_point_read_binary(ecc,p,buf,buf_len);
cleanup:
if(buf)
rtw_mfree(buf,buf_len);
return ret;
}
/*********************************************************************************************
brief: export point to bignum
Parameter: ecc: pointer of ecc
x: output point x
y: output point y
p: export point of ecc
return: 0 if successful
-1 if failed
*********************************************************************************************/
int rtw_crypto_ecc_point_write_bignum(sae_ecc_crypto *ecc,sae_crypto_bignum *x,sae_crypto_bignum *y,sae_ecc_point *p)
{
int ret = 0;
unsigned char *buf = NULL;
unsigned int buf_len;
unsigned int prime_len;
unsigned int out_len = 0;
if((ecc == NULL) || (x == NULL) || (y == NULL) || (p == NULL)){
ret = -1;
goto cleanup;
}
prime_len = mbedtls_mpi_size(&ecc->P);
buf_len = 2*prime_len + 1;
buf = rtw_zmalloc(buf_len);
if(buf == NULL){
ret = -1;
goto cleanup;
}
if(mbedtls_ecp_point_write_binary(ecc,p,MBEDTLS_ECP_PF_UNCOMPRESSED,&out_len,buf,buf_len) <0 ){
ret = -1;
goto cleanup;
}
if(rtw_crypto_bignum_read_binary(x,buf + 1, prime_len) < 0){
ret = -1;
goto cleanup;
}
if(rtw_crypto_bignum_read_binary(y,buf + 1 + prime_len, prime_len) < 0){
ret = -1;
goto cleanup;
}
cleanup:
if(buf)
rtw_mfree(buf,buf_len);
return ret;
}
//***************************************************************************************************
// \brief Initialize one ecc point
//
// \param point pointer to ecc point
//
// \return void
//
//***************************************************************************************************
void rtw_crypto_ecc_point_init(sae_ecc_point *point)
{
mbedtls_ecp_point_init(point);
}
//***************************************************************************************************
// \brief Free one ecc point
//
// \param point pointer to ecc point
//
// \return void
//
//***************************************************************************************************
void rtw_crypto_ecc_point_free(sae_ecc_point *point)
{
mbedtls_ecp_point_free(point);
}
//***************************************************************************************************
// \brief check the ecc point is the infinity point
//
// \param point pointer to ecc point
//
// \return 0 none-infinity
// 1 infinity
//***************************************************************************************************
int rtw_crypto_ecc_point_is_at_infinity(sae_ecc_point *point)
{
return mbedtls_ecp_is_zero(point);
}
//***************************************************************************************************
// \brief R = m * P
//
// \param ecc pointer of ecc curve structure
// \param R pointer to the result ecc point
// \param m pointer to a bignum
// \param P pointer to the source
// \return 0 success
// -1 fail
//***************************************************************************************************
int rtw_crypto_ecc_point_mul_bignum(sae_ecc_crypto *ecc,sae_ecc_point *R,sae_crypto_bignum *m,sae_ecc_point *P)
{
int ret = 0;
MBEDTLS_MPI_CHK( mbedtls_ecp_mul( ecc, R, m, P, NULL, NULL ));
cleanup:
if(ret < 0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief justify if the ecc point is on the curve
//
// \param ecc pointer of ecc curve structure
// \param P pointer to the ecc point
// \return 0 yes
// -1 no
//***************************************************************************************************
int rtw_crypto_ecc_point_is_on_curve(sae_ecc_crypto *ecc,sae_ecc_point *P)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_ecp_check_pubkey(ecc,P));
cleanup:
if(ret < 0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief X = A + B
//
// \param ecc pointer of ecc curve structure
// \param X pointer of destination point
// \param A pointer of left hand point
// \param B pointer of right hand point
//
// \return 0 success
// -1 fail
//***************************************************************************************************
int rtw_crypto_ecc_point_add_point(sae_ecc_crypto *ecc,sae_ecc_point *X,sae_ecc_point *A,sae_ecc_point *B)
{
int ret = 0;
mbedtls_mpi one;
mbedtls_mpi_init(&one);
MBEDTLS_MPI_CHK(mbedtls_mpi_lset(&one,1));
MBEDTLS_MPI_CHK(mbedtls_ecp_muladd(ecc,X,&one,A,&one,B));
cleanup:
if(ret < 0)
ret = -1;
mbedtls_mpi_free(&one);
return ret;
}
//***************************************************************************************************
// \brief compare two ecc points
//
// \param ecc pointer of ecc curve structure
// \param P1 pointer of left hand point
// \param P2 pointer of right hand point
//
// \return 0 P1 = P2
// <0 P1 != P2
//***************************************************************************************************
int rtw_crypto_ecc_point_cmp(sae_ecc_point *P1,sae_ecc_point *P2)
{
return mbedtls_ecp_point_cmp(P1,P2);
}
/****************************************************************************************************
Function of Big number Operation and computation
****************************************************************************************************/
//***************************************************************************************************
// \brief Initialize one Big number
// This just makes it ready to be set or freed, but does not define a value for the MPI
//
// \param X pointer of one big number to be initialized
//
// \return void
//
//***************************************************************************************************
void rtw_crypto_bignum_init(sae_crypto_bignum *X)
{
mbedtls_mpi_init(X);
}
//***************************************************************************************************
// \brief unallocate one big number
//
// \param X pointer of big number to be unallocated
//
// \return void
//
//***************************************************************************************************
void rtw_crypto_bignum_free(sae_crypto_bignum *X)
{
mbedtls_mpi_free(X);
}
//***************************************************************************************************
// \brief Copy the contents of Y into X
//
// \param X pointer of destination big number
// \param Y pointer of source big number
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_copy(sae_crypto_bignum *X,sae_crypto_bignum *Y)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_copy(X,Y));
cleanup:
if((ret) < 0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief Return the number of bits up to and including the most significant '1' bit'
//
// \param X pointer of big number to use
//
// \return length of bit
//
//***************************************************************************************************
size_t rtw_crypto_bignum_bitlen(sae_crypto_bignum *X)
{
return mbedtls_mpi_bitlen(X);
}
//***************************************************************************************************
// \brief Get a specific bit from X
//
// \param X pointer of big number to use
// \param pos Zero-based index of the bit in X
//
// \return either 0 or 1
//
//***************************************************************************************************
size_t rtw_crypto_bignum_get_bit(sae_crypto_bignum *X,size_t pos)
{
return mbedtls_mpi_get_bit(X,pos);
}
//***************************************************************************************************
// \brief return the total size in bytes
//
// \param X pointer of big number to use
//
// \return total size of big number in bytes
//
//***************************************************************************************************
size_t rtw_crypto_bignum_size(sae_crypto_bignum *X)
{
return mbedtls_mpi_size(X);
}
//***************************************************************************************************
// \brief Import X from unsigned binary data, big endian
//
// \param X pointer of destination big number
// \param buf pointer of input buffer
// \param buf_len input buffer size
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_read_binary(sae_crypto_bignum *X,const unsigned char *buf, size_t buf_len)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_read_binary(X,buf,buf_len));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief Export X into unsigned binary data, big endian.
// Always fills the whole buffer, which will start with zeros if the number is smaller.
//
// \param X pointer of source big number
// \param buf pointer of output buffer
// \param buf_len output buffer size
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_write_binary(sae_crypto_bignum *X,unsigned char *buf, size_t buf_len)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_write_binary(X,buf,buf_len));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief Right-shift: X >>= count
//
// \param X pointer of big number to shift
// \param count amount to shift
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_shift_r(sae_crypto_bignum *X,size_t count)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_shift_r(X,count));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief Compare signed values
//
// \param X pointer of left hand big number
// \param Y pointer of right hand big number
//
// \return 1 if X is greater than Y
// -1 if X is lesser than Y
// 0 if X is equal to Y
//
//***************************************************************************************************
int rtw_crypto_bignum_cmp_bignum(sae_crypto_bignum *X,sae_crypto_bignum *Y)
{
return mbedtls_mpi_cmp_mpi(X,Y);
}
//***************************************************************************************************
// \brief Compare signed values
//
// \param X pointer of left hand big number
// \param z The integer value to compare to
//
// \return 1 if X is greater than z
// -1 if X is lesser than z
// 0 if X is equal to z
//
//***************************************************************************************************
int rtw_crypto_bignum_cmp_int(sae_crypto_bignum *X,int z)
{
return mbedtls_mpi_cmp_int(X,z);
}
//***************************************************************************************************
// \brief Signed addition:X = A + B
//
// \param X pointer of destination big number
// \param A pointer of left hand big number
// \param B pointer of right hand big number
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_add_bignum(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *B)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(X,A,B));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief Signed addition: X = A + b
//
// \param X pointer of destination big number
// \param A pointer of left hand big number
// \param b The integer value to add
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_add_int(sae_crypto_bignum *X,sae_crypto_bignum *A,int b)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_add_int(X,A,b));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief Signed addition: X = A - B
//
// \param X pointer of destination big number
// \param A pointer of left hand big number
// \param B pointer of right hand big number
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_sub_bignum(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *B)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_sub_mpi(X,A,B));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief Signed addition: X = A - b
//
// \param X point of destination big number
// \param A point of left hand big number
// \param b The integer value to subtract
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_sub_int(sae_crypto_bignum *X,sae_crypto_bignum *A,int b)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_sub_int(X,A,b));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief Division by big number: A = Q * B + R
//
// \param Q pointer of destination big number for the quotient
// \param R pointer of destination big number for the rest value
// \param A pointer of left hand big number
// \param B pointer of right hand big number
//
// \return 0 if successful
// -1 if failed
//
// \note Either Q or R can be NULL.
//***************************************************************************************************
int rtw_crypto_bignum_div_bignum(sae_crypto_bignum *Q,sae_crypto_bignum *R,sae_crypto_bignum *A,sae_crypto_bignum *B)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_div_mpi(Q,R,A,B));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief X = A mod N
//
// \param X pointer of destination big number
// \param A pointer of left hand big number
// \param N pointer of modular big number
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_mod_bignum(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *N)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(X,A,N));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief X = (A + B) mod N
//
// \param X pointer of destination big number
// \param A pointer of left hand big number
// \param B pointer of right hand big number
// \param N pointer of modular big number
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_add_mod(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *B,sae_crypto_bignum *N)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_add_mpi(X,A,B));
MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(X,X,N));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief X = (A * B) mod N
//
// \param X pointer of destination big number
// \param A pointer of left hand big number
// \param B pointer of right hand big number
// \param N pointer of modular big number
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_mul_mod(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *B,sae_crypto_bignum *N)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_mul_mpi(X,A,B));
MBEDTLS_MPI_CHK(mbedtls_mpi_mod_mpi(X,X,N));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief X = (A ^ B) mod N
//
// \param X pointer of destination big number
// \param A pointer of left hand big number
// \param B pointer of right hand big number
// \param N pointer of modular big number
//
// \return 0 if successful
// -1 if failed
//
//***************************************************************************************************
int rtw_crypto_bignum_exp_mod(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *B,sae_crypto_bignum *N)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_exp_mod(X,A,B,N,NULL));
cleanup:
if((ret)<0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief assign Y ==> X
//
// \param X pointer to bignum X
// \param Y pointer to bignum Y
// \param inv assign or not
//
// \return 0 if successful
// -1 if failed
//***************************************************************************************************
int rtw_crypto_bignum_assign(sae_crypto_bignum *X, sae_crypto_bignum *Y,unsigned char inv)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_safe_cond_assign(X,Y,inv));
cleanup:
if(ret < 0)
ret = -1;
return ret;
}
//***************************************************************************************************
// \brief X = A^-1 mod N
//
// \param X pointer to bignum X
// \param Y pointer to bignum Y
// \param inv assign or not
//
// \return 0 if successful
// -1 if failed
//***************************************************************************************************
int rtw_crypto_bignum_inverse(sae_crypto_bignum *X, sae_crypto_bignum *A,sae_crypto_bignum *N)
{
int ret = 0;
MBEDTLS_MPI_CHK(mbedtls_mpi_inv_mod(X,A,N));
cleanup:
if(ret < 0)
ret = -1;
return ret;
}
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/core/option/rtw_opt_crypto_ssl.c
|
C
|
apache-2.0
| 27,043
|
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTW_SAE_CRYPTO_MBEDTLS_H_
#define __RTW_SAE_CRYPTO_MBEDTLS_H_
#if !defined(MBEDTLS_CONFIG_FILE)
#include "mbedtls/config.h"
#else
#include MBEDTLS_CONFIG_FILE
#endif
#include "mbedtls/ecp.h"
#include "mbedtls/sha256.h"
/************************************************************************************************
Structure definition
*************************************************************************************************/
#define sae_ecc_crypto mbedtls_ecp_group
#define sae_crypto_bignum mbedtls_mpi
#define sae_ecc_point mbedtls_ecp_point
/************************************************************************************************
Function Declaration
************************************************************************************************/
//Initialization Function
int rtw_platform_set_calloc_free( void * (*calloc_func)( size_t, size_t ), void (*free_func)( void * ) );
//ECC Alogorithm Function
int rtw_crypto_ecc_init(sae_ecc_crypto *ecc,unsigned char group_id);
void rtw_crypto_ecc_free(sae_ecc_crypto *ecc);
int rtw_crypto_ecc_get_param_a(sae_ecc_crypto *ecc, sae_crypto_bignum *a);
int rtw_crypto_ecc_get_param_b(sae_ecc_crypto *ecc, sae_crypto_bignum *b);
int rtw_crypto_ecc_get_param_order(sae_ecc_crypto *ecc, sae_crypto_bignum *n);
int rtw_crypto_ecc_get_param_prime(sae_ecc_crypto *ecc, sae_crypto_bignum *prime);
int rtw_crypto_ecc_point_write_bignum(sae_ecc_crypto *ecc,sae_crypto_bignum *x,sae_crypto_bignum *y,sae_ecc_point *p);
int rtw_crypto_ecc_point_read_bignum(sae_ecc_crypto *ecc,sae_crypto_bignum *x,sae_crypto_bignum *y,sae_ecc_point *p);
void rtw_crypto_ecc_point_init(sae_ecc_point *point);
void rtw_crypto_ecc_point_free(sae_ecc_point *point);
int rtw_crypto_ecc_point_mul_bignum(sae_ecc_crypto *ecc,sae_ecc_point *R,sae_crypto_bignum *m,sae_ecc_point *P);
int rtw_crypto_ecc_point_add_point(sae_ecc_crypto *ecc,sae_ecc_point *X,sae_ecc_point *A,sae_ecc_point *B);
int rtw_crypto_ecc_point_is_at_infinity(sae_ecc_point *point);
int rtw_crypto_ecc_point_is_on_curve(sae_ecc_crypto *ecc,sae_ecc_point *P);
int rtw_crypto_ecc_point_cmp(sae_ecc_point *P1,sae_ecc_point *P2);
//Big number operation and computatio Function
#define SAE_BIGNUM_CHK(f) do { if( ( ret = f ) != 0 ) goto cleanup; } while( 0 )
void rtw_crypto_bignum_init(sae_crypto_bignum *X);
void rtw_crypto_bignum_free(sae_crypto_bignum *X);
int rtw_crypto_bignum_copy(sae_crypto_bignum *X,sae_crypto_bignum *Y);
size_t rtw_crypto_bignum_bitlen(sae_crypto_bignum *X);
size_t rtw_crypto_bignum_get_bit(sae_crypto_bignum *X,size_t pos);
size_t rtw_crypto_bignum_size(sae_crypto_bignum *X);
int rtw_crypto_bignum_read_binary(sae_crypto_bignum *X, const unsigned char *buf, size_t buf_len);
int rtw_crypto_bignum_write_binary(sae_crypto_bignum *X,unsigned char *buf, size_t buf_len);
int rtw_crypto_bignum_shift_r(sae_crypto_bignum *X,size_t count);
int rtw_crypto_bignum_cmp_bignum(sae_crypto_bignum *X,sae_crypto_bignum *Y);
int rtw_crypto_bignum_cmp_int(sae_crypto_bignum *X,int z);
int rtw_crypto_bignum_add_bignum(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *B);
int rtw_crypto_bignum_add_int(sae_crypto_bignum *X,sae_crypto_bignum *A,int b);
int rtw_crypto_bignum_sub_bignum(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *B);
int rtw_crypto_bignum_sub_int(sae_crypto_bignum *X,sae_crypto_bignum *A,int b);
int rtw_crypto_bignum_div_bignum(sae_crypto_bignum *Q,sae_crypto_bignum *R,sae_crypto_bignum *A,sae_crypto_bignum *B);
int rtw_crypto_bignum_mod_bignum(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *N);
int rtw_crypto_bignum_add_mod(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *B,sae_crypto_bignum *N);
int rtw_crypto_bignum_mul_mod(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *B,sae_crypto_bignum *N);
int rtw_crypto_bignum_exp_mod(sae_crypto_bignum *X,sae_crypto_bignum *A,sae_crypto_bignum *B,sae_crypto_bignum *N);
int rtw_crypto_bignum_assign(sae_crypto_bignum *X, sae_crypto_bignum *Y,unsigned char inv);
int rtw_crypto_bignum_inverse(sae_crypto_bignum *X, sae_crypto_bignum *A,sae_crypto_bignum *N);
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/core/option/rtw_opt_crypto_ssl.h
|
C
|
apache-2.0
| 4,488
|
/******************************************************************************
* PHY_REG_PG.TXT
******************************************************************************/
// Note: power index value = power*2
// => ex: 16dBm => 0x32 , 13dBm => 0x26, 0x26262830 => 13 13 14 15 dBm
unsigned int Array_MP_8195A_PHY_REG_PG[] = {
0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003200,// 1M (16 dBm)
0, 0, 0, 0x0000086c, 0xffffff00, 0x32323200,// 11M 5.5M 2M (16 16 16 dBm)
0, 0, 0, 0x00000e00, 0xffffffff, 0x34363636,// 18M 12M 9M 6M (17 18 18 18 dBm)
0, 0, 0, 0x00000e04, 0xffffffff, 0x28303234,// 54M 48M 36M 24M (14 15 16 17 dBm)
0, 0, 0, 0x00000e10, 0xffffffff, 0x30343434,// MCS3 MCS2 MCS1 MCS0 (15 17 17 17 dBm)
0, 0, 0, 0x00000e14, 0xffffffff, 0x26262830 // MCS7 MCS6 MCS5 MCS4 (13 13 14 15 dBm)
};
const unsigned int Array_MP_8711B_PHY_REG_PG[] = {
0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003200,// 1M (16 dBm)
0, 0, 0, 0x0000086c, 0xffffff00, 0x32323200,// 11M 5.5M 2M (16 16 16 dBm)
0, 0, 0, 0x00000e00, 0xffffffff, 0x34363636,// 18M 12M 9M 6M (17 18 18 18 dBm)
0, 0, 0, 0x00000e04, 0xffffffff, 0x28303234,// 54M 48M 36M 24M (14 15 16 17 dBm)
0, 0, 0, 0x00000e10, 0xffffffff, 0x30343434,// MCS3 MCS2 MCS1 MCS0 (15 17 17 17 dBm)
0, 0, 0, 0x00000e14, 0xffffffff, 0x26262830// MCS7 MCS6 MCS5 MCS4 (13 13 14 15 dBm)
};
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/core/option/rtw_opt_power_by_rate.c
|
C
|
apache-2.0
| 1,370
|
/******************************************************************************
* TXPWR_LMT.TXT
******************************************************************************/
typedef enum _ODM_PW_LMT_REGULATION_TYPE{
PW_LMT_REGU_NULL = 0,
PW_LMT_REGU_FCC = 1,
PW_LMT_REGU_ETSI = 2,
PW_LMT_REGU_MKK = 3,
PW_LMT_REGU_WW13 = 4
}ODM_PW_LMT_REGULATION_TYPE;
typedef enum _ODM_PW_LMT_BAND_TYPE{
PW_LMT_BAND_NULL = 0,
PW_LMT_BAND_2_4G = 1,
PW_LMT_BAND_5G = 2
}ODM_PW_LMT_BAND_TYPE;
typedef enum _ODM_PW_LMT_BANDWIDTH_TYPE{
PW_LMT_BW_NULL = 0,
PW_LMT_BW_20M = 1,
PW_LMT_BW_40M = 2,
PW_LMT_BW_80M = 3
}ODM_PW_LMT_BANDWIDTH_TYPE;
typedef enum _ODM_PW_LMT_RATESECTION_TYPE{
PW_LMT_RS_NULL = 0,
PW_LMT_RS_CCK = 1,
PW_LMT_RS_OFDM = 2,
PW_LMT_RS_HT = 3,
PW_LMT_RS_VHT = 4
}ODM_PW_LMT_RATESECTION_TYPE;
typedef enum _ODM_PW_LMT_RFPATH_TYPE{
PW_LMT_PH_NULL = 0,
PW_LMT_PH_1T = 1,
PW_LMT_PH_2T = 2,
PW_LMT_PH_3T = 3,
PW_LMT_PH_4T = 4
}ODM_PW_LMT_RFPATH_TYPE;
typedef unsigned char u1Byte;
// Note: power index = power*2
// => ex: if power = 16dBm, set power index = 32
const u1Byte Array_MP_8195A_TXPWR_LMT[] = {
// regulation, band, bandwidth, rate, path, channel, power index
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 12,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 12,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 6,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63
};
const u1Byte Array_MP_8711B_TXPWR_LMT[] = {
/* regulation, band, bandwidth, rateSection, rfPath, chnl, value */
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 12,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 12,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 6,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63
};
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/core/option/rtw_opt_power_limit.c
|
C
|
apache-2.0
| 30,945
|
/**
******************************************************************************
* @file rtw_opt_rf_para_rtl8721d.c
* @author
* @version V1.0.0
* @date 2019-03-08
* @brief This file provides an option to reduce code size if you are sure of supply voltage or cut version
******************************************************************************
* @attention
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2015, Realtek Semiconductor Corporation. All rights reserved.
******************************************************************************
*/
#include <basic_types.h>
/* Mask this macro can save 7.2k flash size if you only use C cut, default support both C cut and B cut */
//#define SUPPORT_B_CUT
/* Mask this macro can save 2.4k flash size if you only use 3.3v, default support both 1.8v and 3.3v */
#define SUPPORT_18V
/* Mask this macro can save 2.4k flash size if you only use 1.8v, default support both 1.8v and 3.3v */
#define SUPPORT_33V
/******************************************************************************
* power by rate for 1.8v, step is 0.5db
******************************************************************************/
const u32 array_mp_8721d_phy_reg_pg_type0[] = {
#if defined(SUPPORT_18V)
0, 0, 0, 0x00000e08, 0x0000ff00, 0x00002800,
0, 0, 0, 0x0000086c, 0xffffff00, 0x24262800,
0, 0, 0, 0x00000e00, 0xffffffff, 0x24262628,
0, 0, 0, 0x00000e04, 0xffffffff, 0x22222224,
0, 0, 0, 0x00000e10, 0xffffffff, 0x22242426,
0, 0, 0, 0x00000e14, 0xffffffff, 0x20202022,
1, 0, 0, 0x00000e00, 0xffffffff, 0x22222424,
1, 0, 0, 0x00000e04, 0xffffffff, 0x18182020,
1, 0, 0, 0x00000e10, 0xffffffff, 0x20202222,
1, 0, 0, 0x00000e14, 0xffffffff, 0x16161818
#endif
};
/******************************************************************************
* power by rate for 3.3v, step is 0.5db
******************************************************************************/
const u32 array_mp_8721d_phy_reg_pg_type1[] = {
#if defined(SUPPORT_33V)
0, 0, 0, 0x00000e08, 0x0000ff00, 0x00004000,
0, 0, 0, 0x0000086c, 0xffffff00, 0x36363800,
0, 0, 0, 0x00000e00, 0xffffffff, 0x36383840,
0, 0, 0, 0x00000e04, 0xffffffff, 0x34343436,
0, 0, 0, 0x00000e10, 0xffffffff, 0x34363638,
0, 0, 0, 0x00000e14, 0xffffffff, 0x32323234,
1, 0, 0, 0x00000e00, 0xffffffff, 0x32343436,
1, 0, 0, 0x00000e04, 0xffffffff, 0x28283032,
1, 0, 0, 0x00000e10, 0xffffffff, 0x30323234,
1, 0, 0, 0x00000e14, 0xffffffff, 0x26262830
#endif
};
u32 arraylength_8721d_phy_reg_pg_type0 = sizeof(array_mp_8721d_phy_reg_pg_type0) / sizeof(u32);
u32 arraylength_8721d_phy_reg_pg_type1 = sizeof(array_mp_8721d_phy_reg_pg_type1) / sizeof(u32);
/******************************************************************************
* data types
******************************************************************************/
enum odm_pw_lmt_regulation_type {
PW_LMT_REGU_NULL = 0,
PW_LMT_REGU_FCC = 1,
PW_LMT_REGU_ETSI = 2,
PW_LMT_REGU_MKK = 3,
PW_LMT_REGU_WW13 = 4,
PW_LMT_REGU_IC = 5,
PW_LMT_REGU_KCC = 6,
PW_LMT_REGU_ACMA = 7,
PW_LMT_REGU_CHILE = 8,
PW_LMT_REGU_UKRAINE = 9,
PW_LMT_REGU_MEXICO = 10,
PW_LMT_REGU_CN = 11,
PW_LMT_REGU_MAX_NUM = 12
};
enum odm_pw_lmt_band_type {
PW_LMT_BAND_NULL = 0,
PW_LMT_BAND_2_4G = 1,
PW_LMT_BAND_5G = 2
};
enum odm_pw_lmt_bandwidth_type {
PW_LMT_BW_NULL = 0,
PW_LMT_BW_20M = 1,
PW_LMT_BW_40M = 2,
PW_LMT_BW_80M = 3
};
enum odm_pw_lmt_ratesection_type {
PW_LMT_RS_NULL = 0,
PW_LMT_RS_CCK = 1,
PW_LMT_RS_OFDM = 2,
PW_LMT_RS_HT = 3,
PW_LMT_RS_VHT = 4
};
enum odm_pw_lmt_rfpath_type {
PW_LMT_PH_NULL = 0,
PW_LMT_PH_1T = 1,
PW_LMT_PH_2T = 2,
PW_LMT_PH_3T = 3,
PW_LMT_PH_4T = 4
};
/******************************************************************************
* radioa for only c cut
******************************************************************************/
#ifndef SUPPORT_B_CUT
const u32 array_mp_8721d_radioa[] = {
0x00E, 0x00000022,
0x00F, 0x00000029,
0x057, 0x0009F522,
0x078, 0x000015D5,
0x082, 0x000115A8,
0x0C0, 0x00038144,
0x0AF, 0x00000004,
0x0A5, 0x000E700C,
0x0A1, 0x00005604,
0x000, 0x00010000,
0x0EE, 0x00010000,
0x033, 0x00000240,
0x03F, 0x00000444,
0x033, 0x00000241,
0x03F, 0x00000447,
0x033, 0x00000242,
0x03F, 0x0000044A,
0x033, 0x00000243,
0x03F, 0x0000044D,
0x033, 0x00000244,
0x03F, 0x00000CA5,
0x033, 0x00000245,
0x03F, 0x00000CA8,
0x033, 0x00000246,
0x03F, 0x00000EE7,
0x033, 0x00000247,
0x03F, 0x00000EEA,
0x033, 0x00000248,
0x03F, 0x00000EED,
0x033, 0x00000249,
0x03F, 0x00000EF0,
0x033, 0x0000024A,
0x03F, 0x00000EF3,
0x033, 0x000002C0,
0x03F, 0x0000022C,
0x033, 0x000002C1,
0x03F, 0x00000627,
0x033, 0x000002C2,
0x03F, 0x0000062A,
0x033, 0x000002C3,
0x03F, 0x00000667,
0x033, 0x000002C4,
0x03F, 0x00000688,
0x033, 0x000002C5,
0x03F, 0x000006E7,
0x033, 0x000002C6,
0x03F, 0x00000EE7,
0x033, 0x000002C7,
0x03F, 0x00000EEA,
0x033, 0x000002C8,
0x03F, 0x00000EED,
0x033, 0x000002C9,
0x03F, 0x00000EF0,
0x033, 0x000002CA,
0x03F, 0x00000EF3,
0x033, 0x00000340,
0x03F, 0x0000022B,
0x033, 0x00000341,
0x03F, 0x00000626,
0x033, 0x00000342,
0x03F, 0x00000629,
0x033, 0x00000343,
0x03F, 0x00000666,
0x033, 0x00000344,
0x03F, 0x00000687,
0x033, 0x00000345,
0x03F, 0x000006E6,
0x033, 0x00000346,
0x03F, 0x00000EE7,
0x033, 0x00000347,
0x03F, 0x00000EEA,
0x033, 0x00000348,
0x03F, 0x00000EED,
0x033, 0x00000349,
0x03F, 0x00000EF0,
0x033, 0x0000034A,
0x03F, 0x00000EF3,
0x033, 0x00000200,
0x03F, 0x00000623,
0x033, 0x00000201,
0x03F, 0x00000626,
0x033, 0x00000202,
0x03F, 0x00000629,
0x033, 0x00000203,
0x03F, 0x00000666,
0x033, 0x00000204,
0x03F, 0x00000C4A,
0x033, 0x00000205,
0x03F, 0x00000C4D,
0x033, 0x00000206,
0x03F, 0x00000EE7,
0x033, 0x00000207,
0x03F, 0x00000EEA,
0x033, 0x00000208,
0x03F, 0x00000EED,
0x033, 0x00000209,
0x03F, 0x00000EF0,
0x033, 0x0000020A,
0x03F, 0x00000EF3,
0x033, 0x00000280,
0x03F, 0x00000427,
0x033, 0x00000281,
0x03F, 0x00000642,
0x033, 0x00000282,
0x03F, 0x00000645,
0x033, 0x00000283,
0x03F, 0x00000648,
0x033, 0x00000284,
0x03F, 0x00000A4B,
0x033, 0x00000285,
0x03F, 0x00000A4E,
0x033, 0x00000286,
0x03F, 0x00000EE6,
0x033, 0x00000287,
0x03F, 0x00000EE9,
0x033, 0x00000288,
0x03F, 0x00000EEC,
0x033, 0x00000289,
0x03F, 0x00000EEF,
0x033, 0x0000028A,
0x03F, 0x00000EF2,
0x033, 0x00000300,
0x03F, 0x0000022A,
0x033, 0x00000301,
0x03F, 0x0000022D,
0x033, 0x00000302,
0x03F, 0x00000645,
0x033, 0x00000303,
0x03F, 0x00000648,
0x033, 0x00000304,
0x03F, 0x0000064B,
0x033, 0x00000305,
0x03F, 0x00000EC5,
0x033, 0x00000306,
0x03F, 0x00000EE7,
0x033, 0x00000307,
0x03F, 0x00000EEA,
0x033, 0x00000308,
0x03F, 0x00000EED,
0x033, 0x00000309,
0x03F, 0x00000EF0,
0x033, 0x0000030A,
0x03F, 0x00000EF3,
0x0EE, 0x00000000,
0x0EE, 0x00008000,
0x033, 0x00000020,
0x03F, 0x00055077,
0x033, 0x00000021,
0x03F, 0x00055077,
0x033, 0x00000022,
0x03F, 0x00055077,
0x033, 0x00000023,
0x03F, 0x00055077,
0x033, 0x00000024,
0x03F, 0x00055077,
0x033, 0x00000025,
0x03F, 0x00055077,
0x033, 0x00000026,
0x03F, 0x00055077,
0x033, 0x00000027,
0x03F, 0x00055077,
0x033, 0x00000030,
0x03F, 0x000550F6,
0x033, 0x00000031,
0x03F, 0x000550F6,
0x033, 0x00000032,
0x03F, 0x000550F6,
0x033, 0x00000033,
0x03F, 0x000550F6,
0x033, 0x00000034,
0x03F, 0x000550F6,
0x033, 0x00000035,
0x03F, 0x000550F6,
0x033, 0x00000036,
0x03F, 0x000550F6,
0x033, 0x00000037,
0x03F, 0x000550F6,
0x0EE, 0x00000000,
0x0EE, 0x00000020,
0x030, 0x00000021,
0x030, 0x00001021,
0x030, 0x00002021,
0x0EE, 0x00000000,
0x0EF, 0x00000020,
0x033, 0x00000008,
0x03F, 0x00000006,
0x033, 0x00000009,
0x03F, 0x00000006,
0x033, 0x0000000A,
0x03F, 0x00000006,
0x033, 0x0000000B,
0x03F, 0x00000006,
0x0EF, 0x00000000,
0x01B, 0x00073A60,
};
u32 arraylength_8721d_radioa = sizeof(array_mp_8721d_radioa) / sizeof(u32);
#endif
/******************************************************************************
* power by limit for 1.8v
******************************************************************************/
const u8 array_mp_8721d_txpwr_lmt_type0[] = {
#if defined(SUPPORT_18V)
/* regulation, band, bandwidth, rateSection, rfPath, chnl, value */
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 22,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 14,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 14,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 14,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 14,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 20,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 22,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 22,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 22,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 22,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 22,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 22,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 22,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 20,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 16,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 2,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 2,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 2,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 2,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 20,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 20,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 16,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 0,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 0,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 0,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 0,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 26,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 24,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 24,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 24,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 24,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 24,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 22,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 24,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 22,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 24,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 22,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 24,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 22,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 24,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 24,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 24,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 24,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 24,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 24,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 24,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 24,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 24,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 24,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 22,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 24,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 22,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 24,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 22,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 24,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 22,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 24,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 24,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 24,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 24,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 24,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 16,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 24,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 24,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 24,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 24,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 14,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 24,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 14,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 24,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 14,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 24,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 14,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 24,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 4,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 24,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 26,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 4,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 24,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 24,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 4,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 24,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 4,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 24,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 16,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 18,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 18,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 14,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 16,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 16,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 16,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 17,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 18,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 20,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 20,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 20,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 18,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 14,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 16,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 14,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 14,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 16,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 16,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 15,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 14,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 14,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 18,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 14,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 14,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 20,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 14,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 14,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 18,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 14,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 14,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 20,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 14,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 14,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 20,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 14,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 20,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 14,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 14,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 14,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 18,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 10,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 18,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 10,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 14,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 18,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 10,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 10,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 18,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 16,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 18,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 14,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 18,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 14,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 14,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 18,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 16,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 18,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 16,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 14,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 18,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 14,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 16,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 18,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 10,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 18,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 10,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 16,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 10,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 10,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 10,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 18,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 12,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 18,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 12,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 16,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 18,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 12,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 12,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 17,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 18,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 17,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 18,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 18,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 17,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 17,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 18,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 18,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 17,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 17,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 18,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 17,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 13,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 18,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 18,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 13,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 17,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 13,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 13,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 17,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 17,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 17,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 14,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, -63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 18,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, -63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 18,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 14,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, -63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 16,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 14,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 18,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, -63
#endif
};
/******************************************************************************
* power by limit for 3.3v
******************************************************************************/
const u8 array_mp_8721d_txpwr_lmt_type1[] = {
#if defined(SUPPORT_33V)
/* regulation, band, bandwidth, rateSection, rfPath, chnl, value */
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 32,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 32,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 32,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 1, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 2, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 3, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 4, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 5, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 6, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 7, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 8, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 9, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 10, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 12, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 24,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 24,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 13, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_CCK, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 2,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 2,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 2,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 2,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 32,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 34,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 24,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 0,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 34,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 0,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 34,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 0,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 0,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 1, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 2, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 3, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 4, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 5, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 32,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 32,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 32,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 6, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 32,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 32,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 32,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 7, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 32,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 32,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 32,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 8, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 32,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 32,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 32,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 9, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 32,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 10, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 24,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 24,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 11, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 12, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 13, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ETSI, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_CN, PW_LMT_BAND_2_4G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 14, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 32,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 32,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 36, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 32,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 32,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 40, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 32,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 32,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 44, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 32,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 32,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 48, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 27,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 14,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 52, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 27,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 56, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 27,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 60, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 64, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 100, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 104, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 108, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 112, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 116, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 132, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 136, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 140, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 24,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 24,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 153, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 157, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 161, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_OFDM, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 32,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 24,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 32,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 36, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 32,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 32,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 40, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 32,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 32,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 44, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 32,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 24,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 32,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 48, 32,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 27,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 52, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 27,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 56, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 27,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 60, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 64, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 100, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 104, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 108, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 112, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 116, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 120, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 32,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 124, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 128, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 26,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 132, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 32,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 136, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 140, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 24,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 144, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 24,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 149, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 153, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 157, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 161, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_20M, PW_LMT_RS_HT, PW_LMT_PH_1T, 165, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 24,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 24,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 24,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 22,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 25,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 22,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 38, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 30,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 26,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 30,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 25,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 24,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 46, 30,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 20,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 24,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 25,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 24,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 54, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 22,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 25,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 22,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 62, 28,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 26,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 26,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 28,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 25,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 26,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 102, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 27,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 27,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 25,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 110, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 27,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 30,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 25,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 118, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 27,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 63,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 25,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 126, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 27,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 28,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 30,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 27,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 28,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 134, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 27,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 63,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 27,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, -63,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 63,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 63,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 27,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 142, 63,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 25,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 151, 16,
PW_LMT_REGU_FCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 28,
PW_LMT_REGU_ETSI, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 16,
PW_LMT_REGU_MKK, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 63,
PW_LMT_REGU_IC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 28,
PW_LMT_REGU_KCC, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 24,
PW_LMT_REGU_ACMA, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 16,
PW_LMT_REGU_CHILE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 25,
PW_LMT_REGU_UKRAINE, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 16,
PW_LMT_REGU_MEXICO, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 28,
PW_LMT_REGU_CN, PW_LMT_BAND_5G, PW_LMT_BW_40M, PW_LMT_RS_HT, PW_LMT_PH_1T, 159, 16
#endif
};
u32 arraylength_8721d_txpwr_lmt_type1 = sizeof(array_mp_8721d_txpwr_lmt_type1) / sizeof(u8);
u32 arraylength_8721d_txpwr_lmt_type0 = sizeof(array_mp_8721d_txpwr_lmt_type0) / sizeof(u8);
#if 1
const s8 delta_swing_xtal_mp_n_txxtaltrack_8721d[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
const s8 delta_swing_xtal_mp_p_txxtaltrack_8721d[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -6, -6, -10, -10,
-12, -18, -24, -30, -35, -40, -45, -50, -50, -50, -50};
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/core/option/rtw_opt_rf_para_rtl8721d.c
|
C
|
apache-2.0
| 219,270
|
#include <section_config.h>
#include <osdep_service.h>
#include <skbuff.h>
#define MAX_SKB_BUF_SIZE 1650 // should >= the size in wlan driver
#define MAX_SKB_BUF_NUM 8
#define MAX_LOCAL_SKB_NUM (MAX_SKB_BUF_NUM + 2)
/* DO NOT modify skb_buf and skb_data structure */
struct skb_buf {
struct list_head list;
struct sk_buff skb;
};
struct skb_data {
struct list_head list;
unsigned char buf[MAX_SKB_BUF_SIZE];
atomic_t ref;
};
unsigned int nr_xmitframe = MAX_SKB_BUF_NUM;
unsigned int nr_xmitbuff = MAX_SKB_BUF_NUM;
int max_local_skb_num = MAX_LOCAL_SKB_NUM;
int max_skb_buf_num = MAX_SKB_BUF_NUM;
/* DO NOT access skb_pool and skb_data_pool out of wlan driver */
struct skb_buf skb_pool[MAX_LOCAL_SKB_NUM];
#define SKB_DATA_POOL_USING_GLOBAL_BUF 1
#if SKB_DATA_POOL_USING_GLOBAL_BUF
// SRAM_BD_DATA_SECTION default in SRAM. Can modify image2.icf to link to the end of SDRAM
SRAM_BD_DATA_SECTION
struct skb_data skb_data_pool[MAX_SKB_BUF_NUM];
#else
// Change to use heap (malloc) to save SRAM memory
SRAM_BD_DATA_SECTION
struct skb_data * skb_data_pool;
extern struct list_head skbdata_list;
extern int skbdata_used_num;
extern int max_skbdata_used_num;
void init_skb_data_pool(void)
{
int i;
//printf("\ninit_skb_data_pool\n");
skb_data_pool = (struct skb_data *)rtw_zmalloc(max_skb_buf_num * sizeof(struct skb_data));
if(!skb_data_pool){
printf("\nskb_data_pool alloc fail\n");
return;
}
memset(skb_data_pool, '\0', max_skb_buf_num*sizeof(struct skb_data));
INIT_LIST_HEAD(&skbdata_list);
for (i=0; i<max_skb_buf_num; i++) {
INIT_LIST_HEAD(&skb_data_pool[i].list);
list_add_tail(&skb_data_pool[i].list, &skbdata_list);
}
skbdata_used_num = 0;
max_skbdata_used_num = 0;
}
void deinit_skb_data_pool(void)
{
//printf("\ndeinit_skb_data_pool\n");
rtw_mfree(skb_data_pool, MAX_SKB_BUF_NUM * sizeof(struct skb_data));
}
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/core/option/rtw_opt_skbuf.c
|
C
|
apache-2.0
| 1,876
|
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
* Wrapper provide a linux-like interface
************************************************************************/
#ifndef __WRAPPER_H__
#define __WRAPPER_H__
//----- ------------------------------------------------------------------
// Include Files
//----- ------------------------------------------------------------------
#include <stdio.h>
#include <string.h>
#include "wireless.h"
#include <skbuff.h>
#include "osdep_service.h"
#ifndef __LIST_H
#warning "DLIST_NOT_DEFINE!!!!!!"
//----- ------------------------------------------------------------------
// Linled List
//----- ------------------------------------------------------------------
/*
* Simple doubly linked list implementation.
*
* Some of the internal functions ("__xxx") are useful when
* manipulating whole lists rather than single entries, as
* sometimes we already know the next/prev entries and we can
* generate better code by using them directly rather than
* using the generic single-entry routines.
*/
// struct list_head {
// struct list_head *next, *prev;
// };
#define LIST_HEAD_INIT(name) { &(name), &(name) }
#define INIT_LIST_HEAD(ptr) do { \
(ptr)->next = (ptr); (ptr)->prev = (ptr); \
} while (0)
/*
* Insert a new entry between two known consecutive entries.
*
* This is only for internal list manipulation where we know
* the prev/next entries already!
*/
static __inline void __list_add(struct list_head * new,
struct list_head * prev,
struct list_head * next)
{
next->prev = new;
new->next = next;
new->prev = prev;
prev->next = new;
}
/*
* Delete a list entry by making the prev/next entries
* point to each other.
*
* This is only for internal list manipulation where we know
* the prev/next entries already!
*/
static __inline void __list_del(struct list_head * prev,
struct list_head * next)
{
next->prev = prev;
prev->next = next;
}
/**
* list_del - deletes entry from list.
* @entry: the element to delete from the list.
* Note: list_empty on entry does not return true after this, the entry is in an undefined state.
*/
static __inline void list_del(struct list_head *entry)
{
__list_del(entry->prev, entry->next);
}
/**
* list_del_init - deletes entry from list and reinitialize it.
* @entry: the element to delete from the list.
*/
static __inline void list_del_init(struct list_head *entry)
{
__list_del(entry->prev, entry->next);
INIT_LIST_HEAD(entry);
}
/**
* list_empty - tests whether a list is empty
* @head: the list to test.
*/
static __inline int list_empty(struct list_head *head)
{
return head->next == head;
}
/**
* list_splice - join two lists
* @list: the new list to add.
* @head: the place to add it in the first list.
*/
static __inline void list_splice(struct list_head *list, struct list_head *head)
{
struct list_head *first = list->next;
if (first != list) {
struct list_head *last = list->prev;
struct list_head *at = head->next;
first->prev = head;
head->next = first;
last->next = at;
at->prev = last;
}
}
void list_add(struct list_head *new, struct list_head *head);
void list_add_tail(struct list_head *new, struct list_head *head);
#endif
//extern void save_and_cli(void);
//extern void restore_flags(void);
//----- ------------------------------------------------------------------
// SKB Operation
//----- ------------------------------------------------------------------
#define SMP_CACHE_BYTES 4
#define SKB_DATA_ALIGN(X) (((X) + (SMP_CACHE_BYTES - 1)) & ~(SMP_CACHE_BYTES - 1))
// Consideration for SKB size
// Tx: [INTF_CMD][TX_DESC][WLAN_HDR][QoS][IV][SNAP][Data][MIC][ICV][INTF_STATUS]
// Since SKB is used to accept ethernet packet from upper layer, SKB length of WLAN_MAX_ETHFRM_LEN
// (= 1514) is enough. But since SKB is also used to get spi receive packet, overall buffer space
// should be taken into consideration.
// RX: [INTF_CMD][RX_DESC][Drv_Info][WLAN_HDR][QoS][IV][SNAP][Data][MIC][ICV][CRC][INTF_STATUS]
//
// 32: Driver_Info that carry phy related information for each packets. Required only for receive case.
// WLAN_MAX_ETHFRM_LEN : May not be required because WLAN_HEADER +SNAP can totally
// cover ethernet header. Keep in only for safety.
//
// **Notes** SDIO requires 512 blocks r/w, so 512*4 = 2048 is required.
// 2003/12/26. The value is reduced from 2048 to 1658 for GSPI
// 2014/02/05. The value is 1650 for 8195A LX_BUS
#define SKB_RESERVED_FOR_SAFETY 8//0
#define SKB_WLAN_TX_EXTRA_LEN (TXDESC_SIZE + WLAN_HDR_A4_QOS_LEN + WLAN_MAX_IV_LEN + WLAN_SNAP_HEADER - WLAN_ETHHDR_LEN)
#define RX_DRIVER_INFO 32
#if (defined CONFIG_GSPI_HCI || defined CONFIG_SDIO_HCI)
#define HAL_INTERFACE_OVERHEAD_SKB_DATA 12 //HAL_INTERFACE_CMD (4) + HAL_INTERFACE_STATUS (8)
#elif defined(CONFIG_LX_HCI) || defined(CONFIG_AXI_HCI)
#define HAL_INTERFACE_OVERHEAD_SKB_DATA 0
#endif
#if defined CONFIG_GSPI_HCI || defined CONFIG_SDIO_HCI || defined(CONFIG_LX_HCI) || defined(CONFIG_AXI_HCI)
#if defined(CONFIG_MP_INCLUDED)
#ifdef CONFIG_DONT_CARE_TP
#define MAX_RX_PKT_LIMIT ((WLAN_MAX_PROTOCOL_OVERHEAD + WLAN_MAX_RX_ETHFRM_LEN + 511) / 512) // 4, for lxbus
#else
#define MAX_RX_PKT_LIMIT ((WLAN_MAX_PROTOCOL_OVERHEAD + WLAN_MAX_ETHFRM_LEN + 511) / 512) // 4, for lxbus
#endif
#define MAX_RX_PKT_SIZE MAX_RX_PKT_LIMIT*512 // MAX_SKB_BUF_SIZE = 0+32+40+512*4+0 = 2120
#else
#ifdef CONFIG_DONT_CARE_TP
#define MAX_RX_PKT_SIZE WLAN_MAX_PROTOCOL_OVERHEAD + WLAN_MAX_RX_ETHFRM_LEN
#else
#define MAX_RX_PKT_SIZE WLAN_MAX_PROTOCOL_OVERHEAD + WLAN_MAX_ETHFRM_LEN // MAX_RX_PKT_SIZE = 64+1514 = 1578
#endif
#define MAX_RX_PKT_LIMIT ((MAX_RX_PKT_SIZE + 511) / 512) // ((1578 + 512) / 512) = 4
#endif
#ifdef CONFIG_DONT_CARE_TP
#define MAX_TX_SKB_BUF_SIZE (HAL_INTERFACE_OVERHEAD_SKB_DATA+RX_DRIVER_INFO+\
((TXDESC_SIZE>RXDESC_SIZE)? TXDESC_SIZE:RXDESC_SIZE) +\
WLAN_MAX_PROTOCOL_OVERHEAD + WLAN_MAX_TX_ETHFRM_LEN +\
SKB_RESERVED_FOR_SAFETY)
#define MAX_RX_SKB_BUF_SIZE (HAL_INTERFACE_OVERHEAD_SKB_DATA+RX_DRIVER_INFO+\
((TXDESC_SIZE>RXDESC_SIZE)? TXDESC_SIZE:RXDESC_SIZE) +\
MAX_RX_PKT_SIZE +\
SKB_RESERVED_FOR_SAFETY)
#else
#ifdef CONFIG_HIGH_TP_TEST
#define MAX_SKB_BUF_SIZE 2104
#else
#define MAX_SKB_BUF_SIZE (HAL_INTERFACE_OVERHEAD_SKB_DATA+RX_DRIVER_INFO+\
((TXDESC_SIZE>RXDESC_SIZE)? TXDESC_SIZE:RXDESC_SIZE) +\
MAX_RX_PKT_SIZE +\
SKB_RESERVED_FOR_SAFETY) // 0+32+40+1578+0 = 1650
#endif
#endif
#else
#define MAX_SKB_BUF_SIZE 2048
#endif
#if 0
struct sk_buff_head {
struct list_head *next, *prev;
u32 qlen;
};
struct sk_buff {
/* These two members must be first. */
struct sk_buff *next; /* Next buffer in list */
struct sk_buff *prev; /* Previous buffer in list */
struct sk_buff_head *list; /* List we are on */
unsigned char *head; /* Head of buffer */
unsigned char *data; /* Data head pointer */
unsigned char *tail; /* Tail pointer */
unsigned char *end; /* End pointer */
struct net_device *dev; /* Device we arrived on/are leaving by */
unsigned int len; /* Length of actual data */
};
/**
* skb_put - add data to a buffer
* @skb: buffer to use
* @len: amount of data to add
*
* This function extends the used data area of the buffer. If this would
* exceed the total buffer size the kernel will panic. A pointer to the
* first byte of the extra data is returned.
*/
static __inline__ unsigned char *skb_put(struct sk_buff *skb, unsigned int len)
{
unsigned char *tmp=skb->tail;
skb->tail+=len;
skb->len+=len;
if(skb->tail>skb->end) {
ASSERT(0);
}
return tmp;
}
static __inline__ unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len)
{
skb->len-=len;
skb->data = (unsigned char *)(((unsigned int)skb->data) + len);
return skb->data;
}
/**
* skb_reserve - adjust headroom
* @skb: buffer to alter
* @len: bytes to move
*
* Increase the headroom of an empty &sk_buff by reducing the tail
* room. This is only allowed for an empty buffer.
*/
static __inline__ void skb_reserve(struct sk_buff *skb, unsigned int len)
{
skb->data+=len;
skb->tail+=len;
}
static __inline__ void skb_queue_head_init(struct sk_buff_head *list)
{
list->prev = (struct list_head *)list;
list->next = (struct list_head *)list;
list->qlen = 0;
}
/**
* __skb_queue_tail - queue a buffer at the list tail
* @list: list to use
* @newsk: buffer to queue
*
* Queue a buffer at the end of a list. This function takes no locks
* and you must therefore hold required locks before calling it.
*
* A buffer cannot be placed on two lists at the same time.
*/
static __inline__ void __skb_queue_tail(struct sk_buff_head *list, struct sk_buff *newsk)
{
struct sk_buff *prev, *next;
newsk->list = list;
list->qlen++;
next = (struct sk_buff *)list;
prev = next->prev;
newsk->next = next;
newsk->prev = prev;
next->prev = newsk;
prev->next = newsk;
}
/**
* skb_queue_tail - queue a buffer at the list tail
* @list: list to use
* @newsk: buffer to queue
*
* Queue a buffer at the tail of the list. This function takes the
* list lock and can be used safely with other locking &sk_buff functions
* safely.
*
* A buffer cannot be placed on two lists at the same time.
*/
static __inline__ void skb_queue_tail(struct sk_buff_head *list, struct sk_buff *newsk)
{
save_and_cli();
__skb_queue_tail(list, newsk);
restore_flags();
}
static __inline__ void skb_assign_buf(struct sk_buff *skb, unsigned char *buf, unsigned int len)
{
skb->head = buf;
skb->data = buf;
skb->tail = buf;
skb->end = buf + len;
}
static __inline__ unsigned char *skb_tail_pointer(const struct sk_buff *skb)
{
return skb->tail;
}
static __inline__ void skb_reset_tail_pointer(struct sk_buff *skb)
{
skb->tail = skb->data;
}
static __inline__ void skb_set_tail_pointer(struct sk_buff *skb, const int offset)
{
skb->tail = skb->data + offset;
}
static __inline__ unsigned char *skb_end_pointer(const struct sk_buff *skb)
{
return skb->end;
}
#endif
/*
* External functions
*/
struct net_device;
extern void kfree_skb_chk_key(struct sk_buff *skb, struct net_device *root_dev);
#ifdef CONFIG_TRACE_SKB
extern void show_skb(void);
extern int _set_skb_list_flag(struct sk_buff *skb, unsigned int queueflag);
extern void dump_skb_list(void);
#define set_skb_list_flag(skb, queueflag) \
(\
_set_skb_list_flag((skb), queueflag), \
(skb) ? (skb)->funcname[(skb)->list_idx] = __FUNCTION__:NULL \
)
extern int _clear_skb_list_flag(struct sk_buff *skb, unsigned int queueflag);
#define clear_skb_list_flag(skb, queueflag) \
(\
_clear_skb_list_flag((skb), queueflag), \
(skb) ? (skb)->funcname[(skb)->list_idx] = __FUNCTION__ : NULL \
)
#define dev_kfree_skb_any(trx, holder, skb) \
do{\
clear_skb_list_flag(skb, SKBLIST_##trx##holder##_MASK);\
set_skb_list_flag(skb, SKBLIST_POOL);\
kfree_skb_chk_key(skb, skb->dev);\
}while (0)
#else
#define dev_kfree_skb_any(skb) kfree_skb_chk_key(skb, skb->dev)
#endif
extern struct sk_buff *dev_alloc_skb(unsigned int length, unsigned int reserve_len);
extern struct sk_buff *skb_clone(struct sk_buff *skb, int gfp_mask);
extern struct sk_buff *skb_copy(const struct sk_buff *skb, int gfp_mask, unsigned int reserve_len);
extern unsigned char *skb_pull(struct sk_buff *skb, unsigned int len);
//----- ------------------------------------------------------------------
// Device structure
//----- ------------------------------------------------------------------
struct net_device_stats {
unsigned long rx_packets; /* total packets received */
unsigned long tx_packets; /* total packets transmitted */
unsigned long rx_dropped; /* no space in linux buffers */
unsigned long tx_dropped; /* no space available in linux */
unsigned long rx_bytes; /* total bytes received */
unsigned long tx_bytes; /* total bytes transmitted */
unsigned long rx_overflow; /* rx fifo overflow count */
unsigned long rx_reorder_drop_cnt;
unsigned long rx_reorder_timeout_cnt;
};
struct net_device {
char name[16];
void *priv; /* pointer to private data */
unsigned char dev_addr[6]; /* set during bootup */
int (*init)(void);
int (*open)(struct net_device *dev);
int (*stop)(struct net_device *dev);
int (*hard_start_xmit)(struct sk_buff *skb, struct net_device *dev);
int (*do_ioctl)(struct net_device *dev, struct iwreq *ifr, int cmd);
struct net_device_stats* (*get_stats)(struct net_device *dev);
};
typedef struct {
struct net_device *dev; /* Binding wlan driver netdev */
void *skb; /* pending Rx packet */
unsigned int tx_busy;
unsigned int rx_busy;
unsigned char enable;
unsigned char mac[6];
_sema netif_rx_sema; /* prevent race condition on .skb in rltk_netif_rx() */
} Rltk_wlan_t;
#define netdev_priv(dev) dev->priv
extern struct net_device *alloc_etherdev(int sizeof_priv);
void free_netdev(struct net_device *dev);
int dev_alloc_name(struct net_device *net_dev, const char *ifname);
//----- ------------------------------------------------------------------
// Timer Operation
//----- ------------------------------------------------------------------
void init_timer(struct timer_list *timer);
void mod_timer(struct timer_list *timer, u32 delay_time_ms);
void cancel_timer_ex(struct timer_list * timer);
void del_timer_sync(struct timer_list * timer);
void init_timer_wrapper(void);
void deinit_timer_wrapper(void);
void rtw_init_timer(_timer *ptimer, void *adapter, TIMER_FUN pfunc,void* cntx, const char *name);
void rtw_set_timer(_timer *ptimer,u32 delay_time);
u8 rtw_cancel_timer(_timer *ptimer);
void rtw_del_timer(_timer *ptimer);
#endif //__WRAPPER_H__
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/osdep/alios/wrapper.h
|
C
|
apache-2.0
| 14,760
|
/******************************************************************************
*
* Copyright(c) 2007 - 2021 Realtek Corporation. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************/
//#define _LWIP_INTF_C_
#include <autoconf.h>
#include "lwip_intf.h"
#include <lwip/netif.h>
#include <lwip_netconf.h>
#include <ethernetif.h>
#include <osdep_service.h>
#include <wifi/wifi_util.h>
#include <skbuff.h>
#include <alios/wrapper.h>
//----- ------------------------------------------------------------------
// External Reference
//----- ------------------------------------------------------------------
#if (CONFIG_LWIP_LAYER == 1)
extern struct netif xnetif[]; //LWIP netif
#endif
/**
* rltk_wlan_set_netif_info - set netif hw address and register dev pointer to netif device
* @idx_wlan: netif index
* 0 for STA only or SoftAP only or STA in STA+SoftAP concurrent mode,
* 1 for SoftAP in STA+SoftAP concurrent mode
* @dev: register netdev pointer to LWIP. Reserved.
* @dev_addr: set netif hw address
*
* Return Value: None
*/
void rltk_wlan_set_netif_info(int idx_wlan, void * dev, unsigned char * dev_addr)
{
#if (CONFIG_LWIP_LAYER == 1)
rtw_memcpy(xnetif[idx_wlan].hwaddr, dev_addr, 6);
xnetif[idx_wlan].state = dev;
#endif
}
/**
* rltk_wlan_send - send IP packets to WLAN. Called by low_level_output().
* @idx: netif index
* @sg_list: data buffer list
* @sg_len: size of each data buffer
* @total_len: total data len
*
* Return Value: None
*/
int rltk_wlan_send(int idx, struct eth_drv_sg *sg_list, int sg_len, int total_len)
{
#if (CONFIG_LWIP_LAYER == 1)
struct eth_drv_sg *last_sg;
struct sk_buff *skb = NULL;
int ret = 0;
if(idx == -1){
DBG_ERR("netif is DOWN");
return -1;
}
DBG_TRACE("%s is called", __FUNCTION__);
CPSR_ALLOC();
cpsr = cpu_intrpt_save();
// save_and_cli();
if(rltk_wlan_check_isup(idx))
rltk_wlan_tx_inc(idx);
else {
DBG_ERR("netif is DOWN");
cpu_intrpt_restore(cpsr);
// restore_flags();
return -1;
}
cpu_intrpt_restore(cpsr);
// restore_flags();
skb = rltk_wlan_alloc_skb(total_len);
if (skb == NULL) {
//DBG_ERR("rltk_wlan_alloc_skb() for data len=%d failed!", total_len);
ret = -1;
goto exit;
}
for (last_sg = &sg_list[sg_len]; sg_list < last_sg; ++sg_list) {
rtw_memcpy((void *)(skb->tail), (void *)(sg_list->buf), sg_list->len);
skb_put(skb, sg_list->len);
}
rltk_wlan_send_skb(idx, skb);
exit:
{
CPSR_ALLOC();
cpsr = cpu_intrpt_save();
// save_and_cli();
rltk_wlan_tx_dec(idx);
cpu_intrpt_restore(cpsr);
// restore_flags();
}
return ret;
#endif
}
/**
* rltk_wlan_recv - indicate packets to LWIP. Called by ethernetif_recv().
* @idx: netif index
* @sg_list: data buffer list
* @sg_len: size of each data buffer
*
* Return Value: None
*/
void rltk_wlan_recv(int idx, struct eth_drv_sg *sg_list, int sg_len)
{
#if (CONFIG_LWIP_LAYER == 1)
struct eth_drv_sg *last_sg;
struct sk_buff *skb;
DBG_TRACE("%s is called", __FUNCTION__);
if(idx == -1){
DBG_ERR("skb is NULL");
return;
}
skb = rltk_wlan_get_recv_skb(idx);
DBG_ASSERT(skb, "No pending rx skb");
for (last_sg = &sg_list[sg_len]; sg_list < last_sg; ++sg_list) {
if (sg_list->buf != 0) {
rtw_memcpy((void *)(sg_list->buf), skb->data, sg_list->len);
skb_pull(skb, sg_list->len);
}
}
#endif
}
int netif_is_valid_IP(int idx, unsigned char *ip_dest)
{
#if CONFIG_LWIP_LAYER == 1
struct netif * pnetif = &xnetif[idx];
ip_addr_t addr = { 0 };
#ifdef CONFIG_MEMORY_ACCESS_ALIGNED
unsigned int temp;
memcpy(&temp, ip_dest, sizeof(unsigned int));
u32_t *ip_dest_addr = &temp;
#else
u32_t *ip_dest_addr = (u32_t*)ip_dest;
#endif
addr.addr = *ip_dest_addr;
if(pnetif->ip_addr.addr == 0)
return 1;
if(ip_addr_ismulticast(&addr) || ip_addr_isbroadcast(&addr,pnetif)){
return 1;
}
//if(ip_addr_netcmp(&(pnetif->ip_addr), &addr, &(pnetif->netmask))) //addr&netmask
// return 1;
if(ip_addr_cmp(&(pnetif->ip_addr),&addr))
return 1;
DBG_TRACE("invalid IP: %d.%d.%d.%d ",ip_dest[0],ip_dest[1],ip_dest[2],ip_dest[3]);
#endif
#ifdef CONFIG_DONT_CARE_TP
if(pnetif->flags & NETIF_FLAG_IPSWITCH)
return 1;
else
#endif
return 0;
}
int netif_get_idx(struct netif* pnetif)
{
#if CONFIG_LWIP_LAYER == 1
int idx = pnetif - xnetif;
switch(idx) {
case 0:
return 0;
case 1:
return 1;
default:
return -1;
}
#else
return -1;
#endif
}
unsigned char *netif_get_hwaddr(int idx_wlan)
{
#if (CONFIG_LWIP_LAYER == 1)
return xnetif[idx_wlan].hwaddr;
#else
return NULL;
#endif
}
void netif_rx(int idx, unsigned int len)
{
#if (CONFIG_LWIP_LAYER == 1)
ethernetif_recv(&xnetif[idx], len);
#endif
#if (CONFIG_INIC_EN == 1)
inic_netif_rx(idx, len);
#endif
}
void netif_post_sleep_processing(void)
{
#if (CONFIG_LWIP_LAYER == 1)
lwip_POST_SLEEP_PROCESSING(); //For FreeRTOS tickless to enable Lwip ARP timer when leaving IPS - Alex Fang
#endif
}
void netif_pre_sleep_processing(void)
{
#if (CONFIG_LWIP_LAYER == 1)
lwip_PRE_SLEEP_PROCESSING();
#endif
}
#ifdef CONFIG_WOWLAN
unsigned char *rltk_wlan_get_ip(int idx){
#if (CONFIG_LWIP_LAYER == 1)
return LwIP_GetIP(&xnetif[idx]);
#else
return NULL;
#endif
}
unsigned char *rltk_wlan_get_gw(int idx)
{
#if (CONFIG_LWIP_LAYER == 1)
return LwIP_GetGW(&xnetif[idx]);
#else
return NULL;
#endif
}
unsigned char *rltk_wlan_get_gwmask(int idx)
{
#if (CONFIG_LWIP_LAYER == 1)
return LwIP_GetMASK(&xnetif[idx]);
#else
return NULL;
#endif
}
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/osdep/lwip_intf.c
|
C
|
apache-2.0
| 6,188
|
/* mbed Microcontroller Library
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __LWIP_INTF_H__
#define __LWIP_INTF_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <wireless.h>
#include <skbuff.h>
struct netif;
//----- ------------------------------------------------------------------
// Ethernet Buffer
//----- ------------------------------------------------------------------
#if defined(CONFIG_MBED_ENABLED)
struct eth_drv_sg {
unsigned int buf;
unsigned int len;
};
#define MAX_ETH_DRV_SG 32
#define MAX_ETH_MSG 1540
#else
#include "ethernetif.h" // moved to ethernetif.h by jimmy 12/2/2015
#endif
//----- ------------------------------------------------------------------
// Wlan Interface Provided
//----- ------------------------------------------------------------------
unsigned char rltk_wlan_check_isup(int idx);
void rltk_wlan_tx_inc(int idx);
void rltk_wlan_tx_dec(int idx);
struct sk_buff * rltk_wlan_get_recv_skb(int idx);
struct sk_buff * rltk_wlan_alloc_skb(unsigned int total_len);
void rltk_wlan_set_netif_info(int idx_wlan, void * dev, unsigned char * dev_addr);
void rltk_wlan_send_skb(int idx, struct sk_buff *skb); //struct sk_buff as defined above comment line
int rltk_wlan_send(int idx, struct eth_drv_sg *sg_list, int sg_len, int total_len);
void rltk_wlan_recv(int idx, struct eth_drv_sg *sg_list, int sg_len);
unsigned char rltk_wlan_running(unsigned char idx); // interface is up. 0: interface is down
#if defined(CONFIG_MBED_ENABLED)
typedef void (*emac_callback)(void *param, struct netif *netif, unsigned int len);
void set_callback_func(emac_callback p, void *data);
#endif
//----- ------------------------------------------------------------------
// Network Interface provided
//----- ------------------------------------------------------------------
int netif_is_valid_IP(int idx,unsigned char * ip_dest);
int netif_get_idx(struct netif *pnetif);
unsigned char *netif_get_hwaddr(int idx_wlan);
void netif_rx(int idx, unsigned int len);
void netif_post_sleep_processing(void);
void netif_pre_sleep_processing(void);
#if (CONFIG_LWIP_LAYER == 1)
#if !defined(CONFIG_MBED_ENABLED)
extern void ethernetif_recv(struct netif *netif, int total_len);
#endif
extern void lwip_PRE_SLEEP_PROCESSING(void);
extern void lwip_POST_SLEEP_PROCESSING(void);
#endif //CONFIG_LWIP_LAYER == 1
#ifdef CONFIG_WOWLAN
extern unsigned char *rltk_wlan_get_ip(int idx);
extern unsigned char *rltk_wlan_get_gw(int idx);
extern unsigned char *rltk_wlan_get_gwmask(int idx);
#endif
#ifdef __cplusplus
}
#endif
#endif //#ifndef __LWIP_INTF_H__
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/osdep/lwip_intf.h
|
C
|
apache-2.0
| 3,162
|
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************/
#ifndef __SKBUFF_H__
#define __SKBUFF_H__
struct sk_buff_head {
struct list_head *next, *prev;
unsigned int qlen;
};
#ifdef CONFIG_TRACE_SKB
#define TRACE_SKB_DEPTH 8
#endif
struct sk_buff {
/* These two members must be first. */
struct sk_buff *next; /* Next buffer in list */
struct sk_buff *prev; /* Previous buffer in list */
struct sk_buff_head *list; /* List we are on */
unsigned char *head; /* Head of buffer */
unsigned char *data; /* Data head pointer */
unsigned char *tail; /* Tail pointer */
unsigned char *end; /* End pointer */
void *dev; /* Device we arrived on/are leaving by */
unsigned int len; /* Length of actual data */
#ifdef CONFIG_TRACE_SKB
unsigned int liston[TRACE_SKB_DEPTH]; /* Trace the Lists we went through */
const char *funcname[TRACE_SKB_DEPTH];
unsigned int list_idx; /* Trace the List we are on */
#endif
//#ifdef CONFIG_DONT_CARE_TP
int dyalloc_flag;
//#endif
};
unsigned char *skb_put(struct sk_buff *skb, unsigned int len);
unsigned char *skb_pull(struct sk_buff *skb, unsigned int len);
void skb_reserve(struct sk_buff *skb, unsigned int len);
void skb_assign_buf(struct sk_buff *skb, unsigned char *buf, unsigned int len);
unsigned char *skb_tail_pointer(const struct sk_buff *skb);
void skb_set_tail_pointer(struct sk_buff *skb, const int offset);
unsigned char *skb_end_pointer(const struct sk_buff *skb);
void init_skb_pool(void);
void init_skb_data_pool(void);
#ifndef CONFIG_DONT_CARE_TP
struct sk_buff *dev_alloc_skb(unsigned int length, unsigned int reserve_len);
#else
struct sk_buff *dev_alloc_tx_skb(unsigned int length, unsigned int reserve_len);
struct sk_buff *dev_alloc_rx_skb(unsigned int length, unsigned int reserve_len);
#define dev_alloc_skb dev_alloc_tx_skb
#endif
void kfree_skb(struct sk_buff *skb);
#endif //__SKBUFF_H__
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/osdep/skbuff.h
|
C
|
apache-2.0
| 2,620
|
/******************************************************************************
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
*
******************************************************************************/
#ifndef _LINUX_WIRELESS_H
#define _LINUX_WIRELESS_H
/************************** DOCUMENTATION **************************/
/*
* Initial APIs (1996 -> onward) :
* -----------------------------
* Basically, the wireless extensions are for now a set of standard ioctl
* call + /proc/net/wireless
*
* The entry /proc/net/wireless give statistics and information on the
* driver.
* This is better than having each driver having its entry because
* its centralised and we may remove the driver module safely.
*
* Ioctl are used to configure the driver and issue commands. This is
* better than command line options of insmod because we may want to
* change dynamically (while the driver is running) some parameters.
*
* The ioctl mechanimsm are copied from standard devices ioctl.
* We have the list of command plus a structure descibing the
* data exchanged...
* Note that to add these ioctl, I was obliged to modify :
* # net/core/dev.c (two place + add include)
* # net/ipv4/af_inet.c (one place + add include)
*
* /proc/net/wireless is a copy of /proc/net/dev.
* We have a structure for data passed from the driver to /proc/net/wireless
* Too add this, I've modified :
* # net/core/dev.c (two other places)
* # include/linux/netdevice.h (one place)
* # include/linux/proc_fs.h (one place)
*
* New driver API (2002 -> onward) :
* -------------------------------
* This file is only concerned with the user space API and common definitions.
* The new driver API is defined and documented in :
* # include/net/iw_handler.h
*
* Note as well that /proc/net/wireless implementation has now moved in :
* # net/core/wireless.c
*
* Wireless Events (2002 -> onward) :
* --------------------------------
* Events are defined at the end of this file, and implemented in :
* # net/core/wireless.c
*
* Other comments :
* --------------
* Do not add here things that are redundant with other mechanisms
* (drivers init, ifconfig, /proc/net/dev, ...) and with are not
* wireless specific.
*
* These wireless extensions are not magic : each driver has to provide
* support for them...
*
* IMPORTANT NOTE : As everything in the kernel, this is very much a
* work in progress. Contact me if you have ideas of improvements...
*/
/***************************** INCLUDES *****************************/
/* This header is used in user-space, therefore need to be sanitised
* for that purpose. Those includes are usually not compatible with glibc.
* To know which includes to use in user-space, check iwlib.h. */
#ifdef __KERNEL__
#include <linux/types.h> /* for "caddr_t" et al */
#include <linux/socket.h> /* for "struct sockaddr" et al */
#include <linux/if.h> /* for IFNAMSIZ and co... */
#endif /* __KERNEL__ */
//#include <sockets.h>
#define IFNAMSIZ 16
#define ARPHRD_ETHER 1 /* ethernet hardware format */
/***************************** VERSION *****************************/
/*
* This constant is used to know the availability of the wireless
* extensions and to know which version of wireless extensions it is
* (there is some stuff that will be added in the future...)
* I just plan to increment with each new version.
*/
#define WIRELESS_EXT 22
/*
* Changes :
*
* V2 to V3
* --------
* Alan Cox start some incompatibles changes. I've integrated a bit more.
* - Encryption renamed to Encode to avoid US regulation problems
* - Frequency changed from float to struct to avoid problems on old 386
*
* V3 to V4
* --------
* - Add sensitivity
*
* V4 to V5
* --------
* - Missing encoding definitions in range
* - Access points stuff
*
* V5 to V6
* --------
* - 802.11 support (ESSID ioctls)
*
* V6 to V7
* --------
* - define IW_ESSID_MAX_SIZE and IW_MAX_AP
*
* V7 to V8
* --------
* - Changed my e-mail address
* - More 802.11 support (nickname, rate, rts, frag)
* - List index in frequencies
*
* V8 to V9
* --------
* - Support for 'mode of operation' (ad-hoc, managed...)
* - Support for unicast and multicast power saving
* - Change encoding to support larger tokens (>64 bits)
* - Updated iw_params (disable, flags) and use it for NWID
* - Extracted iw_point from iwreq for clarity
*
* V9 to V10
* ---------
* - Add PM capability to range structure
* - Add PM modifier : MAX/MIN/RELATIVE
* - Add encoding option : IW_ENCODE_NOKEY
* - Add TxPower ioctls (work like TxRate)
*
* V10 to V11
* ----------
* - Add WE version in range (help backward/forward compatibility)
* - Add retry ioctls (work like PM)
*
* V11 to V12
* ----------
* - Add SIOCSIWSTATS to get /proc/net/wireless programatically
* - Add DEV PRIVATE IOCTL to avoid collisions in SIOCDEVPRIVATE space
* - Add new statistics (frag, retry, beacon)
* - Add average quality (for user space calibration)
*
* V12 to V13
* ----------
* - Document creation of new driver API.
* - Extract union iwreq_data from struct iwreq (for new driver API).
* - Rename SIOCSIWNAME as SIOCSIWCOMMIT
*
* V13 to V14
* ----------
* - Wireless Events support : define struct iw_event
* - Define additional specific event numbers
* - Add "addr" and "param" fields in union iwreq_data
* - AP scanning stuff (SIOCSIWSCAN and friends)
*
* V14 to V15
* ----------
* - Add IW_PRIV_TYPE_ADDR for struct sockaddr private arg
* - Make struct iw_freq signed (both m & e), add explicit padding
* - Add IWEVCUSTOM for driver specific event/scanning token
* - Add IW_MAX_GET_SPY for driver returning a lot of addresses
* - Add IW_TXPOW_RANGE for range of Tx Powers
* - Add IWEVREGISTERED & IWEVEXPIRED events for Access Points
* - Add IW_MODE_MONITOR for passive monitor
*
* V15 to V16
* ----------
* - Increase the number of bitrates in iw_range to 32 (for 802.11g)
* - Increase the number of frequencies in iw_range to 32 (for 802.11b+a)
* - Reshuffle struct iw_range for increases, add filler
* - Increase IW_MAX_AP to 64 for driver returning a lot of addresses
* - Remove IW_MAX_GET_SPY because conflict with enhanced spy support
* - Add SIOCSIWTHRSPY/SIOCGIWTHRSPY and "struct iw_thrspy"
* - Add IW_ENCODE_TEMP and iw_range->encoding_login_index
*
* V16 to V17
* ----------
* - Add flags to frequency -> auto/fixed
* - Document (struct iw_quality *)->updated, add new flags (INVALID)
* - Wireless Event capability in struct iw_range
* - Add support for relative TxPower (yick !)
*
* V17 to V18 (From Jouni Malinen <jkmaline@cc.hut.fi>)
* ----------
* - Add support for WPA/WPA2
* - Add extended encoding configuration (SIOCSIWENCODEEXT and
* SIOCGIWENCODEEXT)
* - Add SIOCSIWGENIE/SIOCGIWGENIE
* - Add SIOCSIWMLME
* - Add SIOCSIWPMKSA
* - Add struct iw_range bit field for supported encoding capabilities
* - Add optional scan request parameters for SIOCSIWSCAN
* - Add SIOCSIWAUTH/SIOCGIWAUTH for setting authentication and WPA
* related parameters (extensible up to 4096 parameter values)
* - Add wireless events: IWEVGENIE, IWEVMICHAELMICFAILURE,
* IWEVASSOCREQIE, IWEVASSOCRESPIE, IWEVPMKIDCAND
*
* V18 to V19
* ----------
* - Remove (struct iw_point *)->pointer from events and streams
* - Remove header includes to help user space
* - Increase IW_ENCODING_TOKEN_MAX from 32 to 64
* - Add IW_QUAL_ALL_UPDATED and IW_QUAL_ALL_INVALID macros
* - Add explicit flag to tell stats are in dBm : IW_QUAL_DBM
* - Add IW_IOCTL_IDX() and IW_EVENT_IDX() macros
*
* V19 to V20
* ----------
* - RtNetlink requests support (SET/GET)
*
* V20 to V21
* ----------
* - Remove (struct net_device *)->get_wireless_stats()
* - Change length in ESSID and NICK to strlen() instead of strlen()+1
* - Add IW_RETRY_SHORT/IW_RETRY_LONG retry modifiers
* - Power/Retry relative values no longer * 100000
* - Add explicit flag to tell stats are in 802.11k RCPI : IW_QUAL_RCPI
*
* V21 to V22
* ----------
* - Prevent leaking of kernel space in stream on 64 bits.
*/
/**************************** CONSTANTS ****************************/
typedef unsigned char __u8;
typedef char __s8;
typedef unsigned short __u16;
typedef short __s16;
typedef unsigned int __u32;
typedef int __s32;
typedef unsigned long long __u64;
typedef long long __i64;
#define E2BIG 7 /* Argument list too long */
#define ETH_ALEN 6 /* Octets in one ethernet addr */
/* Device private ioctl calls */
/*
* These 16 ioctls are available to devices via the do_ioctl() device
* vector. Each device should include this file and redefine these names
* as their own. Because these are device dependent it is a good idea
* _NOT_ to issue them to random objects and hope.
*
* THESE IOCTLS ARE _DEPRECATED_ AND WILL DISAPPEAR IN 2.5.X -DaveM
*/
#define SIOCDEVPRIVATE 0x89F0 /* to 89FF */
/*
* These 16 ioctl calls are protocol private
*/
#define SIOCPROTOPRIVATE 0x89E0 /* to 89EF */
/* -------------------------- IOCTL LIST -------------------------- */
/* Wireless Identification */
#define SIOCSIWCOMMIT 0x8B00 /* Commit pending changes to driver */
#define SIOCGIWNAME 0x8B01 /* get name == wireless protocol */
/* SIOCGIWNAME is used to verify the presence of Wireless Extensions.
* Common values : "IEEE 802.11-DS", "IEEE 802.11-FH", "IEEE 802.11b"...
* Don't put the name of your driver there, it's useless. */
/* Basic operations */
#define SIOCSIWNWID 0x8B02 /* set network id (pre-802.11) */
#define SIOCGIWNWID 0x8B03 /* get network id (the cell) */
#define SIOCSIWFREQ 0x8B04 /* set channel/frequency (Hz) */
#define SIOCGIWFREQ 0x8B05 /* get channel/frequency (Hz) */
#define SIOCSIWMODE 0x8B06 /* set operation mode */
#define SIOCGIWMODE 0x8B07 /* get operation mode */
#define SIOCSIWSENS 0x8B08 /* set sensitivity (dBm) */
#define SIOCGIWSENS 0x8B09 /* get sensitivity (dBm) */
/* Informative stuff */
#define SIOCSIWRANGE 0x8B0A /* Unused */
#define SIOCGIWRANGE 0x8B0B /* Get range of parameters */
#define SIOCSIWPRIV 0x8B0C /* Unused */
#define SIOCGIWPRIV 0x8B0D /* get private ioctl interface info */
#define SIOCSIWSTATS 0x8B0E /* Unused */
#define SIOCGIWSTATS 0x8B0F /* Get /proc/net/wireless stats */
/* SIOCGIWSTATS is strictly used between user space and the kernel, and
* is never passed to the driver (i.e. the driver will never see it). */
/* Spy support (statistics per MAC address - used for Mobile IP support) */
#define SIOCSIWSPY 0x8B10 /* set spy addresses */
#define SIOCGIWSPY 0x8B11 /* get spy info (quality of link) */
#define SIOCSIWTHRSPY 0x8B12 /* set spy threshold (spy event) */
#define SIOCGIWTHRSPY 0x8B13 /* get spy threshold */
/* Access Point manipulation */
#define SIOCSIWAP 0x8B14 /* set access point MAC addresses */
#define SIOCGIWAP 0x8B15 /* get access point MAC addresses */
#define SIOCGIWAPLIST 0x8B17 /* Deprecated in favor of scanning */
#define SIOCSIWSCAN 0x8B18 /* trigger scanning (list cells) */
#define SIOCGIWSCAN 0x8B19 /* get scanning results */
/* 802.11 specific support */
#define SIOCSIWESSID 0x8B1A /* set ESSID (network name) */
#define SIOCGIWESSID 0x8B1B /* get ESSID */
#define SIOCSIWNICKN 0x8B1C /* set node name/nickname */
#define SIOCGIWNICKN 0x8B1D /* get node name/nickname */
/* As the ESSID and NICKN are strings up to 32 bytes long, it doesn't fit
* within the 'iwreq' structure, so we need to use the 'data' member to
* point to a string in user space, like it is done for RANGE... */
/* Other parameters useful in 802.11 and some other devices */
#define SIOCSIWRATE 0x8B20 /* set default bit rate (bps) */
#define SIOCGIWRATE 0x8B21 /* get default bit rate (bps) */
#define SIOCSIWRTS 0x8B22 /* set RTS/CTS threshold (bytes) */
#define SIOCGIWRTS 0x8B23 /* get RTS/CTS threshold (bytes) */
#define SIOCSIWFRAG 0x8B24 /* set fragmentation thr (bytes) */
#define SIOCGIWFRAG 0x8B25 /* get fragmentation thr (bytes) */
#define SIOCSIWTXPOW 0x8B26 /* set transmit power (dBm) */
#define SIOCGIWTXPOW 0x8B27 /* get transmit power (dBm) */
#define SIOCSIWRETRY 0x8B28 /* set retry limits and lifetime */
#define SIOCGIWRETRY 0x8B29 /* get retry limits and lifetime */
/* Encoding stuff (scrambling, hardware security, WEP...) */
#define SIOCSIWENCODE 0x8B2A /* set encoding token & mode */
#define SIOCGIWENCODE 0x8B2B /* get encoding token & mode */
/* Power saving stuff (power management, unicast and multicast) */
#define SIOCSIWPOWER 0x8B2C /* set Power Management settings */
#define SIOCGIWPOWER 0x8B2D /* get Power Management settings */
/* Modulation bitmask */
#define SIOCSIWMODUL 0x8B2E /* set Modulations settings */
#define SIOCGIWMODUL 0x8B2F /* get Modulations settings */
/* WPA : Generic IEEE 802.11 informatiom element (e.g., for WPA/RSN/WMM).
* This ioctl uses struct iw_point and data buffer that includes IE id and len
* fields. More than one IE may be included in the request. Setting the generic
* IE to empty buffer (len=0) removes the generic IE from the driver. Drivers
* are allowed to generate their own WPA/RSN IEs, but in these cases, drivers
* are required to report the used IE as a wireless event, e.g., when
* associating with an AP. */
#define SIOCSIWGENIE 0x8B30 /* set generic IE */
#define SIOCGIWGENIE 0x8B31 /* get generic IE */
/* WPA : IEEE 802.11 MLME requests */
#define SIOCSIWMLME 0x8B16 /* request MLME operation; uses
* struct iw_mlme */
/* WPA : Authentication mode parameters */
#define SIOCSIWAUTH 0x8B32 /* set authentication mode params */
#define SIOCGIWAUTH 0x8B33 /* get authentication mode params */
/* WPA : Extended version of encoding configuration */
#define SIOCSIWENCODEEXT 0x8B34 /* set encoding token & mode */
#define SIOCGIWENCODEEXT 0x8B35 /* get encoding token & mode */
/* WPA2/WPA3 : Set PMKSA Cache Management Enable */
#define SIOCSIWPMKSA 0x8B36 /* PMKSA cache operation */
/* Send Mgnt Frame or Action Frame */
#define SIOCSIWMGNTSEND 0x8B37 /* Send Mgnt Frame or Action Frame */
/* Send WPS EAPOL Frame */
#define SIOCSIWEAPOLSEND 0x8B38 /* Send WPS EAPOL Frame */
/* Set MailBox Info */
#define SIOCSIMAILBOX 0x8B39 /* Set MailBox Info */
/* Set Management Frame Protection Support */
#define SIOCSIWMFP 0x8B3A /* Set Management Frame Protection Support */
/* Set Finite cyclic groups id for SAE */
#define SIOCSIWGRPID 0x8B3B /* Set Finite cyclic groups id for SAE */
/* Get rssiBCN */
#define SIOCGIWBCNSENS 0x8B40 /* Get beacon average rssi */
/* -------------------- DEV PRIVATE IOCTL LIST -------------------- */
/* These 32 ioctl are wireless device private, for 16 commands.
* Each driver is free to use them for whatever purpose it chooses,
* however the driver *must* export the description of those ioctls
* with SIOCGIWPRIV and *must* use arguments as defined below.
* If you don't follow those rules, DaveM is going to hate you (reason :
* it make mixed 32/64bit operation impossible).
*/
#define SIOCIWFIRSTPRIV 0x8BE0
#define SIOCIWLASTPRIV 0x8BFF
#define SIOCSIWPRIVADAPTIVITY 0x8BFB
#define SIOCGIWPRIVPASSPHRASE 0x8BFC
#define SIOCSIWPRIVCOUNTRY 0x8BFD
#define SIOCSIWPRIVAPESSID 0x8BFE
#define SIOCSIWPRIVPASSPHRASE 0x8BFF
/* Previously, we were using SIOCDEVPRIVATE, but we now have our
* separate range because of collisions with other tools such as
* 'mii-tool'.
* We now have 32 commands, so a bit more space ;-).
* Also, all 'even' commands are only usable by root and don't return the
* content of ifr/iwr to user (but you are not obliged to use the set/get
* convention, just use every other two command). More details in iwpriv.c.
* And I repeat : you are not forced to use them with iwpriv, but you
* must be compliant with it.
*/
/* ------------------------- IOCTL STUFF ------------------------- */
/* The first and the last (range) */
#define SIOCIWFIRST 0x8B00
#define SIOCIWLAST SIOCIWLASTPRIV /* 0x8BFF */
#define IW_IOCTL_IDX(cmd) ((cmd) - SIOCIWFIRST)
/* Odd : get (world access), even : set (root access) */
#define IW_IS_SET(cmd) (!((cmd) & 0x1))
#define IW_IS_GET(cmd) ((cmd) & 0x1)
/* ----------------------- WIRELESS EVENTS ----------------------- */
/* Those are *NOT* ioctls, do not issue request on them !!! */
/* Most events use the same identifier as ioctl requests */
#define IWEVTXDROP 0x8C00 /* Packet dropped to excessive retry */
#define IWEVQUAL 0x8C01 /* Quality part of statistics (scan) */
#define IWEVCUSTOM 0x8C02 /* Driver specific ascii string */
#define IWEVREGISTERED 0x8C03 /* Discovered a new node (AP mode) */
#define IWEVEXPIRED 0x8C04 /* Expired a node (AP mode) */
#define IWEVGENIE 0x8C05 /* Generic IE (WPA, RSN, WMM, ..)
* (scan results); This includes id and
* length fields. One IWEVGENIE may
* contain more than one IE. Scan
* results may contain one or more
* IWEVGENIE events. */
#define IWEVMICHAELMICFAILURE 0x8C06 /* Michael MIC failure
* (struct iw_michaelmicfailure)
*/
#define IWEVASSOCREQIE 0x8C07 /* IEs used in (Re)Association Request.
* The data includes id and length
* fields and may contain more than one
* IE. This event is required in
* Managed mode if the driver
* generates its own WPA/RSN IE. This
* should be sent just before
* IWEVREGISTERED event for the
* association. */
#define IWEVASSOCRESPIE 0x8C08 /* IEs used in (Re)Association
* Response. The data includes id and
* length fields and may contain more
* than one IE. This may be sent
* between IWEVASSOCREQIE and
* IWEVREGISTERED events for the
* association. */
#define IWEVPMKIDCAND 0x8C09 /* PMKID candidate for RSN
* pre-authentication
* (struct iw_pmkid_cand) */
#define IWEVFIRST 0x8C00
#define IW_EVENT_IDX(cmd) ((cmd) - IWEVFIRST)
/* Indicate Mgnt Frame and Action Frame to uplayer*/
#define IWEVMGNTRECV 0x8C10 /* Indicate Mgnt Frame to uplayer */
/* ------------------------- PRIVATE INFO ------------------------- */
/*
* The following is used with SIOCGIWPRIV. It allow a driver to define
* the interface (name, type of data) for its private ioctl.
* Privates ioctl are SIOCIWFIRSTPRIV -> SIOCIWLASTPRIV
*/
#define IW_PRIV_TYPE_MASK 0x7000 /* Type of arguments */
#define IW_PRIV_TYPE_NONE 0x0000
#define IW_PRIV_TYPE_BYTE 0x1000 /* Char as number */
#define IW_PRIV_TYPE_CHAR 0x2000 /* Char as character */
#define IW_PRIV_TYPE_INT 0x4000 /* 32 bits int */
#define IW_PRIV_TYPE_FLOAT 0x5000 /* struct iw_freq */
#define IW_PRIV_TYPE_ADDR 0x6000 /* struct sockaddr */
#define IW_PRIV_SIZE_FIXED 0x0800 /* Variable or fixed number of args */
#define IW_PRIV_SIZE_MASK 0x07FF /* Max number of those args */
/*
* Note : if the number of args is fixed and the size < 16 octets,
* instead of passing a pointer we will put args in the iwreq struct...
*/
/* ----------------------- OTHER CONSTANTS ----------------------- */
/* Maximum frequencies in the range struct */
#define IW_MAX_FREQUENCIES 32
/* Note : if you have something like 80 frequencies,
* don't increase this constant and don't fill the frequency list.
* The user will be able to set by channel anyway... */
/* Maximum bit rates in the range struct */
#define IW_MAX_BITRATES 32
/* Maximum tx powers in the range struct */
#define IW_MAX_TXPOWER 8
/* Note : if you more than 8 TXPowers, just set the max and min or
* a few of them in the struct iw_range. */
/* Maximum of address that you may set with SPY */
#define IW_MAX_SPY 8
/* Maximum of address that you may get in the
list of access points in range */
#define IW_MAX_AP 64
/* Maximum size of the ESSID and NICKN strings */
#define IW_ESSID_MAX_SIZE 32
/* Modes of operation */
#define IW_MODE_AUTO 0 /* Let the driver decides */
#define IW_MODE_ADHOC 1 /* Single cell network */
#define IW_MODE_INFRA 2 /* Multi cell network, roaming, ... */
#define IW_MODE_MASTER 3 /* Synchronisation master or Access Point */
#define IW_MODE_REPEAT 4 /* Wireless Repeater (forwarder) */
#define IW_MODE_SECOND 5 /* Secondary master/repeater (backup) */
#define IW_MODE_MONITOR 6 /* Passive monitor (listen only) */
/* Statistics flags (bitmask in updated) */
#define IW_QUAL_QUAL_UPDATED 0x01 /* Value was updated since last read */
#define IW_QUAL_LEVEL_UPDATED 0x02
#define IW_QUAL_NOISE_UPDATED 0x04
#define IW_QUAL_ALL_UPDATED 0x07
#define IW_QUAL_DBM 0x08 /* Level + Noise are dBm */
#define IW_QUAL_QUAL_INVALID 0x10 /* Driver doesn't provide value */
#define IW_QUAL_LEVEL_INVALID 0x20
#define IW_QUAL_NOISE_INVALID 0x40
#define IW_QUAL_RCPI 0x80 /* Level + Noise are 802.11k RCPI */
#define IW_QUAL_ALL_INVALID 0x70
/* Frequency flags */
#define IW_FREQ_AUTO 0x00 /* Let the driver decides */
#define IW_FREQ_FIXED 0x01 /* Force a specific value */
/* Maximum number of size of encoding token available
* they are listed in the range structure */
#define IW_MAX_ENCODING_SIZES 8
/* Maximum size of the encoding token in bytes */
#define IW_ENCODING_TOKEN_MAX 64 /* 512 bits (for now) */
/* Flags for encoding (along with the token) */
#define IW_ENCODE_INDEX 0x00FF /* Token index (if needed) */
#define IW_ENCODE_FLAGS 0xFF00 /* Flags defined below */
#define IW_ENCODE_MODE 0xF000 /* Modes defined below */
#define IW_ENCODE_DISABLED 0x8000 /* Encoding disabled */
#define IW_ENCODE_ENABLED 0x0000 /* Encoding enabled */
#define IW_ENCODE_RESTRICTED 0x4000 /* Refuse non-encoded packets */
#define IW_ENCODE_OPEN 0x2000 /* Accept non-encoded packets */
#define IW_ENCODE_NOKEY 0x0800 /* Key is write only, so not present */
#define IW_ENCODE_TEMP 0x0400 /* Temporary key */
/* Power management flags available (along with the value, if any) */
#define IW_POWER_ON 0x0000 /* No details... */
#define IW_POWER_TYPE 0xF000 /* Type of parameter */
#define IW_POWER_PERIOD 0x1000 /* Value is a period/duration of */
#define IW_POWER_TIMEOUT 0x2000 /* Value is a timeout (to go asleep) */
#define IW_POWER_SAVING 0x4000 /* Value is relative (how aggressive)*/
#define IW_POWER_MODE 0x0F00 /* Power Management mode */
#define IW_POWER_UNICAST_R 0x0100 /* Receive only unicast messages */
#define IW_POWER_MULTICAST_R 0x0200 /* Receive only multicast messages */
#define IW_POWER_ALL_R 0x0300 /* Receive all messages though PM */
#define IW_POWER_FORCE_S 0x0400 /* Force PM procedure for sending unicast */
#define IW_POWER_REPEATER 0x0800 /* Repeat broadcast messages in PM period */
#define IW_POWER_MODIFIER 0x000F /* Modify a parameter */
#define IW_POWER_MIN 0x0001 /* Value is a minimum */
#define IW_POWER_MAX 0x0002 /* Value is a maximum */
#define IW_POWER_RELATIVE 0x0004 /* Value is not in seconds/ms/us */
/* Transmit Power flags available */
#define IW_TXPOW_TYPE 0x00FF /* Type of value */
#define IW_TXPOW_DBM 0x0000 /* Value is in dBm */
#define IW_TXPOW_MWATT 0x0001 /* Value is in mW */
#define IW_TXPOW_RELATIVE 0x0002 /* Value is in arbitrary units */
#define IW_TXPOW_RANGE 0x1000 /* Range of value between min/max */
/* Retry limits and lifetime flags available */
#define IW_RETRY_ON 0x0000 /* No details... */
#define IW_RETRY_TYPE 0xF000 /* Type of parameter */
#define IW_RETRY_LIMIT 0x1000 /* Maximum number of retries*/
#define IW_RETRY_LIFETIME 0x2000 /* Maximum duration of retries in us */
#define IW_RETRY_MODIFIER 0x00FF /* Modify a parameter */
#define IW_RETRY_MIN 0x0001 /* Value is a minimum */
#define IW_RETRY_MAX 0x0002 /* Value is a maximum */
#define IW_RETRY_RELATIVE 0x0004 /* Value is not in seconds/ms/us */
#define IW_RETRY_SHORT 0x0010 /* Value is for short packets */
#define IW_RETRY_LONG 0x0020 /* Value is for long packets */
/* Scanning request flags */
#define IW_SCAN_DEFAULT 0x0000 /* Default scan of the driver */
#define IW_SCAN_ALL_ESSID 0x0001 /* Scan all ESSIDs */
#define IW_SCAN_THIS_ESSID 0x0002 /* Scan only this ESSID */
#define IW_SCAN_ALL_FREQ 0x0004 /* Scan all Frequencies */
#define IW_SCAN_THIS_FREQ 0x0008 /* Scan only this Frequency */
#define IW_SCAN_ALL_MODE 0x0010 /* Scan all Modes */
#define IW_SCAN_THIS_MODE 0x0020 /* Scan only this Mode */
#define IW_SCAN_ALL_RATE 0x0040 /* Scan all Bit-Rates */
#define IW_SCAN_THIS_RATE 0x0080 /* Scan only this Bit-Rate */
/* struct iw_scan_req scan_type */
#define IW_SCAN_TYPE_ACTIVE 0
#define IW_SCAN_TYPE_PASSIVE 1
/* Maximum size of returned data */
#define IW_SCAN_MAX_DATA 4096 /* In bytes */
/* Max number of char in custom event - use multiple of them if needed */
#define IW_CUSTOM_MAX 256 /* In bytes */
/* Generic information element */
#define IW_GENERIC_IE_MAX 1024
/* MLME requests (SIOCSIWMLME / struct iw_mlme) */
#define IW_MLME_DEAUTH 0
#define IW_MLME_DISASSOC 1
#define IW_MLME_AUTH 2
#define IW_MLME_ASSOC 3
/* SIOCSIWAUTH/SIOCGIWAUTH struct iw_param flags */
#define IW_AUTH_INDEX 0x0FFF
#define IW_AUTH_FLAGS 0xF000
/* SIOCSIWAUTH/SIOCGIWAUTH parameters (0 .. 4095)
* (IW_AUTH_INDEX mask in struct iw_param flags; this is the index of the
* parameter that is being set/get to; value will be read/written to
* struct iw_param value field) */
#define IW_AUTH_WPA_VERSION 0
#define IW_AUTH_CIPHER_PAIRWISE 1
#define IW_AUTH_CIPHER_GROUP 2
#define IW_AUTH_KEY_MGMT 3
#define IW_AUTH_TKIP_COUNTERMEASURES 4
#define IW_AUTH_DROP_UNENCRYPTED 5
#define IW_AUTH_80211_AUTH_ALG 6
#define IW_AUTH_WPA_ENABLED 7
#define IW_AUTH_RX_UNENCRYPTED_EAPOL 8
#define IW_AUTH_ROAMING_CONTROL 9
#define IW_AUTH_PRIVACY_INVOKED 10
/* IW_AUTH_WPA_VERSION values (bit field) */
#define IW_AUTH_WPA_VERSION_DISABLED 0x00000001
#define IW_AUTH_WPA_VERSION_WPA 0x00000002
#define IW_AUTH_WPA_VERSION_WPA2 0x00000004
/* IW_AUTH_PAIRWISE_CIPHER and IW_AUTH_GROUP_CIPHER values (bit field) */
#define IW_AUTH_CIPHER_NONE 0x00000001
#define IW_AUTH_CIPHER_WEP40 0x00000002
#define IW_AUTH_CIPHER_TKIP 0x00000004
#define IW_AUTH_CIPHER_CCMP 0x00000008
#define IW_AUTH_CIPHER_WEP104 0x00000010
/* IW_AUTH_KEY_MGMT values (bit field) */
#define IW_AUTH_KEY_MGMT_802_1X 1
#define IW_AUTH_KEY_MGMT_PSK 2
/* IW_AUTH_80211_AUTH_ALG values (bit field) */
#define IW_AUTH_ALG_OPEN_SYSTEM 0x00000001
#define IW_AUTH_ALG_SHARED_KEY 0x00000002
#define IW_AUTH_ALG_LEAP 0x00000004
#define IW_AUTH_ALG_SAE 0x00000008
/* IW_AUTH_ROAMING_CONTROL values */
#define IW_AUTH_ROAMING_ENABLE 0 /* driver/firmware based roaming */
#define IW_AUTH_ROAMING_DISABLE 1 /* user space program used for roaming
* control */
/* SIOCSIWENCODEEXT definitions */
#define IW_ENCODE_SEQ_MAX_SIZE 8
/* struct iw_encode_ext ->alg */
#define IW_ENCODE_ALG_NONE 0
#define IW_ENCODE_ALG_WEP 1
#define IW_ENCODE_ALG_TKIP 2
#define IW_ENCODE_ALG_CCMP 3
#define IW_ENCODE_ALG_PMK 4
#define IW_ENCODE_ALG_AES_CMAC 5 //IGTK
/* struct iw_encode_ext ->ext_flags */
#define IW_ENCODE_EXT_TX_SEQ_VALID 0x00000001
#define IW_ENCODE_EXT_RX_SEQ_VALID 0x00000002
#define IW_ENCODE_EXT_GROUP_KEY 0x00000004
#define IW_ENCODE_EXT_SET_TX_KEY 0x00000008
/* IWEVMICHAELMICFAILURE : struct iw_michaelmicfailure ->flags */
#define IW_MICFAILURE_KEY_ID 0x00000003 /* Key ID 0..3 */
#define IW_MICFAILURE_GROUP 0x00000004
#define IW_MICFAILURE_PAIRWISE 0x00000008
#define IW_MICFAILURE_STAKEY 0x00000010
#define IW_MICFAILURE_COUNT 0x00000060 /* 1 or 2 (0 = count not supported)
*/
/* Bit field values for enc_capa in struct iw_range */
#define IW_ENC_CAPA_WPA 0x00000001
#define IW_ENC_CAPA_WPA2 0x00000002
#define IW_ENC_CAPA_CIPHER_TKIP 0x00000004
#define IW_ENC_CAPA_CIPHER_CCMP 0x00000008
/* Event capability macros - in (struct iw_range *)->event_capa
* Because we have more than 32 possible events, we use an array of
* 32 bit bitmasks. Note : 32 bits = 0x20 = 2^5. */
#define IW_EVENT_CAPA_BASE(cmd) ((cmd >= SIOCIWFIRSTPRIV) ? \
(cmd - SIOCIWFIRSTPRIV + 0x60) : \
(cmd - SIOCSIWCOMMIT))
#define IW_EVENT_CAPA_INDEX(cmd) (IW_EVENT_CAPA_BASE(cmd) >> 5)
#define IW_EVENT_CAPA_MASK(cmd) (1 << (IW_EVENT_CAPA_BASE(cmd) & 0x1F))
/* Event capability constants - event autogenerated by the kernel
* This list is valid for most 802.11 devices, customise as needed... */
#define IW_EVENT_CAPA_K_0 (IW_EVENT_CAPA_MASK(0x8B04) | \
IW_EVENT_CAPA_MASK(0x8B06) | \
IW_EVENT_CAPA_MASK(0x8B1A))
#define IW_EVENT_CAPA_K_1 (IW_EVENT_CAPA_MASK(0x8B2A))
/* "Easy" macro to set events in iw_range (less efficient) */
#define IW_EVENT_CAPA_SET(event_capa, cmd) (event_capa[IW_EVENT_CAPA_INDEX(cmd)] |= IW_EVENT_CAPA_MASK(cmd))
#define IW_EVENT_CAPA_SET_KERNEL(event_capa) {event_capa[0] |= IW_EVENT_CAPA_K_0; event_capa[1] |= IW_EVENT_CAPA_K_1; }
/* Modulations bitmasks */
#define IW_MODUL_ALL 0x00000000 /* Everything supported */
#define IW_MODUL_FH 0x00000001 /* Frequency Hopping */
#define IW_MODUL_DS 0x00000002 /* Original Direct Sequence */
#define IW_MODUL_CCK 0x00000004 /* 802.11b : 5.5 + 11 Mb/s */
#define IW_MODUL_11B (IW_MODUL_DS | IW_MODUL_CCK)
#define IW_MODUL_PBCC 0x00000008 /* TI : 5.5 + 11 + 22 Mb/s */
#define IW_MODUL_OFDM_A 0x00000010 /* 802.11a : 54 Mb/s */
#define IW_MODUL_11A (IW_MODUL_OFDM_A)
#define IW_MODUL_11AB (IW_MODUL_11B | IW_MODUL_11A)
#define IW_MODUL_OFDM_G 0x00000020 /* 802.11g : 54 Mb/s */
#define IW_MODUL_11G (IW_MODUL_11B | IW_MODUL_OFDM_G)
#define IW_MODUL_11AG (IW_MODUL_11G | IW_MODUL_11A)
#define IW_MODUL_TURBO 0x00000040 /* ATH : bonding, 108 Mb/s */
/* In here we should define MIMO stuff. Later... */
#define IW_MODUL_CUSTOM 0x40000000 /* Driver specific */
/* Bitrate flags available */
#define IW_BITRATE_TYPE 0x00FF /* Type of value */
#define IW_BITRATE_UNICAST 0x0001 /* Maximum/Fixed unicast bitrate */
#define IW_BITRATE_BROADCAST 0x0002 /* Fixed broadcast bitrate */
/****************************** TYPES ******************************/
/* --------------------------- SUBTYPES --------------------------- */
struct sockaddr_t {
__u8 sa_len;
__u8 sa_family;
char sa_data[14];
};
/*
* Generic format for most parameters that fit in an int
*/
struct iw_param
{
__s32 value; /* The value of the parameter itself */
__u8 fixed; /* Hardware should not use auto select */
__u8 disabled; /* Disable the feature */
__u16 flags; /* Various specifc flags (if any) */
};
/*
* For all data larger than 16 octets, we need to use a
* pointer to memory allocated in user space.
*/
struct iw_point
{
void *pointer; /* Pointer to the data (in user space) */
__u16 length; /* number of fields or size in bytes */
__u16 flags; /* Optional params */
};
/*
* A frequency
* For numbers lower than 10^9, we encode the number in 'm' and
* set 'e' to 0
* For number greater than 10^9, we divide it by the lowest power
* of 10 to get 'm' lower than 10^9, with 'm'= f / (10^'e')...
* The power of 10 is in 'e', the result of the division is in 'm'.
*/
struct iw_freq
{
__s32 m; /* Mantissa */
__s16 e; /* Exponent */
__u8 i; /* List index (when in range struct) */
__u8 flags; /* Flags (fixed/auto) */
};
/*
* Quality of the link
*/
struct iw_quality
{
__u8 qual; /* link quality (%retries, SNR,
%missed beacons or better...) */
__u8 level; /* signal level (dBm) */
__u8 noise; /* noise level (dBm) */
__u8 updated; /* Flags to know if updated */
};
/*
* Packet discarded in the wireless adapter due to
* "wireless" specific problems...
* Note : the list of counter and statistics in net_device_stats
* is already pretty exhaustive, and you should use that first.
* This is only additional stats...
*/
struct iw_discarded
{
__u32 nwid; /* Rx : Wrong nwid/essid */
__u32 code; /* Rx : Unable to code/decode (WEP) */
__u32 fragment; /* Rx : Can't perform MAC reassembly */
__u32 retries; /* Tx : Max MAC retries num reached */
__u32 misc; /* Others cases */
};
/*
* Packet/Time period missed in the wireless adapter due to
* "wireless" specific problems...
*/
struct iw_missed
{
__u32 beacon; /* Missed beacons/superframe */
};
/*
* Quality range (for spy threshold)
*/
struct iw_thrspy
{
struct sockaddr_t addr; /* Source address (hw/mac) */
struct iw_quality qual; /* Quality of the link */
struct iw_quality low; /* Low threshold */
struct iw_quality high; /* High threshold */
};
/*
* Optional data for scan request
*
* Note: these optional parameters are controlling parameters for the
* scanning behavior, these do not apply to getting scan results
* (SIOCGIWSCAN). Drivers are expected to keep a local BSS table and
* provide a merged results with all BSSes even if the previous scan
* request limited scanning to a subset, e.g., by specifying an SSID.
* Especially, scan results are required to include an entry for the
* current BSS if the driver is in Managed mode and associated with an AP.
*/
struct iw_scan_req
{
__u8 scan_type; /* IW_SCAN_TYPE_{ACTIVE,PASSIVE} */
__u8 essid_len;
__u8 num_channels; /* num entries in channel_list;
* 0 = scan all allowed channels */
__u8 flags; /* reserved as padding; use zero, this may
* be used in the future for adding flags
* to request different scan behavior */
struct sockaddr_t bssid; /* ff:ff:ff:ff:ff:ff for broadcast BSSID or
* individual address of a specific BSS */
/*
* Use this ESSID if IW_SCAN_THIS_ESSID flag is used instead of using
* the current ESSID. This allows scan requests for specific ESSID
* without having to change the current ESSID and potentially breaking
* the current association.
*/
__u8 essid[IW_ESSID_MAX_SIZE];
/*
* Optional parameters for changing the default scanning behavior.
* These are based on the MLME-SCAN.request from IEEE Std 802.11.
* TU is 1.024 ms. If these are set to 0, driver is expected to use
* reasonable default values. min_channel_time defines the time that
* will be used to wait for the first reply on each channel. If no
* replies are received, next channel will be scanned after this. If
* replies are received, total time waited on the channel is defined by
* max_channel_time.
*/
__u32 min_channel_time; /* in TU */
__u32 max_channel_time; /* in TU */
struct iw_freq channel_list[IW_MAX_FREQUENCIES];
};
/* ------------------------- WPA SUPPORT ------------------------- */
/*
* Extended data structure for get/set encoding (this is used with
* SIOCSIWENCODEEXT/SIOCGIWENCODEEXT. struct iw_point and IW_ENCODE_*
* flags are used in the same way as with SIOCSIWENCODE/SIOCGIWENCODE and
* only the data contents changes (key data -> this structure, including
* key data).
*
* If the new key is the first group key, it will be set as the default
* TX key. Otherwise, default TX key index is only changed if
* IW_ENCODE_EXT_SET_TX_KEY flag is set.
*
* Key will be changed with SIOCSIWENCODEEXT in all cases except for
* special "change TX key index" operation which is indicated by setting
* key_len = 0 and ext_flags |= IW_ENCODE_EXT_SET_TX_KEY.
*
* tx_seq/rx_seq are only used when respective
* IW_ENCODE_EXT_{TX,RX}_SEQ_VALID flag is set in ext_flags. Normal
* TKIP/CCMP operation is to set RX seq with SIOCSIWENCODEEXT and start
* TX seq from zero whenever key is changed. SIOCGIWENCODEEXT is normally
* used only by an Authenticator (AP or an IBSS station) to get the
* current TX sequence number. Using TX_SEQ_VALID for SIOCSIWENCODEEXT and
* RX_SEQ_VALID for SIOCGIWENCODEEXT are optional, but can be useful for
* debugging/testing.
*/
struct iw_encode_ext
{
__u32 ext_flags; /* IW_ENCODE_EXT_* */
__u8 tx_seq[IW_ENCODE_SEQ_MAX_SIZE]; /* LSB first */
__u8 rx_seq[IW_ENCODE_SEQ_MAX_SIZE]; /* LSB first */
struct sockaddr_t addr; /* ff:ff:ff:ff:ff:ff for broadcast/multicast
* (group) keys or unicast address for
* individual keys */
__u16 alg; /* IW_ENCODE_ALG_* */
__u16 key_len;
#ifdef __CC_ARM //Fix Keil compile error, must modify sizeof iw_encode_ext - Alex Fang
__u8 key[1];
#else
__u8 key[0];
#endif
};
/* SIOCSIWMLME data */
struct iw_mlme
{
__u16 cmd; /* IW_MLME_* */
__u16 reason_code;
struct sockaddr_t addr;
};
/* SIOCSIWPMKSA data */
#define IW_PMKSA_ADD 1
#define IW_PMKSA_REMOVE 2
#define IW_PMKSA_FLUSH 3
#define IW_PMKID_LEN 16
struct iw_pmksa
{
__u32 cmd; /* IW_PMKSA_* */
struct sockaddr_t bssid;
__u8 pmkid[IW_PMKID_LEN];
};
/* IWEVMICHAELMICFAILURE data */
struct iw_michaelmicfailure
{
__u32 flags;
struct sockaddr_t src_addr;
__u8 tsc[IW_ENCODE_SEQ_MAX_SIZE]; /* LSB first */
};
/* IWEVPMKIDCAND data */
#define IW_PMKID_CAND_PREAUTH 0x00000001 /* RNS pre-authentication enabled */
struct iw_pmkid_cand
{
__u32 flags; /* IW_PMKID_CAND_* */
__u32 index; /* the smaller the index, the higher the
* priority */
struct sockaddr_t bssid;
};
/* ------------------------ WIRELESS STATS ------------------------ */
/*
* Wireless statistics (used for /proc/net/wireless)
*/
struct iw_statistics
{
__u16 status; /* Status
* - device dependent for now */
struct iw_quality qual; /* Quality of the link
* (instant/mean/max) */
struct iw_discarded discard; /* Packet discarded counts */
struct iw_missed miss; /* Packet missed counts */
};
/* ------------------------ IOCTL REQUEST ------------------------ */
/*
* This structure defines the payload of an ioctl, and is used
* below.
*
* Note that this structure should fit on the memory footprint
* of iwreq (which is the same as ifreq), which mean a max size of
* 16 octets = 128 bits. Warning, pointers might be 64 bits wide...
* You should check this when increasing the structures defined
* above in this file...
*/
union iwreq_data
{
/* Config - generic */
char name[IFNAMSIZ];
/* Name : used to verify the presence of wireless extensions.
* Name of the protocol/provider... */
struct iw_point essid; /* Extended network name */
struct iw_param nwid; /* network id (or domain - the cell) */
struct iw_freq freq; /* frequency or channel :
* 0-1000 = channel
* > 1000 = frequency in Hz */
struct iw_param sens; /* signal level threshold */
struct iw_param bcnsens; /* signal level threshold */
struct iw_param bitrate; /* default bit rate */
struct iw_param txpower; /* default transmit power */
struct iw_param rts; /* RTS threshold threshold */
struct iw_param frag; /* Fragmentation threshold */
__u32 mode; /* Operation mode */
struct iw_param retry; /* Retry limits & lifetime */
struct iw_point encoding; /* Encoding stuff : tokens */
struct iw_param power; /* PM duration/timeout */
struct iw_quality qual; /* Quality part of statistics */
struct sockaddr_t ap_addr; /* Access point address */
struct sockaddr_t addr; /* Destination address (hw/mac) */
struct iw_param param; /* Other small parameters */
struct iw_point data; /* Other large parameters */
struct iw_point passphrase; /* Extended network name */
};
/*
* The structure to exchange data for ioctl.
* This structure is the same as 'struct ifreq', but (re)defined for
* convenience...
* Do I need to remind you about structure size (32 octets) ?
*/
struct iwreq
{
#if 0
union
{
char ifrn_name[IFNAMSIZ]; /* if name, e.g. "eth0" */
} ifr_ifrn;
#endif
char ifr_name[IFNAMSIZ]; /* if name, e.g. "eth0" */
/* Data part (defined just above) */
union iwreq_data u;
};
/* -------------------------- IOCTL DATA -------------------------- */
/*
* For those ioctl which want to exchange mode data that what could
* fit in the above structure...
*/
/*
* Range of parameters
*/
struct iw_range
{
/* Informative stuff (to choose between different interface) */
__u32 throughput; /* To give an idea... */
/* In theory this value should be the maximum benchmarked
* TCP/IP throughput, because with most of these devices the
* bit rate is meaningless (overhead an co) to estimate how
* fast the connection will go and pick the fastest one.
* I suggest people to play with Netperf or any benchmark...
*/
/* NWID (or domain id) */
__u32 min_nwid; /* Minimal NWID we are able to set */
__u32 max_nwid; /* Maximal NWID we are able to set */
/* Old Frequency (backward compat - moved lower ) */
__u16 old_num_channels;
__u8 old_num_frequency;
/* Wireless event capability bitmasks */
__u32 event_capa[6];
/* signal level threshold range */
__s32 sensitivity;
/* Quality of link & SNR stuff */
/* Quality range (link, level, noise)
* If the quality is absolute, it will be in the range [0 ; max_qual],
* if the quality is dBm, it will be in the range [max_qual ; 0].
* Don't forget that we use 8 bit arithmetics... */
struct iw_quality max_qual; /* Quality of the link */
/* This should contain the average/typical values of the quality
* indicator. This should be the threshold between a "good" and
* a "bad" link (example : monitor going from green to orange).
* Currently, user space apps like quality monitors don't have any
* way to calibrate the measurement. With this, they can split
* the range between 0 and max_qual in different quality level
* (using a geometric subdivision centered on the average).
* I expect that people doing the user space apps will feedback
* us on which value we need to put in each driver... */
struct iw_quality avg_qual; /* Quality of the link */
/* Rates */
__u8 num_bitrates; /* Number of entries in the list */
__s32 bitrate[IW_MAX_BITRATES]; /* list, in bps */
/* RTS threshold */
__s32 min_rts; /* Minimal RTS threshold */
__s32 max_rts; /* Maximal RTS threshold */
/* Frag threshold */
__s32 min_frag; /* Minimal frag threshold */
__s32 max_frag; /* Maximal frag threshold */
/* Power Management duration & timeout */
__s32 min_pmp; /* Minimal PM period */
__s32 max_pmp; /* Maximal PM period */
__s32 min_pmt; /* Minimal PM timeout */
__s32 max_pmt; /* Maximal PM timeout */
__u16 pmp_flags; /* How to decode max/min PM period */
__u16 pmt_flags; /* How to decode max/min PM timeout */
__u16 pm_capa; /* What PM options are supported */
/* Encoder stuff */
__u16 encoding_size[IW_MAX_ENCODING_SIZES]; /* Different token sizes */
__u8 num_encoding_sizes; /* Number of entry in the list */
__u8 max_encoding_tokens; /* Max number of tokens */
/* For drivers that need a "login/passwd" form */
__u8 encoding_login_index; /* token index for login token */
/* Transmit power */
__u16 txpower_capa; /* What options are supported */
__u8 num_txpower; /* Number of entries in the list */
__s32 txpower[IW_MAX_TXPOWER]; /* list, in bps */
/* Wireless Extension version info */
__u8 we_version_compiled; /* Must be WIRELESS_EXT */
__u8 we_version_source; /* Last update of source */
/* Retry limits and lifetime */
__u16 retry_capa; /* What retry options are supported */
__u16 retry_flags; /* How to decode max/min retry limit */
__u16 r_time_flags; /* How to decode max/min retry life */
__s32 min_retry; /* Minimal number of retries */
__s32 max_retry; /* Maximal number of retries */
__s32 min_r_time; /* Minimal retry lifetime */
__s32 max_r_time; /* Maximal retry lifetime */
/* Frequency */
__u16 num_channels; /* Number of channels [0; num - 1] */
__u8 num_frequency; /* Number of entry in the list */
struct iw_freq freq[IW_MAX_FREQUENCIES]; /* list */
/* Note : this frequency list doesn't need to fit channel numbers,
* because each entry contain its channel index */
__u32 enc_capa; /* IW_ENC_CAPA_* bit field */
/* More power management stuff */
__s32 min_pms; /* Minimal PM saving */
__s32 max_pms; /* Maximal PM saving */
__u16 pms_flags; /* How to decode max/min PM saving */
/* All available modulations for driver (hw may support less) */
__s32 modul_capa; /* IW_MODUL_* bit field */
/* More bitrate stuff */
__u32 bitrate_capa; /* Types of bitrates supported */
};
/*
* Private ioctl interface information
*/
struct iw_priv_args
{
__u32 cmd; /* Number of the ioctl to issue */
__u16 set_args; /* Type and number of args */
__u16 get_args; /* Type and number of args */
char name[IFNAMSIZ]; /* Name of the extension */
};
/* ----------------------- WIRELESS EVENTS ----------------------- */
/*
* Wireless events are carried through the rtnetlink socket to user
* space. They are encapsulated in the IFLA_WIRELESS field of
* a RTM_NEWLINK message.
*/
/*
* A Wireless Event. Contains basically the same data as the ioctl...
*/
struct iw_event
{
__u16 len; /* Real lenght of this stuff */
__u16 cmd; /* Wireless IOCTL */
union iwreq_data u; /* IOCTL fixed payload */
};
/* Size of the Event prefix (including padding and alignement junk) */
#define IW_EV_LCP_LEN (sizeof(struct iw_event) - sizeof(union iwreq_data))
/* Size of the various events */
#define IW_EV_CHAR_LEN (IW_EV_LCP_LEN + IFNAMSIZ)
#define IW_EV_UINT_LEN (IW_EV_LCP_LEN + sizeof(__u32))
#define IW_EV_FREQ_LEN (IW_EV_LCP_LEN + sizeof(struct iw_freq))
#define IW_EV_PARAM_LEN (IW_EV_LCP_LEN + sizeof(struct iw_param))
#define IW_EV_ADDR_LEN (IW_EV_LCP_LEN + sizeof(struct sockaddr_t))
#define IW_EV_QUAL_LEN (IW_EV_LCP_LEN + sizeof(struct iw_quality))
/* iw_point events are special. First, the payload (extra data) come at
* the end of the event, so they are bigger than IW_EV_POINT_LEN. Second,
* we omit the pointer, so start at an offset. */
#define IW_EV_POINT_OFF (((char *) &(((struct iw_point *) NULL)->length)) - \
(char *) NULL)
#define IW_EV_POINT_LEN (IW_EV_LCP_LEN + sizeof(struct iw_point) - \
IW_EV_POINT_OFF)
/* Size of the Event prefix when packed in stream */
#define IW_EV_LCP_PK_LEN (4)
/* Size of the various events when packed in stream */
#define IW_EV_CHAR_PK_LEN (IW_EV_LCP_PK_LEN + IFNAMSIZ)
#define IW_EV_UINT_PK_LEN (IW_EV_LCP_PK_LEN + sizeof(__u32))
#define IW_EV_FREQ_PK_LEN (IW_EV_LCP_PK_LEN + sizeof(struct iw_freq))
#define IW_EV_PARAM_PK_LEN (IW_EV_LCP_PK_LEN + sizeof(struct iw_param))
#define IW_EV_ADDR_PK_LEN (IW_EV_LCP_PK_LEN + sizeof(struct sockaddr_t))
#define IW_EV_QUAL_PK_LEN (IW_EV_LCP_PK_LEN + sizeof(struct iw_quality))
#define IW_EV_POINT_PK_LEN (IW_EV_LCP_LEN + 4)
#define IW_EXT_STR_FOURWAY_DONE "WPA/WPA2 handshake done"
#define IW_EXT_STR_RECONNECTION_FAIL "RECONNECTION FAILURE"
#define IW_EVT_STR_STA_ASSOC "STA Assoc"
#define IW_EVT_STR_STA_DISASSOC "STA Disassoc"
#define IW_EVT_STR_SEND_ACTION_DONE "Send Action Done"
#define IW_EVT_STR_NO_NETWORK "No Assoc Network After Scan Done"
#define IW_EVT_STR_ICV_ERROR "ICV Eror"
#define IW_EVT_STR_CHALLENGE_FAIL "Auth Challenge Fail"
#define IW_EVT_STR_SOFTAP_START "Softap Start"
#define IW_EVT_STR_SOFTAP_STOP "Softap Stop"
#endif /* _LINUX_WIRELESS_H */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/osdep/wireless.h
|
C
|
apache-2.0
| 46,677
|
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************/
#ifndef __WLAN_INTF_H__
#define __WLAN_INTF_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <autoconf.h>
#include <wireless.h>
#include "wifi_constants.h"
#ifndef WLAN0_IDX
#define WLAN0_IDX 0
#endif
#ifndef WLAN1_IDX
#define WLAN1_IDX 1
#endif
#ifndef WLAN_UNDEF
#define WLAN_UNDEF -1
#endif
/***********************************************************/
/*
struct sk_buff {
// These two members must be first.
struct sk_buff *next; // Next buffer in list
struct sk_buff *prev; // Previous buffer in list
struct sk_buff_head *list; // List we are on
unsigned char *head; // Head of buffer
unsigned char *data; // Data head pointer
unsigned char *tail; // Tail pointer
unsigned char *end; //End pointer
struct net_device *dev; //Device we arrived on/are leaving by
unsigned int len; // Length of actual data
};
*/
/************************************************************/
//----- ------------------------------------------------------------------
// Wlan Interface opened for upper layer
//----- ------------------------------------------------------------------
int rltk_wlan_init(int idx_wlan, rtw_mode_t mode); //return 0: success. -1:fail
void rltk_wlan_deinit(void);
void rltk_wlan_deinit_fastly(void);
int rltk_wlan_start(int idx_wlan);
void rltk_wlan_statistic(unsigned char idx);
unsigned char rltk_wlan_running(unsigned char idx); // interface is up. 0: interface is down
int rltk_wlan_control(unsigned long cmd, void *data);
int rltk_wlan_handshake_done(void);
int rltk_wlan_rf_on(void);
int rltk_wlan_rf_off(void);
int rltk_wlan_check_bus(void);
int rltk_wlan_wireless_mode(unsigned char mode);
int rltk_wlan_get_wireless_mode(unsigned char *pmode);
int rltk_wlan_set_wps_phase(unsigned char is_trigger_wps);
int rtw_ps_enable(int enable);
int rltk_wlan_is_connected_to_ap(void);
void rltk_wlan_btcoex_set_bt_state(unsigned char state);
int rltk_wlan_change_channel_plan(unsigned char channel_plan);
int rltk_set_tx_pause(unsigned char pause);
void rltk_set_rts_cts_mode(unsigned char mode);
#ifdef CONFIG_IEEE80211W
void rltk_wlan_tx_sa_query(unsigned char key_type);
void rltk_wlan_tx_deauth(unsigned char b_broadcast, unsigned char key_type);
void rltk_wlan_tx_auth(void);
#endif
#ifdef __cplusplus
}
#endif
#endif //#ifndef __WLAN_INTF_H__
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/src/osdep/wlan_intf.h
|
C
|
apache-2.0
| 3,091
|
#ifndef ROM_WLAN_RAM_MAP_H
#define ROM_WLAN_RAM_MAP_H
struct _rom_wlan_ram_map {
unsigned char * (*rtw_malloc)(unsigned int sz);
void (*rtw_mfree)(unsigned char *pbuf, unsigned int sz);
};
#endif /* ROM_WLAN_RAM_MAP_H */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/drivers/wlan/realtek/wlan_ram_map/rom/rom_wlan_ram_map.h
|
C
|
apache-2.0
| 225
|
/////////////////////////////////////////////////
//
// FTL , flash_translation_layer
// Realtek CN3-BT, Raven Su
//
/////////////////////////////////////////////////
#include "platform_stdlib.h"
#include "device_lock.h"
#include "freertos_service.h"
#include "osdep_service.h"
#include "ftl_int.h"
#include "ftl.h"
#include "flash_api.h"
//////////////////////////////////////////////////
#define FTL_PRINT_LEVEL FTL_LEVEL_ERROR
#define FTL_PRINTF(LEVEL, pFormat, ...) do {\
if (LEVEL <= FTL_PRINT_LEVEL)\
printf("["#LEVEL"]:"pFormat, ##__VA_ARGS__);\
}while(0)
//////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////
// [config]
//#define DBG_EN 1
//#define USE_LOCAL_DBG_DIRECT 1
//#define MONITOR_STATUS_INFO 1
#define FTL_MAGIC_PATTERN_VER01 0x635E
#define FTL_MAGIC_PATTERN_VER02 0x777F
//#define EXTRA_DEBUG 1
//#define FEATURE_WRITE_RECYCLE 1
//#define SAVE_TO_STORAGE_RECONFIRM_EN 1
#define FTL_USE_MAPPING_TABLE 1
#define FTL_ONLY_GC_IN_IDLE 0
#define FTL_APP_LOGICAL_ADDR_BASE 0
#if defined(WIN32) && (WIN32 == 1)
#define RAVEN_DEBUG 1
#endif
/////////////////////////////////////////////////////////////////
#define LOGIC_ADDR_MAP_BIT_NUM 12
struct Page_T *g_pPage = 0;
uint16_t g_free_cell_index;
uint8_t g_cur_pageID;
uint8_t g_doingGarbageCollection = 0;
uint8_t g_PAGE_num = 0;
uint8_t g_free_page_count;
#if defined(FEATURE_WRITE_RECYCLE) && (FEATURE_WRITE_RECYCLE == 1)
uint8_t g_read_pageID;
uint16_t g_read_data_index;
#endif
#if defined(MONITOR_STATUS_INFO) && (MONITOR_STATUS_INFO == 1)
#define MONITOR_STATUS_INFO_TABLE_SIZE (10)
uint32_t g_EraseCnt[ MONITOR_STATUS_INFO_TABLE_SIZE ]; // test 10
uint32_t g_GarbageCnt;
uint32_t g_RecycleCnt;
uint32_t g_WriteCnt;
#endif
#if 1//CONFIG_EFLASH_BOARD_EXIST
/////////////////////////////////////////////////////////////////
#define FMC_PAGE_SIZE 0x1000
#define PAGE_element (FMC_PAGE_SIZE/4)
#define PAGE_element_data ( (FMC_PAGE_SIZE/8)-1) // 511
#define MAX_logical_address_size (((PAGE_element_data*(g_PAGE_num-1))-1)<<2)
#define MAPPING_TABLE_SIZE (MAX_logical_address_size / 4 * LOGIC_ADDR_MAP_BIT_NUM / 8)
#define BIT_VALID BIT31
#define WRITABLE_32BIT 0xffffffff
#define INFO_beg_index (0)
#define INFO_end_index (1)
#define INFO_size (2)
#define FTL_ASSERT(x) //PLATFORM_ASSERT(x)
// 2K bytes / per page
struct Page_T
{
uint32_t Data[PAGE_element];
};
QueueHandle_t ftl_sem = NULL;
uint8_t *ftl_mapping_table = NULL;
bool do_gc_in_idle = FALSE;
uint8_t idle_gc_page_thres = 1;
uint16_t idle_gc_cell_thres = PAGE_element / 2;
extern uint32_t ftl_write(uint16_t logical_addr, uint32_t w_data);
extern bool ftl_page_erase(struct Page_T *p);
void ftl_mapping_table_init(void);
uint16_t read_mapping_table(uint16_t logical_addr);
uint32_t ftl_page_read(struct Page_T *p, uint32_t index)
{
uint32_t rdata = 0;
flash_t flash;
if (index < PAGE_element)
{
if (flash_read_word(&flash, (uint32_t)&p->Data[index], &rdata))
{
return rdata;
}
}
else
{
FTL_ASSERT(0);
}
return rdata;
}
void ftl_flash_write(uint32_t start_addr, uint32_t data)
{
flash_t flash;
device_mutex_lock(RT_DEV_LOCK_FLASH);
flash_write_word(&flash, start_addr, data);
device_mutex_unlock(RT_DEV_LOCK_FLASH);
}
bool ftl_flash_erase(uint32_t type, uint32_t addr)
{
flash_t flash;
if(EraseSector == type) {
device_mutex_lock(RT_DEV_LOCK_FLASH);
flash_erase_sector(&flash, addr);
device_mutex_unlock(RT_DEV_LOCK_FLASH);
return TRUE;
} else
return FALSE;
}
uint32_t ftl_page_write(struct Page_T *p, uint32_t index, uint32_t data)
{
flash_t flash;
if (index < PAGE_element)
{
ftl_flash_write((uint32_t)&p->Data[index], data);
uint32_t rdata = 0;
flash_read_word(&flash, (uint32_t)&p->Data[index], &rdata);
if (data != rdata)
{
FTL_PRINTF(FTL_LEVEL_ERROR, "[ftl](ftl_page_write) P: %x, idx: %d, D: 0x%08x, read back: %x \n",
p, index, data, rdata);
return FTL_WRITE_ERROR_READ_BACK;
}
return FTL_WRITE_SUCCESS;
#if defined(MONITOR_STATUS_INFO) && (MONITOR_STATUS_INFO == 1)
++g_WriteCnt;
#endif
}
else
{
return FTL_WRITE_ERROR_OUT_OF_SPACE;
}
}
uint8_t ftl_get_page_seq(struct Page_T *p)
{
uint32_t tmp = ftl_page_read(p, INFO_beg_index);
tmp >>= 16;
return tmp;
}
uint8_t ftl_key_get_length(uint32_t key)
{
if (flash_get_bit(key, BIT_VALID))
{
// valid
uint8_t length = (key >> 16);
return length;
}
else
{
// invalid
return 0x0;
}
}
uint32_t ftl_key_init(uint16_t logical_addr, uint8_t length)
{
FTL_ASSERT(length == 1); // todo
uint32_t result;
result = length;
result <<= 16;
result |= logical_addr;
result |= 0xff000000;
return result;
}
// logical_addr is 4 bytes alignment addr
uint32_t ftl_check_logical_addr(uint16_t logical_addr)
{
if (logical_addr & 0x3)
{
FTL_ASSERT(0);
return FTL_ERROR_INVALID_LOGICAL_ADDR;
}
if (logical_addr >= MAX_logical_address_size)
{
FTL_PRINTF(FTL_LEVEL_ERROR, "ftl_check_logical_addr logical_addr exceed MAX_logical_address_size (0x%x, 0x%x)",
logical_addr,
MAX_logical_address_size);
return FTL_ERROR_OUT_OF_SPACE;
}
return FTL_SUCCESS;
}
uint32_t ftl_page_is_valid(struct Page_T *p) // return 0 is valid
{
uint32_t info = ftl_page_read(p, INFO_beg_index);
if (flash_get_bit(info, BIT_VALID))
{
info &= 0xffff;
if (info == FTL_MAGIC_PATTERN_VER01)
{
return FTL_SUCCESS;
}
}
return FTL_ERROR_PAGE_FORMAT;
}
/*get invalid page count */
uint8_t ftl_get_free_page_count(void)
{
uint8_t CurPageID = g_cur_pageID;
FTL_ASSERT(CurPageID < g_PAGE_num);
uint8_t FreeCount = 0;
uint8_t NextPageID = CurPageID;
uint8_t TryCnt = g_PAGE_num;
while (TryCnt--)
{
++NextPageID;
NextPageID %= g_PAGE_num;
if (ftl_page_is_valid(g_pPage + NextPageID) != 0)
{
++FreeCount;
}
else
{
break;
}
}
return FreeCount;
}
uint32_t ftl_get_page_end_position(struct Page_T *p, uint16_t *pEndPos)
{
uint32_t tmp = ftl_page_read(p, INFO_end_index);
if (flash_get_bit(tmp, BIT_VALID))
{
tmp &= 0xffff;
*pEndPos = tmp;
return FTL_SUCCESS;
}
else
{
return FTL_ERROR_PAGE_END_FORMAT;
}
}
uint8_t ftl_get_prev_page(uint8_t CurPageID, uint8_t *pPrePageID) // 0 is ok
{
uint8_t result = 1;
uint8_t PrePageID;
if (CurPageID == 0)
{
PrePageID = g_PAGE_num - 1;
}
else
{
PrePageID = CurPageID - 1;
}
if (0 == ftl_page_is_valid(g_pPage + PrePageID))
{
uint8_t cur_Sequence = ftl_get_page_seq(g_pPage + CurPageID);
uint8_t pre_Sequence = ftl_get_page_seq(g_pPage + PrePageID);
if (cur_Sequence)
{
if (pre_Sequence + 1 == cur_Sequence)
{
*pPrePageID = PrePageID;
result = 0;
}
}
else
{
// cur_Sequence is 0
if (pre_Sequence == 0xff) // wrap
{
*pPrePageID = PrePageID;
result = 0;
}
}
}
else
{
result = 2 ;
}
return result;
}
uint8_t ftl_page_can_addr_drop(uint16_t logical_addr, uint8_t EndPageID)
{
uint8_t found = 0;
if (FTL_USE_MAPPING_TABLE == 1)
{
uint16_t phy_addr = read_mapping_table(logical_addr);
if ((phy_addr != 0) && (phy_addr / PAGE_element != EndPageID))
{
found = 1;
}
return found;
}
uint8_t pageID = g_cur_pageID;
uint16_t key_index = g_free_cell_index - 1;
L_retry:
if (EndPageID != pageID)
{
for (; key_index >= 3; key_index -= 2)
{
uint32_t key = ftl_page_read(g_pPage + pageID, key_index);
uint32_t length = ftl_key_get_length(key);
if (length == 1)
{
uint16_t addr = key & 0xffff;
if (addr == logical_addr)
{
found = 1;
//r_data = ftl_page_read( g_pPage+pageID,key_index-1 );
break;
}
}
else
{
FTL_PRINTF(FTL_LEVEL_ERROR, "[ftl] length != 1! func: %s, line: %d", __FUNCTION__, __LINE__);
}
}
uint8_t prePageID;
if (found == 0 && 0 == ftl_get_prev_page(pageID, &prePageID))
{
uint16_t EndPos;
if (0 == ftl_get_page_end_position(g_pPage + prePageID, &EndPos))
{
pageID = prePageID;
key_index = EndPos;
goto L_retry;
}
else
{
// todo, error recovery
//TODO;
pageID = prePageID;
key_index = PAGE_element - 1;
goto L_retry;
}
}
}
return found;
}
uint8_t ftl_page_get_oldest(void)
{
uint8_t UsedPageCnt = g_PAGE_num - ftl_get_free_page_count();
FTL_ASSERT(UsedPageCnt >= 1);
--UsedPageCnt;
uint8_t OldestPage;
if (g_cur_pageID >= UsedPageCnt)
{
OldestPage = g_cur_pageID - UsedPageCnt;
}
else
{
OldestPage = g_cur_pageID + g_PAGE_num - UsedPageCnt;
}
// make sure valid
FTL_ASSERT(0 == ftl_page_is_valid(g_pPage + OldestPage));
#if 0 // EXTRA_DEBUG
if (OldestPage == 0)
{
// make sure next page is invalid
ASSERT(ftl_page_is_valid(g_pPage + PAGE_num - 1));
}
else
{
// make sure next page is invalid
ASSERT(ftl_page_is_valid(g_pPage + OldestPage - 1));
}
#endif
FTL_ASSERT(OldestPage != g_cur_pageID);
//FLASH_PRINT_TRACE1("OldestPage: %d\r\n", OldestPage);
return OldestPage;
}
uint16_t ftl_page_garbage_collect_Imp(void)
{
uint16_t RecycleNum = 0;
//ftl_ioctl( FTL_IOCTL_DEBUG, 0, 0);
int8_t retry_count = g_PAGE_num - ftl_get_free_page_count() - 1;
FTL_ASSERT(g_PAGE_num > retry_count && retry_count >= 0);
// todo, pre-seek without any format
uint8_t Recycle_page;
uint16_t key_index;
uint16_t error;
L_retry:
#if defined(MONITOR_STATUS_INFO) && (MONITOR_STATUS_INFO == 1)
++g_GarbageCnt;
#endif
Recycle_page = ftl_page_get_oldest();
error = ftl_get_page_end_position(g_pPage + Recycle_page, &key_index);
if (error)
{
// error
key_index = PAGE_element - 1;
//TODO;
}
// drop or copy it
for (; key_index >= 3; key_index -= 2)
{
uint32_t key = ftl_page_read(g_pPage + Recycle_page, key_index);
uint32_t length = ftl_key_get_length(key);
if (length == 1)
{
uint16_t addr = key & 0xffff;
if (ftl_page_can_addr_drop(addr, Recycle_page))
{
// drop / recycle
//DPRINTF("drop [%d] addr: 0x%08x \n", candidate_key_index, candidate_addr);
++RecycleNum;
}
else
{
// copy it
//DPRINTF("copy [%d] addr: 0x%08x \n", candidate_key_index, candidate_addr);
uint32_t rdata = ftl_page_read(g_pPage + Recycle_page, key_index - 1);
// write to another place
ftl_write(addr, rdata);
}
}
else
{
FTL_PRINTF(FTL_LEVEL_ERROR, "ftl_page_garbage_collect_Imp:length != 1!recycle page:%x, retry_count:%x, index:%x, read value:%x",
Recycle_page, retry_count, key_index, key);
++RecycleNum;
}
}
// make the page to invalid page
//ftl_page_write(g_pPage + Recycle_page, INFO_beg_index, 0x0);
if (!ftl_page_erase(g_pPage + Recycle_page))
{
g_free_page_count = ftl_get_free_page_count();
return RecycleNum;
}
FTL_PRINTF(FTL_LEVEL_INFO, "[ftl] ftl_page_garbage_collect_Imp: Recycle_page:%d, RecycleNum:%d, retry_count:%d",
Recycle_page, RecycleNum, retry_count);
if (RecycleNum == 0)
{
if (retry_count)
{
--retry_count;
//DPRINTF("retry\n");
goto L_retry;
}
}
//ftl_ioctl( FTL_IOCTL_DEBUG, 1, 0);
//ftl_ioctl( FTL_IOCTL_DEBUG, 0, 0);
//DPRINTF("----ftl_page_garbage_collect_Imp, RecycleNum:%d \n", RecycleNum);
g_free_page_count = ftl_get_free_page_count();
return RecycleNum;
}
uint8_t ftl_page_garbage_collect(uint32_t page_thresh, uint32_t cell_thresh)
{
uint8_t result = 0;
if (NULL != ftl_sem)
{
xSemaphoreTakeRecursive(ftl_sem, portMAX_DELAY);
}
if (g_doingGarbageCollection == 0)
{
g_doingGarbageCollection = 1;
if (g_free_page_count <= page_thresh)
{
if (g_free_cell_index <= cell_thresh)
{
FTL_PRINTF(FTL_LEVEL_INFO, "[ftl] doGarbageCollection: page thres %d, cell thres %d", page_thresh,
cell_thresh);
ftl_page_garbage_collect_Imp();
result = 1;
}
}
g_doingGarbageCollection = 0;
}
if (NULL != ftl_sem)
{
xSemaphoreGiveRecursive(ftl_sem);
}
return result;
}
void ftl_garbage_collect_in_idle(void)
{
if (g_pPage == NULL)
{
return ;
}
if (do_gc_in_idle)
{
if (g_free_page_count <= idle_gc_page_thres)
{
if (g_free_cell_index <= idle_gc_cell_thres)
{
ftl_page_garbage_collect(idle_gc_page_thres, idle_gc_cell_thres);
}
}
}
}
void ftl_set_page_end_position(struct Page_T *p, uint16_t Endpos)
{
uint32_t data = Endpos;
data |= 0xffff0000;
//ftl_page_write(p, INFO_end_index, data);
flash_set_bit(&data, BIT_VALID);
FTL_ASSERT(1 == flash_get_bit(data, BIT_VALID));
ftl_page_write(p, INFO_end_index, data);
}
bool ftl_page_erase(struct Page_T *p)
{
uint32_t info = ftl_page_read(p, INFO_beg_index);
uint32_t data = 0xFFFF0000;
data |= FTL_MAGIC_PATTERN_VER02;
if ((info & 0xffff) == FTL_MAGIC_PATTERN_VER02)
{
FTL_PRINTF(FTL_LEVEL_INFO, " ftl_page_erase with already erased page: %x \n", p);
return TRUE;
}
if (ftl_flash_erase(EraseSector, (uint32_t)p))
{
if (FTL_WRITE_SUCCESS == ftl_page_write(p, INFO_beg_index, data))
{
return TRUE;
}
}
return FALSE;
}
bool ftl_page_format(struct Page_T *p, uint8_t sequence)
{
FTL_PRINTF(FTL_LEVEL_INFO, " ftl_page_format: %x seq: %d\n", p, sequence);
if (!ftl_page_erase(p))
{
return FALSE;
}
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 5060061)
uint32_t data = sequence;
#else
// fix keil compiler 5.5 optimization -o2 issue
// need to add volatile in case of ingoring below ftl_set_flag()
volatile uint32_t data = sequence;
#endif
data <<= 16;
data |= FTL_MAGIC_PATTERN_VER01;
data |= 0xff000000;
// ftl_page_write(p, INFO_beg_index, data);
flash_set_bit((uint32_t *)&data, BIT_VALID);
ftl_page_write(p, INFO_beg_index, data);
g_free_page_count--;
#if defined(MONITOR_STATUS_INFO) && (MONITOR_STATUS_INFO == 1)
++g_EraseCnt[ ftl_get_index_from_page(p) ];
#endif
return TRUE;
}
void ftl_recover_from_power_lost(void)
{
//DBG_PRINT_INFO_2("ftl_recover_from_power_lost");
if (ftl_get_free_page_count())
{
return;
}
//FLASH_PRINT_TRACE0("ftl_recover_from_power_lost");
int16_t RecycleNum = 0;
uint8_t Recycle_page;
uint16_t key_index;
uint16_t error;
uint16_t later_to_write_item_num;
//L_retry:
RecycleNum = 0;
later_to_write_item_num = 0;
Recycle_page = ftl_page_get_oldest();
//DPRINTF("Recycle_page:%d\n", Recycle_page);
error = ftl_get_page_end_position(g_pPage + Recycle_page, &key_index);
if (error)
{
// error
key_index = PAGE_element - 1;
}
// drop or copy it
for (; key_index >= 3; key_index -= 2)
{
uint32_t key = ftl_page_read(g_pPage + Recycle_page, key_index);
uint32_t length = ftl_key_get_length(key);
if (length == 1)
{
uint16_t addr = key & 0xffff;
if (ftl_page_can_addr_drop(addr, Recycle_page))
{
// drop / recycle
//DBG_PRINT_INFO_2("key_index:%d, addr: 0x%08x - drop\n", key_index, addr);
++RecycleNum;
}
else
{
// copy it
//DBG_PRINT_INFO_2("key_index:%d, addr: 0x%08x - copy\n", key_index, addr);
uint32_t rdata = ftl_page_read(g_pPage + Recycle_page, key_index - 1);
// write to another place
if ((g_free_cell_index + length) < PAGE_element)
{
--RecycleNum;
//FTL_ASSERT(length == 1);
ftl_write(addr, rdata);
}
else
{
++later_to_write_item_num;
// need more safe?? use another eflash page ?? or ram ??
}
}
}
else
{
//DBG_PRINT_INFO_1("length is not 1 (%d)", length);
FTL_PRINTF(FTL_LEVEL_ERROR, "[ftl] length != 1! func: %s, line: %d", __FUNCTION__, __LINE__);
++RecycleNum;
}
}
uint32_t handle_error = 0;
if (later_to_write_item_num)
{
handle_error = 1;
}
// make the page to invalid page
ftl_page_write(g_pPage + Recycle_page, INFO_beg_index, 0x0);
if (handle_error)
{
ftl_ioctl(FTL_IOCTL_CLEAR_ALL, 0, 0);
FTL_PRINTF(FTL_LEVEL_WARN, "recovery FTL fail... clean all");
}
#ifdef DBG_EN
ftl_ioctl(FTL_IOCTL_DEBUG, 0, 0);
#endif
}
uint16_t read_mapping_table(uint16_t logical_addr)
{
uint32_t bit_index = logical_addr / 4 * LOGIC_ADDR_MAP_BIT_NUM;
uint32_t byte_index = bit_index / 8;
uint32_t byte_offset = bit_index % 8;
uint16_t phy_addr = ftl_mapping_table[byte_index] + (ftl_mapping_table[byte_index + 1] << 8);
phy_addr = (phy_addr & (0xfff << byte_offset)) >> byte_offset;
phy_addr *= 2;
return phy_addr;
}
void write_mapping_table(uint16_t logical_addr, uint8_t pageID, uint16_t cell_index)
{
uint32_t bit_index = (logical_addr / 4) *
LOGIC_ADDR_MAP_BIT_NUM;//use 12 bit to represent one logical address
uint32_t byte_index = bit_index / 8;
uint32_t byte_offset = bit_index % 8;
uint32_t phy_addr_offset = (pageID * PAGE_element + cell_index) / 2;//8 bytes aligned
if (4 == byte_offset)
{
uint8_t phy_addr_offset_l = phy_addr_offset & 0x0f;
phy_addr_offset_l = (phy_addr_offset_l << 4) & 0xf0;
ftl_mapping_table[byte_index] &= 0x0f;
ftl_mapping_table[byte_index] |= phy_addr_offset_l;
uint8_t phy_addr_offset_h = (phy_addr_offset >> 4) & 0xff;
ftl_mapping_table[byte_index + 1] = phy_addr_offset_h;
}
else if (0 == byte_offset)
{
uint8_t phy_addr_offset_l = phy_addr_offset & 0xff;
ftl_mapping_table[byte_index] = phy_addr_offset_l;
uint8_t phy_addr_offset_h = (phy_addr_offset >> 8) & 0x0f;
ftl_mapping_table[byte_index + 1] &= 0xf0;
ftl_mapping_table[byte_index + 1] |= phy_addr_offset_h;
}
else
{
//error
}
}
// logical_addr is 4 bytes alignment addr
uint32_t ftl_read(uint16_t logical_addr, uint32_t *value)
{
uint32_t ret = FTL_READ_SUCCESS;
if (ftl_check_logical_addr(logical_addr))
{
//PLATFORM_ASSERT(0);
return FTL_READ_ERROR_INVALID_LOGICAL_ADDR;
}
else
{
if (FTL_USE_MAPPING_TABLE == 0)
{
uint8_t found = 0;
uint8_t pageID = g_cur_pageID;
int32_t key_index = g_free_cell_index - 1;
L_retry:
// todo, length is 1
//PRINTF("pageID,key_index: %d, %d \r\n", pageID, key_index);
for (; key_index >= 3; key_index -= 2)
{
uint32_t key = ftl_page_read(g_pPage + pageID, key_index);
uint32_t length = ftl_key_get_length(key);
if (length == 0)
{
continue;
}
//PLATFORM_ASSERT( length == 1);
if (length == 1)
{
uint16_t addr = key & 0xffff;
if (addr == logical_addr)
{
found = 1;
*value = ftl_page_read(g_pPage + pageID, key_index - 1);
ret = 0;
#if defined(FEATURE_WRITE_RECYCLE) && (FEATURE_WRITE_RECYCLE == 1)
g_read_pageID = pageID;
g_read_data_index = key_index - 1;
#endif
break;
}
}
else
{
FTL_PRINTF(FTL_LEVEL_ERROR, "[ftl] length != 1! line: %d", __LINE__);
}
}
uint8_t prePageID;
if (found == 0 && 0 == ftl_get_prev_page(pageID, &prePageID))
{
uint16_t EndPos;
if (0 == ftl_get_page_end_position(g_pPage + prePageID, &EndPos))
{
key_index = EndPos;
pageID = prePageID;
goto L_retry;
}
else
{
//TODO;
// todo, error recovery
key_index = PAGE_element - 1;
pageID = prePageID;
goto L_retry;
}
}
if (!found)
{
ret = FTL_READ_ERROR_READ_NOT_FOUND;
//ftl_ioctl( FTL_IOCTL_DEBUG,0,0);
}
}
else
{
uint16_t phy_addr = read_mapping_table(logical_addr);//index of data element
if (phy_addr == 0)//0 means invalid logical address
{
//FTL_PRINTF(FTL_LEVEL_ERROR, "[ftl] invalid logical address! line: %d", __LINE__);
return FTL_READ_ERROR_READ_NOT_FOUND;
}
uint8_t pageID = phy_addr / PAGE_element;
uint16_t key_index = phy_addr % PAGE_element;
uint32_t key = ftl_page_read(g_pPage + pageID, key_index + 1);
uint32_t length = ftl_key_get_length(key);
//PLATFORM_ASSERT( length == 1);
if (length == 1)
{
uint16_t addr = key & 0xffff;
if (addr == logical_addr)
{
*value = ftl_page_read(g_pPage + pageID, key_index);
ret = 0;
}
else
{
ret = FTL_READ_ERROR_PARSE_ERROR;
FTL_PRINTF(FTL_LEVEL_ERROR, "[ftl] logical address parse error! func: %s, line: %d", __FUNCTION__, __LINE__);
}
}
else
{
ret = FTL_READ_ERROR_PARSE_ERROR;
FTL_PRINTF(FTL_LEVEL_ERROR, "[ftl] length != 1! func: %s, line: %d", __FUNCTION__, __LINE__);
}
}
}
FTL_PRINTF(FTL_LEVEL_WARN, "[ftl] r 0x%08x: 0x%08x (%d)\r\n", logical_addr, *value, ret);
return ret;
}
// return 0 success
// return !0 fail
uint32_t ftl_save_to_storage(void *pdata_tmp, uint16_t offset, uint16_t size)
{
uint8_t *pdata8 = (uint8_t *)pdata_tmp;
if (g_pPage == NULL)
{
return FTL_WRITE_ERROR_NOT_INIT;
}
if ((offset & 0x3) || (size <= 0) || (size & 0x3))
{
return FTL_WRITE_ERROR_INVALID_PARAMETER;
}
#if defined(SAVE_TO_STORAGE_RECONFIRM_EN) && (SAVE_TO_STORAGE_RECONFIRM_EN == 1)
uint16_t bak_offset = offset;
uint16_t bak_size = size;
#endif
uint32_t ret = 0;
while (size > 0)
{
uint32_t data32 = (uint32_t)(pdata8[0] |
(pdata8[1] << 8) |
(pdata8[2] << 16) |
(pdata8[3] << 24));
ret = ftl_write(offset, data32);
FTL_ASSERT(result == 0);
if (ret)
{
break;
}
offset += 4;
size -= 4;
pdata8 += 4;
}
#if defined(SAVE_TO_STORAGE_RECONFIRM_EN) && (SAVE_TO_STORAGE_RECONFIRM_EN == 1)
if (ret == 0)
{
pdata8 = (uint8_t *)pdata_tmp;
offset = bak_offset;
size = bak_size;
while (size > 0)
{
uint32_t data32 = (uint32_t)(pdata8[0] |
(pdata8[1] << 8) |
(pdata8[2] << 16) |
(pdata8[3] << 24));
uint32_t read_data32, error;
error = ftl_read(offset, &read_data32);
FTL_ASSERT(error == 0);
FTL_ASSERT(read_data32 == data32);
if (error)
{
ret = FTL_WRITE_ERROR_READ_BACK;
break;
}
if (read_data32 != data32)
{
ret = FTL_WRITE_ERROR_VERIFY;
break;
}
offset += 4;
size -= 4;
pdata8 += 4;
}
}
#endif
return ret;
}
// return 0 success
// return !0 fail
uint32_t ftl_load_from_storage(void *pdata_tmp, uint16_t offset, uint16_t size)
{
if (g_pPage == NULL)
{
return FTL_READ_ERROR_NOT_INIT;
}
if ((offset & 0x3) || (size <= 0) || (size & 0x3))
{
return FTL_READ_ERROR_INVALID_PARAMETER;
}
uint8_t *pdata8 = (uint8_t *)pdata_tmp;
uint32_t ret = 0, data32;
while (size > 0)
{
ret = ftl_read(offset, &data32);
if (ret != 0)
{
break;
}
pdata8[0] = (data32 & 0xFF);
pdata8[1] = (data32 & 0xFF00) >> 8;
pdata8[2] = (data32 & 0xFF0000) >> 16;
pdata8[3] = (data32 & 0xFF000000) >> 24;
offset += 4;
size -= 4;
pdata8 += 4;
}
return ret;
}
uint32_t ftl_write(uint16_t logical_addr, uint32_t w_data)
{
uint32_t ret = FTL_WRITE_SUCCESS;
uint8_t sem_flag = FALSE;
if (0 != __get_IPSR())
{
FTL_PRINTF(FTL_LEVEL_WARN, "[ftl] FTL_write should not be called in interrupt handler!\n");
return FTL_WRITE_ERROR_IN_INTR;
}
if (NULL != ftl_sem)
{
if(xSemaphoreTakeRecursive(ftl_sem, portMAX_DELAY) == TRUE)
{
sem_flag = TRUE;
}
}
if (ftl_check_logical_addr(logical_addr))
{
FTL_ASSERT(0);
ret = FTL_WRITE_ERROR_INVALID_ADDR;
}
else
{
// todo, try to find old cell, check data is the same or not
// or use the same cell if all bits match non "0->1" patterns
uint8_t length = 1; // 1*4 bytes , todo
L_retry:
if ((g_free_cell_index + length) < PAGE_element)
{
FTL_ASSERT(WRITABLE_32BIT == ftl_page_read(g_pPage + g_cur_pageID, g_free_cell_index));
FTL_ASSERT(WRITABLE_32BIT == ftl_page_read(g_pPage + g_cur_pageID,
g_free_cell_index + length));
uint32_t key = ftl_key_init(logical_addr, length);
//ftl_page_write(g_pPage + g_cur_pageID, g_free_cell_index + 1, key);
ftl_page_write(g_pPage + g_cur_pageID, g_free_cell_index, w_data);
flash_set_bit(&key, BIT_VALID);
ftl_page_write(g_pPage + g_cur_pageID, g_free_cell_index + 1, key);
if (FTL_USE_MAPPING_TABLE == 1) //mapping table otp
{
write_mapping_table(logical_addr, g_cur_pageID, g_free_cell_index);
}
g_free_cell_index += (length + 1);
ret = FTL_WRITE_SUCCESS;
}
else
{
// try to find out free cell
uint16_t tmp;
if (ftl_get_page_end_position(g_pPage + g_cur_pageID, &tmp))
{
// invalid end pos
// so set end pos
ftl_set_page_end_position(g_pPage + g_cur_pageID, g_free_cell_index - 1);
}
// find invalid(free) page
uint8_t new_cur_pageID = g_cur_pageID + 1;
new_cur_pageID %= g_PAGE_num;
if (ftl_page_is_valid(g_pPage + new_cur_pageID))
{
//DPRINTF("ftl_write: before format\n");
//ftl_ioctl( FTL_IOCTL_DEBUG, 0, 0);
// invalid page and format it
uint8_t new_sequence = ftl_get_page_seq(g_pPage + g_cur_pageID) + 1;
if (!ftl_page_format(g_pPage + new_cur_pageID, new_sequence))
{
return FTL_WRITE_ERROR_ERASE_FAIL;
}
// updata current page info
g_cur_pageID = new_cur_pageID;
g_free_cell_index = INFO_size;
if (!g_doingGarbageCollection)
{
if (FTL_ONLY_GC_IN_IDLE == 1)
{
ret = FTL_WRITE_ERROR_NEED_GC;
}
else
{
ftl_page_garbage_collect(0, PAGE_element / 2);
}
}
goto L_retry;
}
else
{
// out of space
FTL_ASSERT(0);
ret = FTL_WRITE_ERROR_OUT_OF_SPACE;
}
}
}
if (sem_flag)
{
xSemaphoreGiveRecursive(ftl_sem);
}
FTL_PRINTF(FTL_LEVEL_WARN, "[ftl] w 0x%08x: 0x%08x (%d)\r\n", logical_addr, w_data, ret);
return ret;
}
uint32_t ftl_ioctl(uint32_t cmd, uint32_t p1, uint32_t p2)
{
if (g_pPage == NULL)
{
return FTL_READ_ERROR_NOT_INIT;
}
uint32_t result = __LINE__;
switch (cmd)
{
case FTL_IOCTL_DEBUG:
{
uint8_t free_page = ftl_get_free_page_count();
FTL_PRINTF(FTL_LEVEL_INFO, "[ftl] PAGEnum: %d, PAGEelement: %d, PageFree: %d CurPage: %d, FreeCell_idx: %d\n",
g_PAGE_num, PAGE_element, free_page, g_cur_pageID, g_free_cell_index);
FTL_PRINTF(FTL_LEVEL_INFO, "[FTL] PAGE HEAD(%x, %x, %x, %x), PAGE TAIL(%x, %x, %x, %x)",
ftl_page_read(g_pPage, INFO_beg_index), ftl_page_read(g_pPage + 1, INFO_beg_index),
ftl_page_read(g_pPage + 2, INFO_beg_index), ftl_page_read(g_pPage + 3, INFO_beg_index),
ftl_page_read(g_pPage, INFO_end_index), ftl_page_read(g_pPage + 1, INFO_end_index),
ftl_page_read(g_pPage + 2, INFO_end_index), ftl_page_read(g_pPage + 3, INFO_end_index));
#if defined(MONITOR_STATUS_INFO) && (MONITOR_STATUS_INFO == 1)
{
uint32_t i;
for (i = 0; i < MONITOR_STATUS_INFO_TABLE_SIZE; ++i)
{
LOG_PRINT_INFO_2(" EraseCnt[%02d]: %d \n", i, g_EraseCnt[i]);
}
}
LOG_PRINT_INFO_1(" doGarbageCollectionCnt: %d\n", g_GarbageCnt);
LOG_PRINT_INFO_1(" RecycleCnt: %d\n", g_RecycleCnt);
LOG_PRINT_INFO_1(" WriteCnt: %d\n", g_WriteCnt);
#endif
result = 0;
}
break;
case FTL_IOCTL_CLEAR_ALL:
{
uint32_t i;
for (i = 0; i < g_PAGE_num; ++i)
{
ftl_page_write(g_pPage + i, INFO_beg_index, 0x0);
}
//clear ftl_mapping_table
memset(ftl_mapping_table, 0, MAPPING_TABLE_SIZE);
// updata current page info
g_cur_pageID = 0;
g_free_cell_index = INFO_size;
//fix after FTL_IOCTL_CLEAR_ALL may not do gc bug
g_free_page_count = ftl_get_free_page_count();
result = ftl_page_format(g_pPage + g_cur_pageID, 0) ? 0 : 1;
#if defined(MONITOR_STATUS_INFO) && (MONITOR_STATUS_INFO == 1)
{
uint32_t i;
for (i = 0; i < MONITOR_STATUS_INFO_TABLE_SIZE; ++i)
{
g_EraseCnt[i] = 0;
}
g_GarbageCnt = 0;
g_RecycleCnt = 0;
g_WriteCnt = 0;
}
#endif
}
break;
case FTL_IOCTL_ERASE_INVALID_PAGE:
{
uint8_t free_page = ftl_get_free_page_count();
uint8_t idx = 1, i;
FTL_PRINTF(FTL_LEVEL_INFO, "FTL_IOCTL_ERASE_INVALID_PAGE free_page:%x", free_page);
if (free_page == 0)
{
return __LINE__;
}
for (; idx <= free_page; idx++)
{
i = (g_cur_pageID + idx) % g_PAGE_num;
if (ftl_page_is_valid(g_pPage + i) != 0)
{
result = ftl_page_erase(g_pPage + i) ? 0 : 1;
}
}
}
break;
case FTL_IOCTL_ENABLE_GC_IN_IDLE:
{
do_gc_in_idle = TRUE;
idle_gc_page_thres = p1;
idle_gc_cell_thres = p2;
result = 0;
}
break;
case FTL_IOCTL_DISABLE_GC_IN_IDLE:
{
do_gc_in_idle = FALSE;
result = 0;
}
break;
case FTL_IOCTL_DO_GC_IN_APP:
{
ftl_page_garbage_collect(p1, p2);
result = 0;
}
break;
default:
break;
}
return result;
}
#if 0
uint32_t ftl_load(void *pdata, uint16_t offset, uint16_t size)
{
return ftl_load_from_storage(pdata, offset + FTL_APP_LOGICAL_ADDR_BASE * 1024,
size);
}
uint32_t ftl_save(void *pdata, uint16_t offset, uint16_t size)
{
return ftl_save_to_storage(pdata, offset + FTL_APP_LOGICAL_ADDR_BASE * 1024, size);
}
#endif
uint32_t ftl_init(uint32_t u32PageStartAddr, uint8_t pagenum)
{
if (pagenum < 3)
{
pagenum = 3;
}
g_PAGE_num = pagenum;
if (ftl_sem == NULL)
{
ftl_sem = xSemaphoreCreateRecursiveMutex();
}
g_pPage = (struct Page_T *)(u32PageStartAddr);
// find latest valid page by sequence num
uint8_t cur_valid = 0;
uint8_t cur_sequence = 0;
uint8_t cur_pageID = 0;
uint8_t need_to_update = 0;
uint32_t i;
for (i = 0; i < g_PAGE_num; ++i)
{
if (0 == ftl_page_is_valid(g_pPage + i))
{
if (cur_valid)
{
uint8_t tmp_sequence = ftl_get_page_seq(g_pPage + i);
if (tmp_sequence > cur_sequence) // newer
{
if (tmp_sequence == (cur_sequence + 1))
{
need_to_update = 1;
}
else
{
//DPRINTF("tmp_sequence,cur_sequence: %d,%d\n", tmp_sequence, cur_sequence );
}
}
else if (tmp_sequence == 0 && cur_sequence == 0xff) // wrap
{
need_to_update = 1;
}
else
{
// old
}
}
else
{
need_to_update = 1;
}
}
if (need_to_update)
{
need_to_update = 0;
cur_valid = 1;
cur_pageID = i;
cur_sequence = ftl_get_page_seq(g_pPage + i);
}
}
if (!cur_valid)
{
// not any valid, first time to init
cur_pageID = 0;
cur_sequence = 0;
if (!ftl_page_format(g_pPage + cur_pageID, cur_sequence))
{
g_pPage = NULL;
FTL_PRINTF(FTL_LEVEL_ERROR, "ftl init fail");
return FTL_INIT_ERROR_ERASE_FAIL;
}
}
// find free CELL from bottom
uint16_t free_cell_index = INFO_size;
for (i = PAGE_element - 1 ; i >= INFO_size ; --i)
{
if (WRITABLE_32BIT != ftl_page_read(g_pPage + cur_pageID, i))
{
free_cell_index = i + 1;
break;
}
}
#if defined(WIN32) && (WIN32 == 1)
#if defined(EXTRA_DEBUG) && (EXTRA_DEBUG == 1)
uint8_t bak_g_cur_pageID = g_cur_pageID;
uint16_t bak_g_free_cell_index = g_free_cell_index;
#endif
#endif
g_cur_pageID = cur_pageID;
g_free_cell_index = free_cell_index;
#if defined(WIN32) && (WIN32 == 1)
#if defined(EXTRA_DEBUG) && (EXTRA_DEBUG == 1)
//if(1==rand()%100)
//{
// // raven.test fail
// bak_g_cur_pageID = 7;
//}
if (g_cur_pageID != bak_g_cur_pageID)
{
DPRINTF("\n\n[debug]\n");
ftl_ioctl(FTL_IOCTL_DEBUG, 1, 0);
DPRINTF("old_g_cur_pageID: %d, ", bak_g_cur_pageID);
DPRINTF("old_g_free_cell_index: %d\n", bak_g_free_cell_index);
}
FTL_ASSERT(g_cur_pageID == bak_g_cur_pageID);
if (bak_g_free_cell_index == 0)
{
bak_g_free_cell_index = 2;
}
FTL_ASSERT(g_free_cell_index == bak_g_free_cell_index);
#endif
#endif
ftl_ioctl(FTL_IOCTL_DEBUG, 0, 0);
if (FTL_USE_MAPPING_TABLE == 1) //mapping table
{
ftl_mapping_table_init();
}
ftl_recover_from_power_lost();
g_free_page_count = ftl_get_free_page_count();
return 0;
}
void ftl_mapping_table_init(void)
{
if (NULL == ftl_mapping_table)
{
//ftl_mapping_table = os_mem_zalloc((RAM_TYPE)ftl_config.ftl_mapping_table_ram_type,
// MAPPING_TABLE_SIZE);//table is initialised as 0
ftl_mapping_table = rtw_zmalloc(MAPPING_TABLE_SIZE);
}
uint8_t pageID = g_cur_pageID;
int32_t key_index = g_free_cell_index - 1;
L_retry:
// todo, length is 1
//PRINTF("pageID,key_index: %d, %d \r\n", pageID, key_index);
for (; key_index >= 3; key_index -= 2)
{
uint32_t key = ftl_page_read(g_pPage + pageID, key_index);
uint32_t length = ftl_key_get_length(key);
if (length == 0)
{
continue;
}
//PLATFORM_ASSERT( length == 1);
if (length == 1)
{
uint16_t addr = key & 0xffff;
if (!read_mapping_table(addr))
{
write_mapping_table(addr, pageID, key_index - 1);
}
}
else
{
FTL_PRINTF(FTL_LEVEL_ERROR, "[ftl] length != 1! func: %s, line: %d", __FUNCTION__, __LINE__);
}
}
uint8_t prePageID;
if (0 == ftl_get_prev_page(pageID, &prePageID))
{
uint16_t EndPos;
if (0 == ftl_get_page_end_position(g_pPage + prePageID, &EndPos))
{
key_index = EndPos;
pageID = prePageID;
goto L_retry;
}
else
{
//TODO;
// todo, error recovery
key_index = PAGE_element - 1;
pageID = prePageID;
goto L_retry;
}
}
}
#if 0//WIN32
uint32_t FMC_Erase_Page(uint32_t u32PageAddr)
{
struct Page_T *p = (struct Page_T *) u32PageAddr;
uint32_t i;
for (i = 0; i < (PAGE_element); ++i)
{
p->Data[i] = WRITABLE_32BIT;
}
return 0;
}
uint32_t FMC_Read(uint32_t u32Addr)
{
uint32_t *pData = (uint32_t *) u32Addr;
return *pData;
}
uint32_t FMC_Write(uint32_t u32Addr, uint32_t u32Data)
{
uint32_t *pData = (uint32_t *) u32Addr;
// check
uint32_t i;
for (i = 0; i < 32; ++i)
{
uint8_t bit_from = ((*pData) & (0x1 << i)) ? 1 : 0;
uint8_t bit_to = (u32Data & (0x1 << i)) ? 1 : 0;
if (bit_from == 0 && bit_to == 1)
{
BUG;
}
}
*pData = u32Data;
ASSERT(u32Data == FMC_Read(u32Addr));
return FMC_SUCCESS;
}
#endif // WIN32
#else // CONFIG_EFLASH_BOARD_EXIST
#if 0
// from kevin's reply
FPGA mode support Data SRAM range 0x2000_0000 - 0x2003_FFFF(64k)
real SRAM range is 0x2001_0000 - 0x2001_0000(64KB)
test SRAM range is 0x2001_0000 - 0x2003_FFFF(192KB)
// raven.todo
/* tmp for fake flash in ram section */
FAKE_FLASH_MAIN(rwx) : ORIGIN = 0x20010000, LENGTH = 256K
FAKE_FLASH_INFO(rwx) : ORIGIN = 0x20050000, LENGTH = 2K
FAKE_FLASH_REDU(rwx) : ORIGIN = 0x20050800, LENGTH = 2K
FAKE_FLASH_TRIM(rwx) : ORIGIN = 0x20051000, LENGTH = 2K
#endif
#define FAKE_PAGE_num (5)
#define PAGE_element_data ( (FMC_PAGE_SIZE/8)-1) // 255
#define MAX_logical_u32_count ((PAGE_element_data*(FAKE_PAGE_num-1))-1)
#define MAX_logical_address_size (MAX_logical_u32_count<<2)
#define Fake_FTL_BASE (0x20010000)
typedef struct
{
uint32_t m_table[MAX_logical_u32_count];
} Fake_FTL_T;
#define Fake_FTL ((Fake_FTL_T *) Fake_FTL_BASE) // Pointer to FMC register structure
// logical_addr is 4 bytes alignment addr
uint32_t ftl_check_logical_addr(uint16_t logical_addr)
{
if (logical_addr & 0x3)
{
while (1);
}
if (logical_addr >= MAX_logical_address_size)
{
DPRINTF("logical_addr >= MAX_logical_address_size \n");
while (1);
}
return 0;
}
uint32_t ftl_init(uint8_t pagenum)
{
pagenum = FAKE_PAGE_num;
DPRINTF("[Fake_FTL in RAM] init(%d) \n", pagenum);
UNUSED(g_pPage);
UNUSED(g_last_error_code);
UNUSED(g_free_cell_index);
UNUSED(g_cur_pageID);
UNUSED(g_doingGarbageCollection);
UNUSED(g_PAGE_num);
#if 0
uint32_t i;
for (i = 0; i < (MAX_logical_u32_count); ++i)
{
Fake_FTL->m_table[i] = 0xdeadbeef;
}
for (i = 0; i < (MAX_logical_u32_count); ++i)
{
if (Fake_FTL->m_table[i] != 0xdeadbeef)
{
DPRINTF("%d\n", i);
BUG;
while (1);
}
}
#endif
return FMC_SUCCESS;
}
// logical_addr is 4 bytes alignment addr
uint32_t ftl_read(uint16_t logical_addr)
{
ftl_check_logical_addr(logical_addr);
logical_addr >>= 2;
uint32_t r_data = Fake_FTL->m_table[logical_addr];
ASIC_DPRINTF("[ftl] r 0x%08x: 0x%08x \r\n", logical_addr << 2, r_data);
return r_data;
}
uint32_t ftl_write(uint16_t logical_addr, uint32_t w_data)
{
ftl_check_logical_addr(logical_addr);
logical_addr >>= 2;
Fake_FTL->m_table[logical_addr] = w_data;
ASIC_DPRINTF("[ftl] w 0x%08x: 0x%08x \r\n", logical_addr << 2, w_data);
return FMC_SUCCESS;
}
uint32_t ftl_get_error()
{
return FMC_SUCCESS;
}
uint32_t ftl_ioctl(uint32_t cmd, uint32_t p1, uint32_t p2)
{
return FMC_SUCCESS;
}
#endif // !CONFIG_EFLASH_BOARD_EXIST
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/file_system/ftl/ftl.c
|
C
|
apache-2.0
| 43,691
|
/**
****************************************************************************************************
* Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
****************************************************************************************************
* @file ftl.h
* @brief flash transport layer is used as abstraction layer for user application to save read/write
* parameters in flash.
* @note ftl is dedicate block in flash, only used for save read/write value, and offset here is
* logical offset which is defined for whole ftl section.If value is only for one time read,
* refer to fs_load_app_data_8 or other APIs in flash_device.h
* @author Brenda_li
* @date 2016-12-27
* @version v1.0
* **************************************************************************************************
*/
#ifndef _FTL_H_
#define _FTL_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif // __cplusplus
/** @defgroup FTL Flash Transport Layer
* @brief simple implementation of file system for flash
* @{
*/
/** @defgroup FTL_Exported_Macros FTL Exported Macros
* @brief
* @{
*/
#define FTL_WRITE_SUCCESS (0x00)
#define FTL_WRITE_ERROR_IN_INTR (0x01)
#define FTL_WRITE_ERROR_INVALID_ADDR (0x02)
#define FTL_WRITE_ERROR_OUT_OF_SPACE (0x03)
#define FTL_WRITE_ERROR_READ_BACK (0x04)
#define FTL_WRITE_ERROR_VERIFY (0x05)
#define FTL_WRITE_ERROR_INVALID_PARAMETER (0x06)
#define FTL_WRITE_ERROR_ERASE_FAIL (0x07)
#define FTL_WRITE_ERROR_NOT_INIT (0x08)
#define FTL_WRITE_ERROR_NEED_GC (0x09)
#define FTL_READ_SUCCESS (0x00)
#define FTL_READ_ERROR_INVALID_LOGICAL_ADDR (0x01)
#define FTL_READ_ERROR_READ_NOT_FOUND (0x02)
#define FTL_READ_ERROR_PARSE_ERROR (0x03)
#define FTL_READ_ERROR_INVALID_PARAMETER (0x04)
#define FTL_READ_ERROR_NOT_INIT (0x05)
#define FTL_INIT_ERROR_ERASE_FAIL (0x01)
/** End of FTL_Exported_Macros
* @}
*/
typedef enum {
FTL_LEVEL_ERROR = 0, /**< Error */
FTL_LEVEL_WARN = 1, /**< Warning */
FTL_LEVEL_INFO = 2, /**< Information */
FTL_LEVEL_TRACE = 3, /**< Trace Data */
FTL_LEVEL_NUMs = 4 /**< Level Number */
} FTL_LEVEL_DEFINE;
/*============================================================================*
* Types
*============================================================================*/
/** @defgroup FTL_Exported_Types Flash Transport Layer Exported Types
* @brief
* @{
*/
typedef enum
{
FTL_IOCTL_DEBUG = 0, /**< IO code for ftl debug */
FTL_IOCTL_CLEAR_ALL = 2, /**< IO code for clear ftl section*/
FTL_IOCTL_ERASE_INVALID_PAGE = 3, /**< IO code to erase invalid page*/
FTL_IOCTL_ENABLE_GC_IN_IDLE = 4, /**< IO code to enable garbage collection in idle task*/
FTL_IOCTL_DISABLE_GC_IN_IDLE = 5, /**< IO code to disable garbage collection in idle task*/
FTL_IOCTL_DO_GC_IN_APP = 6, /**< IO code to do garbage collection in app*/
} T_FTL_IOCTL_CODE;
/** End of FTL_Exported_Types
* @}
*/
/*============================================================================*
* Functions
*============================================================================*/
/** @defgroup FTL_Exported_Functions Flash Transport Layer Exported Functions
* @brief
* @{
*/
/**
* @brief Save specified value to specified ftl offset
* @param pdata specify data buffer
* @param offset specify FTL offset to store
* @arg Min: 0
* @arg Max: 2044
* @param size size to store
* @arg Min: 4
* @arg Max: 2048
* @return status
* @retval 0 status successful
* @retval otherwise fail
* @note FTL offset is pre-defined and no conflict
*/
//uint32_t ftl_save(void *pdata, uint16_t offset, uint16_t size);
/**
* @brief Load specified ftl offset parameter to specified buffer
* @param pdata specify data buffer
* @param offset specify FTL offset to load
* @arg Min: 0
* @arg Max: 2044
* @param size size to load
* @arg Min: 4
* @arg Max: 2048
* @return status
* @retval 0 status successful
* @retval otherwise fail
* @note FTL offset is pre-defined and no conflict
*/
//uint32_t ftl_load(void *pdata, uint16_t offset, uint16_t size);
/**
* @brief Control function entry for ftl
* @param cmd command code for different operation
* @param p1 command parameter @ref FTL_IO_CTL_CODE
* @param p2 extended command parameters
* @return results of control
* @retval 0 status successful
* @retval otherwise fail
*/
uint32_t ftl_ioctl(uint32_t cmd, uint32_t p1, uint32_t p2);
/** @} */ /* End of group FTL_Exported_Functions */
static inline void flash_set_bit(uint32_t *addr, uint32_t bit)
{
(*addr) &= ~bit;
}
static inline bool flash_get_bit(uint32_t flag, uint32_t bit)
{
return (flag & bit) ? FALSE : TRUE;
}
/** @} */ /* End of group FTL */
#ifdef __cplusplus
}
#endif // __cplusplus
#endif // _FTL_H_
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/file_system/ftl/ftl.h
|
C
|
apache-2.0
| 5,283
|
/**
*****************************************************************************************
* Copyright(c) 2017, Realtek Semiconductor Corporation. All rights reserved.
*****************************************************************************************
* @file ftl_rom.h
* @brief ftl header file for rom project
* @details
* @author
* @date
* @version
**************************************************************************************
* @attention
* <h2><center>© COPYRIGHT 2017 Realtek Semiconductor Corporation</center></h2>
* *************************************************************************************
*/
/*============================================================================*
* Define to prevent recursive inclusion
*============================================================================*/
#ifndef _FTL_ROM_H_
#define _FTL_ROM_H_
/*============================================================================*
* Header Files
*============================================================================*/
#include "ftl.h"
#ifdef __cplusplus
extern "C" {
#endif
#define FTL_SUCCESS (0x00)
#define FTL_ERROR_INVALID_LOGICAL_ADDR 0xF0
#define FTL_ERROR_OUT_OF_SPACE (0xF1)
#define FTL_ERROR_PAGE_FORMAT (0xF2)
#define FTL_ERROR_PAGE_END_FORMAT (0xF3)
/*============================================================================*
* Types
*============================================================================*/
/*============================================================================*
* Functions
*============================================================================*/
uint32_t ftl_init(uint32_t u32PageStartAddr, uint8_t pagenum);
/**
* @brief Save specified value to specified ftl offset
* @param pdata specify data buffer
* @param offset specify FTL offset to store
* @param size size to store
* @return status
* @retval 0 status successful
* @retval otherwise fail
* @note FTL offset is pre-defined and no confict with ROM
*/
uint32_t ftl_save_to_storage(void *pdata, uint16_t offset, uint16_t size);
/**
* @brief Load specified ftl offset parameter to specified buffer
* @param pdata specify data buffer
* @param offset specify FTL offset to load
* @param size size to load
* @return status
* @retval 0 status successful
* @retval otherwise fail
* @note FTL offset is pre-defined and no confict with ROM
*/
uint32_t ftl_load_from_storage(void *pdata, uint16_t offset, uint16_t size);
void ftl_garbage_collect_in_idle(void);
#ifdef __cplusplus
}
#endif
#endif // _FTL_ROM_H_
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/file_system/ftl/ftl_int.h
|
C
|
apache-2.0
| 2,884
|
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_ERROR_H
#define MBED_ERROR_H
/** To generate a fatal compile-time error, you can use the pre-processor #error directive.
*
* @code
* #error "That shouldn't have happened!"
* @endcode
*
* If the compiler evaluates this line, it will report the error and stop the compile.
*
* For example, you could use this to check some user-defined compile-time variables:
*
* @code
* #define NUM_PORTS 7
* #if (NUM_PORTS > 4)
* #error "NUM_PORTS must be less than 4"
* #endif
* @endcode
*
* Reporting Run-Time Errors:
* To generate a fatal run-time error, you can use the mbed error() function.
*
* @code
* error("That shouldn't have happened!");
* @endcode
*
* If the mbed running the program executes this function, it will print the
* message via the USB serial port, and then die with the blue lights of death!
*
* The message can use printf-style formatting, so you can report variables in the
* message too. For example, you could use this to check a run-time condition:
*
* @code
* if(x >= 5) {
* error("expected x to be less than 5, but got %d", x);
* }
* #endcode
*/
#ifdef __cplusplus
extern "C" {
#endif
void error(const char* format, ...);
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/api/error.h
|
C
|
apache-2.0
| 1,867
|
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_ASSERT_H
#define MBED_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/** Internal mbed assert function which is invoked when MBED_ASSERT macro failes.
* This function is active only if NDEBUG is not defined prior to including this
* assert header file.
* In case of MBED_ASSERT failing condition, the assertation message is printed
* to stderr and mbed_die() is called.
* @param expr Expresion to be checked.
* @param file File where assertation failed.
* @param line Failing assertation line number.
*/
void mbed_assert_internal(const char *expr, const char *file, int line);
#ifdef __cplusplus
}
#endif
#ifdef NDEBUG
#define MBED_ASSERT(expr) ((void)0)
#else
#define MBED_ASSERT(expr) \
do { \
if (!(expr)) { \
mbed_assert_internal(#expr, __FILE__, __LINE__); \
} \
} while (0)
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/api/mbed_assert.h
|
C
|
apache-2.0
| 1,650
|
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <time.h>
#ifdef __cplusplus
extern "C" {
#endif
/** Implementation of the C time.h functions
*
* Provides mechanisms to set and read the current time, based
* on the microcontroller Real-Time Clock (RTC), plus some
* standard C manipulation and formating functions.
*
* Example:
* @code
* #include "mbed.h"
*
* int main() {
* set_time(1256729737); // Set RTC time to Wed, 28 Oct 2009 11:35:37
*
* while(1) {
* time_t seconds = time(NULL);
*
* printf("Time as seconds since January 1, 1970 = %d\n", seconds);
*
* printf("Time as a basic string = %s", ctime(&seconds));
*
* char buffer[32];
* strftime(buffer, 32, "%I:%M %p\n", localtime(&seconds));
* printf("Time as a custom formatted string = %s", buffer);
*
* wait(1);
* }
* }
* @endcode
*/
/** Set the current time
*
* Initialises and sets the time of the microcontroller Real-Time Clock (RTC)
* to the time represented by the number of seconds since January 1, 1970
* (the UNIX timestamp).
*
* @param t Number of seconds since January 1, 1970 (the UNIX timestamp)
*
* Example:
* @code
* #include "mbed.h"
*
* int main() {
* set_time(1256729737); // Set time to Wed, 28 Oct 2009 11:35:37
* }
* @endcode
*/
void set_time(time_t t);
#ifdef __cplusplus
}
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/api/rtc_time.h
|
C
|
apache-2.0
| 1,976
|
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_WAIT_API_H
#define MBED_WAIT_API_H
#ifdef __cplusplus
extern "C" {
#endif
/** Generic wait functions.
*
* These provide simple NOP type wait capabilities.
*
* Example:
* @code
* #include "mbed.h"
*
* DigitalOut heartbeat(LED1);
*
* int main() {
* while (1) {
* heartbeat = 1;
* wait(0.5);
* heartbeat = 0;
* wait(0.5);
* }
* }
*/
/** Waits for a number of seconds, with microsecond resolution (within
* the accuracy of single precision floating point).
*
* @param s number of seconds to wait
*/
void wait(float s);
/** Waits a number of milliseconds.
*
* @param ms the whole number of milliseconds to wait
*/
void wait_ms(int ms);
/** Waits a number of microseconds.
*
* @param us the whole number of microseconds to wait
*/
void wait_us(int us);
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/api/wait_api.h
|
C
|
apache-2.0
| 1,507
|
/** mbed Microcontroller Library
******************************************************************************
* @file analogin_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed Analog_in API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_ANALOGIN_API_H
#define MBED_ANALOGIN_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup analog_in ANALOG_IN
* @ingroup hal
* @brief analog_in functions
* @{
*/
///@name Ameba Common
///@{
typedef struct analogin_s analogin_t;
/**
* @brief Initializes the ADC device, include clock/function/ADC registers.
* @param obj: adc object define in application software.
* @param pin: adc PinName according to pinmux spec.
* @retval none
*/
void analogin_init(analogin_t *obj, PinName pin);
/**
* @brief Deinitializes the ADC device, include clock/function/ADC registers.
* @param obj: adc object define in application software.
* @retval none
*/
void analogin_deinit(analogin_t *obj);
/**
* @brief Reads data from the specified adc channel fifo.
* @param obj: adc object define in application software.
* @retval : adc channel data(float)
*/
float analogin_read(analogin_t *obj);
/**
* @brief Reads data from the specified adc channel fifo.
* @param obj: adc object define in application software.
* @retval : 16bit adc channel data(int)
*/
uint16_t analogin_read_u16(analogin_t *obj);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif//MBED_ANALOGIN_API_H
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/analogin_api.h
|
C
|
apache-2.0
| 2,197
|
/** mbed Microcontroller Library
******************************************************************************
* @file analogout_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed Analog_out API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_ANALOGOUT_API_H
#define MBED_ANALOGOUT_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup analog_out ANALOG_OUT
* @ingroup hal
* @brief analog_out functions
* @{
*/
#if defined(CONFIG_PLATFORM_8195A) && (CONFIG_PLATFORM_8195A == 1)
///@name Ameba1 Only
///@{
typedef struct dac_s dac_t;
/**
* @brief Initialize DAC
* @param obj: dac object define in application software.
* @param pin: dac PinName according to pinmux spec.
* @retval none
*/
void analogout_init(dac_t *obj, PinName pin);
/**
* @brief Free DAC
* @param obj: dac object define in application software.
* @retval none
*/
void analogout_free(dac_t *obj);
/**
* @brief Execute analog output
* @para obj: dac object define in application software.
* @para value: analog ratio value, should be transfered to register value.
* @retval none
* @note This function is mainly to execute analog output and the value is a ratio.
* The upper/lower bound of DAC register input value is defined by
* DAC_XXXXX_FULL_SCALE. The parameter "value" of this function should be
* transfered to register value.
*/
void analogout_write(dac_t *obj, float value);
/**
* @brief Execute analog output 16bit
* @para obj: dac object define in application software.
* @para value: analog ratio value, should be transfered to register value.
* @retval none
* @note The register value of DAC input is a format of 2's complement.
* The most maximum value of positive value drives DAC to output a voltage about 3.3V.
* The most mimimum value of negative value drives DAC to output a voltage about 0.
* And the middle value of 0x000 will drive DAC to output a voltage of half of max voltage.
*/
void analogout_write_u16(dac_t *obj, uint16_t value);
///@}
#endif //CONFIG_PLATFORM_8195A
/**@}*/
#ifdef __cplusplus
}
#endif
#endif//MBED_ANALOGOUT_API_H
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/analogout_api.h
|
C
|
apache-2.0
| 2,873
|
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_CAN_API_H
#define MBED_CAN_API_H
#include "device.h"
#if DEVICE_CAN
#include "PinNames.h"
#include "PeripheralNames.h"
#include "can_helper.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
IRQ_RX,
IRQ_TX,
IRQ_ERROR,
IRQ_OVERRUN,
IRQ_WAKEUP,
IRQ_PASSIVE,
IRQ_ARB,
IRQ_BUS,
IRQ_READY
} CanIrqType;
typedef enum {
MODE_RESET,
MODE_NORMAL,
MODE_SILENT,
MODE_TEST_GLOBAL,
MODE_TEST_LOCAL,
MODE_TEST_SILENT
} CanMode;
typedef void (*can_irq_handler)(uint32_t id, CanIrqType type);
typedef struct can_s can_t;
void can_init (can_t *obj, PinName rd, PinName td);
void can_free (can_t *obj);
int can_frequency(can_t *obj, int hz);
void can_irq_init (can_t *obj, can_irq_handler handler, uint32_t id);
void can_irq_free (can_t *obj);
void can_irq_set (can_t *obj, CanIrqType irq, uint32_t enable);
int can_write (can_t *obj, CAN_Message, int cc);
int can_read (can_t *obj, CAN_Message *msg, int handle);
int can_mode (can_t *obj, CanMode mode);
int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle);
void can_reset (can_t *obj);
unsigned char can_rderror (can_t *obj);
unsigned char can_tderror (can_t *obj);
void can_monitor (can_t *obj, int silent);
#ifdef __cplusplus
};
#endif
#endif // MBED_CAN_API_H
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/can_api.h
|
C
|
apache-2.0
| 2,109
|
/** mbed Microcontroller Library
******************************************************************************
* @file timer_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed I2C API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#include "device.h"
#ifndef __RTK_DCT_H__
#define __RTK_DCT_H__
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup dct DCT
* @ingroup hal
* @brief dct functions
* @{
*/
///@name Ameba Common
///@{
enum{
DCT_SUCCESS = 0,
DCT_ERR = -1,
DCT_ERR_CRC = -2,
DCT_ERR_NO_SPACE = -3,
DCT_ERR_NO_MEMORY = -4,
DCT_ERR_FLASH_RW = -5,
DCT_ERR_NOT_FIND = -6,
DCT_ERR_INVALID = -7,
DCT_ERR_SIZE_OVER = -8,
DCT_ERR_MODULE_BUSY = -9,
};
enum{
DCT_MODULE_STATE_INIT = 0xFFFFFFFF,
DCT_MODULE_STATE_VALID = 0xFFFFFFFE,
DCT_MODULE_STATE_DELETING = 0xFFFFFFFC,
DCT_MODULE_STATE_DELETED = 0xFFFFFFF8,
};
/**
* @brief Initialize device configuration table.
* @param none
* @retval 32 bit
*/
int32_t dct_init(void);
/**
* @brief Deinitialize device configuration table.
* @retval none
*/
void dct_deinit(void);
/**
* @brief Register module in DCT.
* @param module_name : module name
* @retval 0 : SUCCESS
* @retval <0 : ERROR
*/
int32_t dct_register_module(char *module_name);
/**
* @brief Unregister and delete module in DCT.
* @param module_name : module name
* @retval 0 : SUCCESS
* @retval <0 : ERROR
*/
int32_t dct_unregister_module(char *module_name);
/**
* @brief Open module in DCT.
* @param dct_handle : setup module informations in dct handler
* @param module_name : module name
* @retval 0 : SUCCESS
* @retval <0 : ERROR
*/
int32_t dct_open_module(dct_handle_t *dct_handle, char *module_name);
/**
* @brief Close module in DCT.
* @param dct_handle : dct handler
* @retval 0 : SUCCESS
* @retval <0 : ERROR
*/
int32_t dct_close_module(dct_handle_t *dct_handle);
/**
* @brief Write variable name and value in opened module.
* @param dct_handle : dct handler
* @param variable_name : variable name which you want to store in module
* @param variable_value : variable value which you want to store in module
* @retval 0 : SUCCESS
* @retval <0 : ERROR
*/
int32_t dct_set_variable(dct_handle_t *dct_handle, char *variable_name, char *variable_value);
/**
* @brief Read value of variable name in opened module.
* @param dct_handle : dct handler
* @param variable_name : variable name which you want to get from module
* @param buffer : read variable value
* @param buffer_size : the buffer size
* @retval 0 : SUCCESS
* @retval <0 : ERROR
*/
int32_t dct_get_variable(dct_handle_t *dct_handle, char *variable_name, char *buffer, uint16_t buffer_size);
/**
* @brief Delete variable name and value in opened module.
* @param dct_handle : dct handler
* @param variable_name : variable name which you want to delete in module
* @retval 0 : SUCCESS
* @retval <0 : ERROR
*/
int32_t dct_delete_variable(dct_handle_t *dct_handle, char *variable_name);
#ifdef __cplusplus
}
#endif
#endif/* MBED_TIMER_API_H */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/dct_api.h
|
C
|
apache-2.0
| 4,018
|
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_ETHERNET_API_H
#define MBED_ETHERNET_API_H
#include "device.h"
#if DEVICE_ETHERNET
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup ethernet ETHERNET
* @ingroup hal
* @brief ETHERNET functions
* @{
*/
/**
* @brief To initialize the Ethernet MAC controller.
*
* @param None
*
* @returns The result.
*/
int ethernet_init(void);
/**
* @brief To de-initialize the Ethernet MAC controller.
*
* @param None
*
* @returns void.
*/
void ethernet_free(void);
/**
* @brief To write "size" bytes of data from "data" to the Tx packet buffer.
*
* @param[in] data The buffer of packet data.
* @param[in] size The size of the packet data.
*
* @returns The number of bytes written, or (-1) if errors.
*/
int ethernet_write(const char *data, int size);
/**
* @brief To send the packet from Tx packet buffer.
*
* @param None
*
* @returns The packet size.
*/
int ethernet_send(void);
/**
* @brief To receive a packet into the Rx packet buffer.
*
* @param None
*
* @returns The packet size, or 0 if no packet received.
*/
int ethernet_receive(void);
/**
* @brief To read packet data from Rx packet buffer to the "data" buffer.
*
* @param[in] data A buffer for the packet data.
* @param[in] size The specified length (in bytes) to be read.
*
* @returns The actual size (in bytes) of data read.
*/
int ethernet_read(char *data, int size);
/**
* @brief To get the ethernet MAC address.
*
* @param[in] mac The buffer of MAC address.
*
* @returns void.
*/
void ethernet_address(char *mac);
/**
* @brief To get the link status.
*
* @param None
*
* @returns 1 for link up, 0 for link down.
*/
int ethernet_link(void);
/**
* @brief To set the link speed and duplex mode.
*
* @param[in] speed The specified link speed.
* @param[in] duplex The specifed duplex mode.
*
* @returns void.
*/
void ethernet_set_link(int speed, int duplex);
/** @} */ /* End of group ethernet */
#ifdef __cplusplus
}
#endif
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/ethernet_api.h
|
C
|
apache-2.0
| 2,700
|
/** mbed Microcontroller Library
******************************************************************************
* @file gpio_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed GPIO API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_GPIO_API_H
#define MBED_GPIO_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup gpio GPIO
* @ingroup hal
* @brief gpio functions
* @{
*/
///@name Ameba Common
///@{
/**
* @brief Initializes the GPIO device, include mode/direction/pull control registers.
* @param obj: gpio object define in application software.
* @param pin: PinName according to pinmux spec.
* @retval none
*/
void gpio_init(gpio_t *obj, PinName pin);
/**
* @brief Deinitializes the GPIO device, include mode/direction/pull control registers.
* @param obj: gpio object define in application software.
* @retval none
*/
void gpio_deinit(gpio_t *obj);
/**
* @brief Set the given pin as GPIO.
* @param pin: PinName according to pinmux spec.
* @retval : The given pin with GPIO function
*/
uint32_t gpio_set(PinName pin);
/**
* @brief Set GPIO mode.
* @param obj: gpio object define in application software.
* @param mode: this parameter can be one of the following values:
* @arg PullNone: HighZ, user can input high or low use this pin
* @arg OpenDrain(is OpenDrain output): no pull + OUT + GPIO[gpio_bit] = 0
* @arg PullDown: pull down
* @arg PullUp: pull up
* @retval none
*/
void gpio_mode(gpio_t *obj, PinMode mode);
/**
* @brief Set GPIO direction.
* @param obj: gpio object define in application software.
* @param direction: this parameter can be one of the following values:
* @arg PIN_INPUT: this pin is input
* @arg PIN_OUTPUT: this pin is output
* @retval none
*/
void gpio_dir(gpio_t *obj, PinDirection direction);
/**
* @brief Sets value to the selected output port pin.
* @param obj: gpio object define in application software.
* @param value: specifies the value to be written to the selected pin
* This parameter can be one of the following values:
* @arg 0: Pin state set to low
* @arg 1: Pin state set to high
* @retval none
*/
void gpio_write(gpio_t *obj, int value);
/**
* @brief Reads the specified gpio port pin.
* @param obj: gpio object define in application software.
* @retval 1: pin state is high
* @retval 0: pin state is low
*/
int gpio_read(gpio_t *obj);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif//MBED_GPIO_API_H
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/gpio_api.h
|
C
|
apache-2.0
| 3,344
|
/** mbed Microcontroller Library
******************************************************************************
* @file gpio_irq_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed GPIO IRQ API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_GPIO_IRQ_API_H
#define MBED_GPIO_IRQ_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup gpio_irq_api GPIO_IRQ
* @ingroup hal
* @brief gpio IRQ functions
* @{
*/
///@name Ameba Common
///@{
typedef enum {
IRQ_NONE,
IRQ_RISE,
IRQ_FALL
} gpio_irq_event;
typedef void (*gpio_irq_handler)(uint32_t id, gpio_irq_event event);
/**
* @brief Initializes the GPIO device interrupt mode, include mode/trigger/polarity registers.
* @param obj: gpio irq object define in application software.
* @param pin: PinName according to pinmux spec.
* @param handler: Interrupt handler to be assigned to the specified pin.
* @param id: handler id.
* @retval none
* @note this API only works for Port A pins
*/
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id);
/**
* @brief Deinitializes the GPIO device interrupt mode, include mode/trigger/polarity registers.
* @param obj: gpio irq object define in application software.
* @retval none
*/
void gpio_irq_deinit(gpio_irq_t *obj) ;
/**
* @brief Deinitializes the GPIO device interrupt mode, include mode/trigger/polarity registers.
* @param obj: gpio irq object define in application software.
* @retval none
* @note this API only works for Port A pins
*/
void gpio_irq_free(gpio_irq_t *obj);
/**
* @brief Enable/Disable gpio interrupt.
* @param obj: gpio irq object define in application software.
* @param event: gpio interrupt event, this parameter can be one of the following values:
* @arg IRQ_RISE: rising edge interrupt event
* @arg IRQ_FALL: falling edge interrupt event
* @arg IRQ_LOW: low level interrupt event
* @arg IRQ_HIGH: high level interrupt event
* @arg IRQ_NONE: no interrupt event
* @param enable: this parameter can be one of the following values:
* @arg 0 disable gpio interrupt
* @arg 1 enable gpio interrupt
* @retval none
*/
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable);
/**
* @brief Enable gpio interrupt.
* @param obj: gpio irq object define in application software.
* @retval none
*/
void gpio_irq_enable(gpio_irq_t *obj);
/**
* @brief Disable gpio interrupt.
* @param obj: gpio irq object define in application software.
* @retval none
*/
void gpio_irq_disable(gpio_irq_t *obj);
/**
* @brief Enable the specified gpio interrupt event.
* @param obj: gpio irq object define in application software.
* @param event: gpio interrupt event, this parameter can be one of the following values:
* @arg IRQ_RISE: rising edge interrupt event
* @arg IRQ_FALL: falling edge interrupt event
* @arg IRQ_LOW: low level interrupt event
* @arg IRQ_HIGH: high level interrupt event
* @arg IRQ_NONE: no interrupt event
* @retval none
*/
void gpio_irq_set_event(gpio_irq_t *obj, gpio_irq_event event);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/gpio_irq_api.h
|
C
|
apache-2.0
| 4,008
|
/** mbed Microcontroller Library
******************************************************************************
* @file i2c_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed I2C API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_I2C_API_H
#define MBED_I2C_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup i2c I2C
* @ingroup hal
* @brief I2C functions
* @{
*/
///@name Ameba Common
///@{
typedef struct i2c_s i2c_t;
enum {
I2C_ERROR_NO_SLAVE = -1,
I2C_ERROR_BUS_BUSY = -2
};
/**
* @brief Initializes the I2C device, include clock/function/I2C registers.
* @param obj: i2c object define in application software.
* @param sda: SDA PinName according to pinmux spec.
* @param scl: SCL PinName according to pinmux spec.
* @retval none
*/
void i2c_init(i2c_t *obj, PinName sda, PinName scl);
/**
* @brief Set i2c frequency.
* @param obj: i2c object define in application software.
* @param hz: i2c clock(unit is Hz).
* @retval none
*/
void i2c_frequency(i2c_t *obj, int hz);
/**
* @brief Start i2c device.
* @param obj: i2c object define in application software.
* @retval 0
*/
int i2c_start(i2c_t *obj);
/**
* @brief Stop i2c device.
* @param obj: i2c object define in application software.
* @retval 0
*/
int i2c_stop(i2c_t *obj);
/**
* @brief Deinitializes the I2C device
* @param obj: i2c object define in application software.
* @retval none
*/
void i2c_reset(i2c_t *obj);
/**
* @brief I2C master receive single byte.
* @param obj: i2c object define in application software.
* @param last: hold the received data.
* @retval : the received data.
*/
int i2c_byte_read(i2c_t *obj, int last);
/**
* @brief I2C master send single byte.
* @param obj: i2c object define in application software.
* @param data: the data to be sent.
* @retval : result.
*/
int i2c_byte_write(i2c_t *obj, int data);
/**
* @brief Set i2c device to be slave.
* @param obj: i2c object define in application software.
* @param enable_slave: enable slave function, this parameter can be one of the following values:
* @arg 0 disable
* @arg 1 enable
* @retval none
*/
void i2c_slave_mode(i2c_t *obj, int enable_slave);
/**
* @brief Get i2c slave state.
* @param obj: i2c object define in application software.
* @retval : the state of i2c slave.
*/
int i2c_slave_receive(i2c_t *obj);
/**
* @brief Set i2c slave address.
* @param obj: i2c object define in application software.
* @param idx: i2c index, this parameter can be one of the following values:
* @arg 0 I2C0 Device
* @arg 1 I2C1 Device
* @param address: slave address.
* @param mask: the mask of address
* @retval none
*/
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask);
/**
* @brief I2C master read in poll mode.
* @param obj: i2c object define in application software.
* @param address: slave address which will be transmitted.
* @param data: point to the buffer to hold the received data.
* @param length: the length of data that to be received.
* @param stop: specifies whether a STOP is issued after all the bytes are received.
* @retval : the length of data received.
*/
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop);
/**
* @brief I2C master write in poll mode.
* @param obj: i2c object define in application software.
* @param address: slave address which will be transmitted.
* @param data: point to the data to be sent.
* @param length: the length of data that to be sent.
* @param stop: specifies whether a STOP is issued after all the bytes are sent.
* @retval : the length of data send.
*/
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop);
/**
* @brief I2C slave read in poll mode.
* @param obj: i2c object define in application software.
* @param data: point to the buffer to hold the received data.
* @param length: the length of data that to be received.
* @retval : the length of data received.
*/
int i2c_slave_read(i2c_t *obj, char *data, int length);
/**
* @brief I2C slave write in poll mode.
* @param obj: i2c object define in application software.
* @param data: point to the data to be sent.
* @param length: the length of data that to be sent.
* @retval 0: FAIL
* @retval 1: SUCCESS
*/
int i2c_slave_write(i2c_t *obj, const char *data, int length);
/**
* @brief Set/clear i2c slave RD_REQ interrupt mask.
* @param obj: i2c object define in application software.
* @param set: set or clear for read request.
* @retval 1: SUCCESS
*/
int i2c_slave_set_for_rd_req(i2c_t *obj, int set);
/**
* @brief Set/clear i2c slave NAK or ACK data part in transfer.
* @param obj: i2c object define in application software.
* @param set_nak: set or clear for data NAK.
* @retval 1: SUCCESS
*/
int i2c_slave_set_for_data_nak(i2c_t *obj, int set_nak);
///@}
#if ((defined(CONFIG_PLATFORM_8711B) && (CONFIG_PLATFORM_8711B == 1)) || (defined (CONFIG_PLATFORM_8721D) && (CONFIG_PLATFORM_8721D == 1)))
///@name AmebaZ and AmebaD
///@{
/**
* @brief I2C master send data and read data in poll mode.
* @param obj: i2c object define in application software.
* @param address: slave address which will be transmitted.
* @param pWriteBuf: point to the data to be sent.
* @param Writelen: the length of data that to be sent.
* @param pReadBuf: point to the buffer to hold the received data.
* @param Readlen: the length of data that to be received.
* @retval the length of data received.
*/
int i2c_repeatread(i2c_t *obj, int address, u8 *pWriteBuf, int Writelen, u8 *pReadBuf, int Readlen) ;
///@}
#endif //(CONFIG_PLATFORM_8711B||CONFIG_PLATFORM_8721D)
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif/* MBED_I2C_API_H */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/i2c_api.h
|
C
|
apache-2.0
| 6,705
|
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINMAP_H
#define MBED_PINMAP_H
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
PinName pin;
int peripheral;
int function;
} PinMap;
void pin_function(PinName pin, int function);
void pin_mode (PinName pin, PinMode mode);
uint32_t pinmap_peripheral(PinName pin, const PinMap* map);
uint32_t pinmap_merge (uint32_t a, uint32_t b);
void pinmap_pinout (PinName pin, const PinMap *map);
uint32_t pinmap_find_peripheral(PinName pin, const PinMap* map);
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/pinmap.h
|
C
|
apache-2.0
| 1,191
|
/** mbed Microcontroller Library
******************************************************************************
* @file port_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed GPIO PORT API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_PORTMAP_H
#define MBED_PORTMAP_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup port PORT
* @ingroup hal
* @brief port functions
* @{
*/
///@name Ameba Common
///@{
typedef struct port_s port_t;
/**
* @brief Initializes the GPIO device port, include data direction registers.
* @param obj: gpio port object define in application software.
* @param port: PortName according to pinmux spec, this parameter can be one of the following values:
* @arg PortA: port A, has 32 pins
* @arg PortB: port B, has 7 pins
* @param mask: One bit one gpio pin, select one or multiple pins of the specified port.
* @param dir: gpio port direction, this parameter can be one of the following values:
* @arg PIN_INPUT: port pins are input
* @arg PIN_OUTPUT: port pins are output
* @retval none
*/
void port_init(port_t *obj, PortName port, int mask, PinDirection dir);
/**
* @brief Get GPIO port pin name
* @param port: PortName according to pinmux spec, this parameter can be one of the following values:
* @arg PortA: port number is A, has 32 pins
* @arg PortB: port number is B, has 7 pins
* @param pin_n: pin number.
* @retval none
* @note pin_n must be set to a value in the 0~31 range when PortA
* @note pin_n must be set to a value in the 0~6 range when PortB
*/
PinName port_pin(PortName port, int pin_n);
/**
* @brief Configure GPIO port pins pull up/pull down.
* @param obj: gpio port object define in application software.
* @param mode: this parameter can be one of the following values:
* @arg PullNone: HighZ
* @arg OpenDrain(is OpenDrain output): no pull + OUT + GPIO[gpio_bit] = 0
* @arg PullDown: pull down
* @arg PullUp: pull up
* @retval none
*/
void port_mode(port_t *obj, PinMode mode);
/**
* @brief Set GPIO port pins data direction.
* @param obj: gpio port object define in application software.
* @param dir: this parameter can be one of the following values:
* @arg PIN_INPUT: port pins are input
* @arg PIN_OUTPUT: port pins are output
* @retval none
*/
void port_dir(port_t *obj, PinDirection dir);
/**
* @brief Sets value to the selected port pins.
* @param obj: gpio port object define in application software.
* @param value: One bit one gpio pin, set value to one or multiple pins of the specified port.
* @retval none
* @note corresponding bit is 1, pin state set to high; corresponding bit is 0, pin state set to low
*/
void port_write(port_t *obj, int value);
/**
* @brief Reads the specified gpio port pins.
* @param obj: gpio port object define in application software.
* @retval : state of the specified gpio port pins
* @note corresponding bit is 1, pin state is high; corresponding bit is 0, pin state is low
*/
int port_read(port_t *obj);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/port_api.h
|
C
|
apache-2.0
| 3,943
|
/** mbed Microcontroller Library
******************************************************************************
* @file pwmout_api.h
* @author
* @version V1.0.0
* @brief This file provides mbed pwm API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_PWMOUT_API_H
#define MBED_PWMOUT_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup pwm PWM
* @ingroup hal
* @brief pwm functions
* @{
*/
///@name Ameba Common
///@{
typedef struct pwmout_s pwmout_t;
/**
* @brief Initializes the PWM function/registers of the specified pin with default parameters.
* @param obj: PWM object define in application software.
* @param pin: the pinname of specified channel to be set.
* @retval none
* @note
* - default period: 1638us
* - default pulse width: 102us
* - default duty cycle: 6.227%
*/
void pwmout_init(pwmout_t* obj, PinName pin);
/**
* @brief Deinitializes the PWM device of the specified channel.
* @param obj: PWM object define in application software.
* @retval none
* @note If all channels are released, TIM5 will also be disabled.
*/
void pwmout_free(pwmout_t* obj);
/**
* @brief Set the duty cycle of the specified channel.
* @param obj: PWM object define in application software.
* @param percent: The duty cycle value to be set.
* @retval none
*/
void pwmout_write(pwmout_t* obj, float percent);
/**
* @brief Get the duty cycle value of the specified channel.
* @param obj: PWM object define in application software.
* @retval : the duty cycle value of the specified channel.
*/
float pwmout_read(pwmout_t* obj);
/**
* @brief Set the period of the specified channel in seconds.
* @param obj: PWM object define in application software.
* @param seconds: The period value to be set in seconds.
* @retval none
*/
void pwmout_period(pwmout_t* obj, float seconds);
/**
* @brief Set the period of the specified channel in millseconds.
* @param obj: PWM object define in application software.
* @param ms: The period value to be set in millseconds.
* @retval none
*/
void pwmout_period_ms(pwmout_t* obj, int ms);
/**
* @brief Set the period of the specified channel in microseconds.
* @param obj: PWM object define in application software.
* @param us: The period value to be set in microseconds.
* @retval none
*/
void pwmout_period_us(pwmout_t* obj, int us);
/**
* @brief Set the pulse width of the specified channel in seconds.
* @param obj: PWM object define in application software.
* @param seconds: The pulse width value to be set in seconds.
* @retval none
*/
void pwmout_pulsewidth(pwmout_t* obj, float seconds);
/**
* @brief Set the pulse width of the specified channel in milliseconds.
* @param obj: PWM object define in application software.
* @param ms: The pulse width value to be set in milliseconds.
* @retval none
*/
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms);
/**
* @brief Set the pulse width of the specified channel in microseconds.
* @param obj: PWM object define in application software.
* @param us: The pulse width value to be set in microseconds.
* @retval none
*/
void pwmout_pulsewidth_us(pwmout_t* obj, int us);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/pwmout_api.h
|
C
|
apache-2.0
| 4,104
|
/** mbed Microcontroller Library
******************************************************************************
* @file rtc_api.h
* @author
* @version V1.0.0
* @brief This file provides mbed RTC API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_RTC_API_H
#define MBED_RTC_API_H
#include "device.h"
#include <time.h>
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup rtc RTC
* @ingroup hal
* @brief rtc functions
* @{
*/
#if (defined(CONFIG_PLATFORM_8711B) && CONFIG_PLATFORM_8711B) || defined(CONFIG_PLATFORM_8721D) && \
CONFIG_PLATFORM_8721D || (defined(CONFIG_PLATFORM_8195BLP) && CONFIG_PLATFORM_8195BLP)
///@name AmebaZ and AmebaPro and AmebaD
///@{
typedef void (*alarm_irq_handler)(void);
struct alarm_s {
uint32_t yday;//which day of the year
uint32_t hour;
uint32_t min;
uint32_t sec;
};
typedef struct alarm_s alarm_t;
///@}
#endif //CONFIG_PLATFORM_8711B || CONFIG_PLATFORM_8195BLP
///@name Ameba Common
///@{
/**
* @brief Initializes the RTC device, include clock, RTC registers and function.
* @param none
* @retval none
*/
void rtc_init(void);
/**
* @brief Deinitializes the RTC device.
* @param none
* @retval none
*/
void rtc_free(void);
/**
* @brief This function tells whether RTC is enabled or not.
* @param none
* @retval 1: RTC is enable.
* @retval 0: RTC is disable.
*/
int rtc_isenabled(void);
/**
* @brief Get current timestamp in seconds from RTC.
* @param none
* @retval : The current timestamp in seconds which is calculated from 1970.1.1 00:00:00.
*/
time_t rtc_read(void);
/**
* @brief Set the specified timestamp in seconds to RTC.
* @param t: Seconds from 1970.1.1 00:00:00 to specified data and time which is to be set.
* @retval none
*/
void rtc_write(time_t t);
///@}
#if ((defined(CONFIG_PLATFORM_8711B) && CONFIG_PLATFORM_8711B) || \
(defined(CONFIG_PLATFORM_8195BLP) && CONFIG_PLATFORM_8195BLP))
///@name AmebaZ and AmebaPro
///@{
/**
* @brief Set the specified RTC Alarm and interrupt.
* @param alarm: alarm object define in application software.
* @param alarmHandler: alarm interrupt callback function.
* @retval status:
* - 1: success
* - Others: failure
*/
u32 rtc_set_alarm(alarm_t *alrm, alarm_irq_handler alarmHandler);
/**
* @brief Disable RTC Alarm and function.
* @param none
* @retval none
*/
void rtc_disable_alarm(void);
///@}
#endif //CONFIG_PLATFORM_8711B || CONFIG_PLATFORM_8195BLP
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/rtc_api.h
|
C
|
apache-2.0
| 3,312
|
/** mbed Microcontroller Library
******************************************************************************
* @file serial_api.h
* @author
* @version V1.0.0
* @brief This file provides mbed API for UART.
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_SERIAL_API_H
#define MBED_SERIAL_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup uart UART
* @ingroup hal
* @brief uart functions
* @{
*/
///@name Ameba Common
///@{
/**
* @brief UART Parity mode
* used by serial_format
*/
typedef enum {
ParityNone = 0, /*!<parity disable */
ParityOdd = 1, /*!<odd parity enable */
ParityEven = 2, /*!<even paroty enable */
ParityForced1 = 3, /*!<same action with ParityOdd */
ParityForced0 = 4 /*!<same action with ParityEven */
} SerialParity;
/**
* @brief UART Interrupt enable/disable
* used by serial_irq_set
*/
typedef enum {
RxIrq, /*!<RX IRQ enable/disable */
TxIrq /*!<TX IRQ enable/disable */
} SerialIrq;
/**
* @brief UART FlowControl mode
* used by serial_set_flow_control
*/
typedef enum {
FlowControlNone, /*!<none RTS/CTS */
FlowControlRTS, /*!<RTS enable */
FlowControlCTS, /*!<CTS enable */
FlowControlRTSCTS /*!<RTS/CTS enable */
} FlowControl;
typedef void (*uart_irq_handler)(uint32_t id, SerialIrq event);
typedef struct serial_s serial_t;
/**
* @brief Initializes the UART device, include clock/function/interrupt/UART registers.
* @param obj: uart object define in application software.
* @param tx: Tx PinName according to pinmux spec.
* @param rx: Rx PinName according to pinmux spec.
* @retval none
*/
void serial_init(serial_t *obj, PinName tx, PinName rx);
/**
* @brief Deinitializes the UART device, include clock/function/interrupt/UART registers.
* @param obj: uart object define in application software.
* @retval none
*/
void serial_free(serial_t *obj);
/**
* @brief Set UART device baudrate.
* @param obj: uart object define in application software.
* @param baudrate: Baud Rate Val, like 115200 (unit is HZ).
* @retval none
*/
void serial_baud(serial_t *obj, int baudrate);
/**
* @brief Set UART format.
* @param obj: uart object define in application software.
* @param data_bits: data bits, this parameter can be one of the following values:
* @arg 7
* @arg 8
* @param parity: this parameter can be one of the following values:
* @arg ParityNone
* @arg ParityOdd
* @arg ParityEven
* @arg ParityForced1: same action with ParityOdd
* @arg ParityForced0: same action with ParityEven
* @param stop_bits: this parameter can be one of the following values:
* @arg 2
* @arg 1
* @retval none
*/
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits);
/**
* @brief Set UART interrupt hander if needed.
* @param obj: uart object define in application software.
* @param handler: interrupt callback function
* @param id: interrupt callback parameter
* @retval none
*/
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id);
/**
* @brief Enable/Disable UART interrupt.
* @param obj: uart object define in application software.
* @param irq: Tx or Rx interrupt, this parameter can be one of the following values:
* @arg RxIrq
* @arg TxIrq
* @param enable: this parameter can be one of the following values:
* @arg 0 disable
* @arg 1 enable
* @retval none
*/
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable);
/**
* @brief get one byte from UART.
* @param obj: uart object define in application software.
* @retval : received character
* @note this function is asynchronous API.
*/
int serial_getc(serial_t *obj);
/**
* @brief send one byte use UART.
* @param obj: uart object define in application software.
* @param c: the data to transmit.
* @retval none
* @note this function is asynchronous API.
*/
void serial_putc(serial_t *obj, int c);
/**
* @brief check if there is data in rx fifo.
* @param obj: uart object define in application software.
* @retval 1: TRUE
* @retval 0: FALSE
*/
int serial_readable(serial_t *obj);
/**
* @brief check if write data to tx fifo is permitted.
* @param obj: uart object define in application software.
* @retval 1: TRUE
* @retval 0: FALSE
*/
int serial_writable(serial_t *obj);
/**
* @brief Clear Rx fifo.
* @param obj: uart object define in application software.
* @retval none
*/
void serial_clear(serial_t *obj);
/**
* @brief enable UART break contol function.
* @param obj: uart object define in application software.
* @retval none
*/
void serial_break_set(serial_t *obj);
/**
* @brief disable UART break contol function.
* @param obj: uart object define in application software.
* @retval none
*/
void serial_break_clear(serial_t *obj);
/**
* @brief set tx pinmux.
* @param tx: Tx PinName according to pinmux spec.
* @retval none
*/
void serial_pinout_tx(PinName tx);
/**
* @brief uart autoflow control setting.
* @param obj: uart object define in application software.
* @param type: autoflow control type.
* @param rxflow: RTS pin.
* @param txflow: CTS pin.
* @retval none
*/
void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/serial_api.h
|
C
|
apache-2.0
| 6,192
|
/** mbed Microcontroller Library
******************************************************************************
* @file sleep_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed SLEEP API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_SLEEP_API_H
#define MBED_SLEEP_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup sleep SLEEP
* @ingroup hal
* @brief sleep functions
* @{
*/
///@name Ameba Common
///@{
/** Send the microcontroller to sleep
*
* The processor is setup ready for sleep, and sent to sleep using __WFI(). In this mode, the
* system clock to the core is stopped until a reset or an interrupt occurs. This eliminates
* dynamic power used by the processor, memory systems and buses. The processor, peripheral and
* memory state are maintained, and the peripherals continue to work and can generate interrupts.
*
* The processor can be woken up by any internal peripheral interrupt or external pin interrupt.
*
* @retval None
* @note
* The mbed interface semihosting is disconnected as part of going to sleep, and can not be restored.
* Flash re-programming and the USB serial port will remain active, but the mbed program will no longer be
* able to access the LocalFileSystem
*/
void sleep(void);
/** Send the microcontroller to deep sleep
*
* This processor is setup ready for deep sleep, and sent to sleep using __WFI(). This mode
* has the same sleep features as sleep plus it powers down peripherals and clocks. All state
* is still maintained.
*
* The processor can only be woken up by an external interrupt on a pin or a watchdog timer.
*
* @retval None
* @note
* The mbed interface semihosting is disconnected as part of going to sleep, and can not be restored.
* Flash re-programming and the USB serial port will remain active, but the mbed program will no longer be
* able to access the LocalFileSystem
*/
void deepsleep(void);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/sleep_api.h
|
C
|
apache-2.0
| 2,788
|
/** mbed Microcontroller Library
******************************************************************************
* @file spi_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed SPI API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_SPI_API_H
#define MBED_SPI_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup spi SPI
* @ingroup hal
* @brief spi functions
* @{
*/
#if ((defined(CONFIG_PLATFORM_8711B) && (CONFIG_PLATFORM_8711B == 1)) || (defined (CONFIG_PLATFORM_8721D) && (CONFIG_PLATFORM_8721D == 1)))
///@name AmebaZ and AmebaD
///@{
typedef enum {
MBED_SPI0 = 0xF0, /*!< means SPI0 */
MBED_SPI1 = 0xF1, /*!< means SPI1 */
} MBED_SPI_IDX;
///@}
#endif //CONFIG_PLATFORM_8711B and CONFIG_PLATFORM_8721D
///@name Ameba Common
///@{
typedef struct spi_s spi_t;
/**
* @brief Initializes the SPI device, include clock/function/interrupt/SPI registers.
* @param obj: spi object define in application software.
* @param mosi: MOSI PinName according to pinmux spec.
* @param miso: MISO PinName according to pinmux spec.
* @param sclk: SCLK PinName according to pinmux spec.
* @param ssel: CS PinName according to pinmux spec.
* @retval none
* @note must set obj->spi_index to MBED_SPI0 or MBED_SPI1 before using spi_init
*/
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
/**
* @brief Deinitializes the SPI device, include interrupt/DMA/DISABLE SPI.
* @param obj: spi object define in application software.
* @retval none
*/
void spi_free(spi_t *obj);
/**
* @brief Set SPI format,include DFS/Phase/Polarity.
* @param obj: spi object define in application software.
* @param bits: data frame size, 4-16 supported.
* @param mode: this parameter can be one of the following values:
* @arg 0 : [Polarity,Phase]=[0,0]
* @arg 1 : [Polarity,Phase]=[0,1]
* @arg 2 : [Polarity,Phase]=[1,0]
* @arg 3 : [Polarity,Phase]=[1,1]
* @param slave: this parameter can be one of the following values:
* @arg 0 : indicates role-master
* @arg 1 : indicates role-slave
* @retval none
*/
void spi_format(spi_t *obj, int bits, int mode, int slave);
/**
* @brief Set SPI baudrate.
* @param obj: spi master object define in application software.
* @param hz: baudrate for SPI bus
* @retval none
* @note "hz" should be less or equal to half of the SPI IpClk
*/
void spi_frequency(spi_t *obj, int hz);
/**
* @brief Master send one frame use SPI.
* @param obj: spi master object define in application software.
* @param value: the data to transmit.
* @retval : data received from slave
*/
int spi_master_write(spi_t *obj, int value);
/**
* @brief Get slave readable && busy state.
* @param obj: spi slave object define in application software.
* @retval : slave Readable && Busy State
*/
int spi_slave_receive(spi_t *obj);
/**
* @brief Slave receive one frame use SPI.
* @param obj: spi slave object define in application software.
* @retval : data received from master
*/
int spi_slave_read(spi_t *obj);
/**
* @brief Slave send one frame use SPI.
* @param obj: spi slave object define in application software.
* @param value: the data to transmit.
* @retval none
*/
void spi_slave_write(spi_t *obj, int value);
/**
* @brief Get SPI busy state.
* @param obj: spi object define in application software.
* @retval : current busy state
*/
int spi_busy(spi_t *obj);
/**
* @brief SPI device to flush rx fifo.
* @param obj: spi object define in application software.
* @retval none
*/
void spi_flush_rx_fifo(spi_t *obj);
/**
* @brief Open SPI device clock.
* @param obj: spi object define in application software.
* @retval none
*/
void spi_enable(spi_t *obj);
/**
* @brief Close SPI device clock.
* @param obj: spi object define in application software.
* @retval none
*/
void spi_disable(spi_t *obj);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/spi_api.h
|
C
|
apache-2.0
| 4,808
|
/** mbed Microcontroller Library
******************************************************************************
* @file timer_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed I2C API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_EXT_TIMER_API_EXT_H
#define MBED_EXT_TIMER_API_EXT_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup timer TIMER
* @ingroup hal
* @brief timer functions
* @{
*/
///@name Ameba Common
///@{
typedef struct gtimer_s gtimer_t;
typedef void (*gtimer_irq_handler)(uint32_t id);
#if defined(CONFIG_PLATFORM_8721D) && (CONFIG_PLATFORM_8721D == 1)
enum {
TIMER0 = 0, /*!< GTimer 0, 32k timer, share with us_tick(wait_ms()) functions. This timer is reserved and users are not recommended to use it */
TIMER1 = 1, /*!< GTimer 1, 32k timer, share with APP_TIM_ID */
TIMER2 = 2, /*!< GTimer 2, 32k timer, users can use it */
TIMER3 = 3, /*!< GTimer 3, 32k timer, users can use it */
GTIMER_MAX = 4
};
#endif
/**
* @brief Initializes the timer, including clock/function/timer registers.
* @param obj: gtimer object defined in application software.
* @param tid: the timer struct ID defined in gtimer structure.
* @retval none
*/
void gtimer_init (gtimer_t *obj, uint32_t tid);
/**
* @brief Deinitializes the timer, including clock/function/timer registers.
* @param obj: gtimer object defined in application software.
* @retval none
*/
void gtimer_deinit (gtimer_t *obj);
/**
* @brief Read current timer tick in Gtimer clock(0~32768).
* @param obj: gtimer object defined in application software.
* @retval 32 bit tick time
*/
uint32_t gtimer_read_tick (gtimer_t *obj);
/**
* @brief Read current timer tick in microsecond.
* @param obj: gtimer object defined in application software.
* @retval 64 bit tick time
*/
uint64_t gtimer_read_us (gtimer_t *obj);
/**
* @brief Reload timer
* @param obj: gtimer object defined in application software.
* @param duration_us: the time in microsecond of gtimer to reload.
* @retval none
*/
void gtimer_reload (gtimer_t *obj, uint32_t duration_us);
/**
* @brief Start the timer
* @param obj: gtimer object defined in application software.
* @retval none
*/
void gtimer_start (gtimer_t *obj);
/**
* @brief Set up a shout timer, including clock/function/timer registers.
* @param obj: gtimer object defined in application software.
* @param duration_us: the period in microsecond of gtimer.
* @param handler: The Pointer to the function that program runs into when timer is up.
* @param hid: the timer struct ID defined in gtimer structure.
* @retval none
*/
void gtimer_start_one_shout (gtimer_t *obj, uint32_t duration_us, void* handler, uint32_t hid);
/**
* @brief Set up a periodic timer, including clock/function/timer registers.
* @param obj: gtimer object defined in application software.
* @param duration_us: the period in microsecond of gtimer.
* @param handler: The Pointer to function that program runs into when timer is up.
* @param hid: the timer struct ID defined in gtimer structure.
* @retval none
*/
void gtimer_start_periodical (gtimer_t *obj, uint32_t duration_us, void* handler, uint32_t hid);
/**
* @brief Stop the timer, including clock/function/timer registers.
* @param obj: gtimer object defined in application software.
* @retval none
*/
void gtimer_stop (gtimer_t *obj);
#if defined(CONFIG_PLATFORM_8195A) && (CONFIG_PLATFORM_8195A == 1)
///@name Ameba Only
///@{
enum {
TIMER0 = 2,
TIMER1 = 3,
TIMER2 = 4,
TIMER3 = 5,
TIMER4 = 0,
GTIMER_MAX = 5
};
///@}
#endif //CONFIG_PLATFORM_8195A
#if defined(CONFIG_PLATFORM_8711B) && (CONFIG_PLATFORM_8711B == 1)
///@name AmebaZ Only
///@{
enum {
TIMER0 = 0,
TIMER1 = 1,
TIMER2 = 2,
TIMER3 = 3,
GTIMER_MAX = 4
};
///@}
#endif //CONFIG_PLATFORM_8711B
#if (defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) || (defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1))
///@name AmebaPro Only
///@{
#if defined (CONFIG_PLATFORM_8195BLP)
enum {
TIMER0 = 1,
TIMER1 = 2,
TIMER2 = 3,
TIMER3 = 4,
TIMER4 = 5,
TIMER5 = 6,
TIMER6 = 7,
GTIMER_MAX = 7
};
#elif defined (CONFIG_PLATFORM_8195BHP)
#if defined (CONFIG_BUILD_NONSECURE)
enum {
TIMER0 = 9,
TIMER1 = 10,
TIMER2 = 11,
TIMER3 = 12,
TIMER4 = 13,
TIMER5 = 14,
TIMER6 = 15,
GTIMER_MAX = 15
};
#elif defined (CONFIG_BUILD_SECURE)
enum {
TIMER0 = 1,
TIMER1 = 2,
TIMER2 = 3,
TIMER3 = 4,
TIMER4 = 5,
TIMER5 = 6,
TIMER6 = 7,
GTIMER_MAX = 7
};
#else
enum {
TIMER0 = 1,
TIMER1 = 2,
TIMER2 = 3,
TIMER3 = 4,
TIMER4 = 5,
TIMER5 = 6,
TIMER6 = 7,
TIMER7 = 8,
TIMER8 = 9,
TIMER9 = 10,
TIMER10 = 11,
TIMER11 = 12,
TIMER12 = 13,
TIMER13 = 14,
TIMER14 = 15,
GTIMER_MAX = 15
};
#endif
#endif
// define the G-Timer Alarm ID, a G-Timer has 4 alarm
typedef enum {
TIMER_ALARM0 = GTimerMatchEvent0,
TIMER_ALARM1 = GTimerMatchEvent1,
TIMER_ALARM2 = GTimerMatchEvent2,
TIMER_ALARM3 = GTimerMatchEvent3,
TIMER_ALARM_NUM = 4
} alarmid_t;
void gtimer_enable_alarm (gtimer_t *obj, alarmid_t almid, uint32_t time_us, void *handler, uint32_t hid);
void gtimer_disable_alarm (gtimer_t *obj, alarmid_t almid);
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8195BLP)"
#ifdef __cplusplus
}
#endif
#endif/* MBED_TIMER_API_H */
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/timer_api.h
|
C
|
apache-2.0
| 6,482
|
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_US_TICKER_API_H
#define MBED_US_TICKER_API_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef uint64_t timestamp_t;
uint32_t us_ticker_read(void);
typedef void (*ticker_event_handler)(uint32_t id);
void us_ticker_set_handler(ticker_event_handler handler);
typedef struct ticker_event_s {
timestamp_t timestamp;
uint32_t id;
struct ticker_event_s *next;
} ticker_event_t;
void us_ticker_init(void);
void us_ticker_set_interrupt(timestamp_t timestamp);
void us_ticker_disable_interrupt(void);
void us_ticker_clear_interrupt(void);
void us_ticker_irq_handler(void);
void us_ticker_insert_event(ticker_event_t *obj, timestamp_t timestamp, uint32_t id);
void us_ticker_remove_event(ticker_event_t *obj);
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal/us_ticker_api.h
|
C
|
apache-2.0
| 1,445
|
/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2015, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*******************************************************************************
*/
#ifndef ANALOGIN_EX_API_H
#define ANALOGIN_EX_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
ANALOGIN_RX_DMA_COMPLETE = 0,
}AnalogInCallback;
void analogin_set_user_callback(analogin_t *obj, AnalogInCallback analogin_cb, void(*analogin_callback)(void *));
void analogin_clear_user_callback(analogin_t *obj, AnalogInCallback analogin_cb);
uint8_t analogin_read_u16_dma (analogin_t * obj, uint16_t *buf, uint16_t length);
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/analogin_ex_api.h
|
C
|
apache-2.0
| 933
|
/** mbed Microcontroller Library
******************************************************************************
* @file audio_api.h
* @author
* @version V1.0.0
* @brief
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_EXT_AUDIO_API_EXT_H
#define MBED_EXT_AUDIO_API_EXT_H
#if defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)
///@name AmebaPro Only
///@{
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup audio AUDIO
* @ingroup hal
* @brief audio functions
* @{
*/
typedef enum {
WL_16BIT = AUDIO_WL_16,
WL_24BIT = AUDIO_WL_24,
WL_8BIT = AUDIO_WL_8
} audio_wl;
typedef enum {
ASR_8KHZ = AUDIO_SR_8KHZ,
ASR_16KHZ = AUDIO_SR_16KHZ,
ASR_32KHZ = AUDIO_SR_32KHZ,
ASR_44p1KHZ = AUDIO_SR_44p1KHZ,
ASR_48KHZ = AUDIO_SR_48KHZ,
ASR_88p2KHZ = AUDIO_SR_88p2KHZ,
ASR_96KHZ = AUDIO_SR_96KHZ
} audio_sr;
typedef enum {
OUTPUT_DISABLE = 0,
OUTPUT_SINGLE_EDNED = 1,
OUTPUT_DIFFERENTIAL = 2,
OUTPUT_CAPLESS = 3
} audio_output_mode;
typedef enum {
INPUT_DISABLE = 0,
LINE_IN_MODE = 1,
MIC_DIFFERENTIAL = 2,
MIC_SINGLE_EDNED = 3
} audio_input_mode;
typedef enum {
BIAS_0p9_AVDD = AUDIO_BIAS_0p9_AVDD,
BIAS_0p86_AVDD = AUDIO_BIAS_0p86_AVDD,
BIAS_0p75_AVDD = AUDIO_BIAS_0p75_AVDD
} audio_bias_voltage;
typedef enum {
MIC_0DB = AUDIO_MIC_0DB,
MIC_20DB = AUDIO_MIC_20DB,
MIC_30DB = AUDIO_MIC_30DB,
MIC_40DB = AUDIO_MIC_40DB
} audio_mic_gain;
typedef enum {
VREF_0p52VDD = AUDIO_VREF_0p52_VDD,
VREF_0p51VDD = AUDIO_VREF_0p51_VDD,
VREF_0p50VDD = AUDIO_VREF_0p50_VDD,
VREF_0p49VDD = AUDIO_VREF_0p49_VDD
} audio_vref_voltage;
typedef enum {
SIDETONE_120HZ = AUDIO_ST_120HZ,
SIDETONE_239HZ = AUDIO_ST_239HZ,
SIDETONE_358HZ = AUDIO_ST_358HZ,
SIDETONE_477HZ = AUDIO_ST_477HZ,
SIDETONE_597HZ = AUDIO_ST_597HZ,
SIDETONE_716HZ = AUDIO_ST_716HZ,
SIDETONE_835HZ = AUDIO_ST_835HZ,
SIDETONE_955HZ = AUDIO_ST_955HZ
} audio_sidetone_hpf;
typedef enum {
DVOL_ADC_0DB = 0x2F,
DVOL_DAC_0DB = 0xAF,
SIDETONE_0DB = 0x1F
} audio_dvol_0db;
typedef enum {
AUDIO_CODEC_1p8V = AUDIO_POWER_1p8V,
AUDIO_CODEC_2p8V = AUDIO_POWER_2p8V
} audio_power_sel;
typedef void (*audio_irq_handler)(u32 arg, u8 *pbuf);
typedef struct audio_s audio_t;
/**
* @brief Initializes the AUDIO device, include clock/function/interrupt/AUDIO registers.
* @param obj: Audio object define in application software.
* @param output_mode: Select the output mode.
* @arg OUTPUT_DISABLE: Disable audio output.
* @arg OUTPUT_SINGLE_EDNED: Single-Ended mode.
* @arg OUTPUT_DIFFERENTIAL: Differential mode.
* @arg OUTPUT_CAPLESS: Capless mode.
* @param input_mode: Select the input mode.
* @arg INPUT_DISABLE: Disable audio input.
* @arg LINE_IN_MODE: Line in mode.
* @arg MIC_DIFFERENTIAL: MIC differential mode.
* @arg MIC_SINGLE_EDNED: MIC Single-Ended mode.
* @param power_sel: Select audio codec LDO power.
* @arg AUDIO_CODEC_1p8V: Audio codec power 1.8V.
* @arg AUDIO_CODEC_2p8V: Audio codec power 2.8V.
* @retval none
*/
void audio_init(audio_t *obj, audio_output_mode output_mode, audio_input_mode input_mode, audio_power_sel power_sel);
/**
* @brief Deinitializes the AUDIO device, include function/interrupt/AUDIO registers.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_deinit(audio_t *obj);
/**
* @brief Set the audio sample rate and word length.
* @param obj: Audio object define in application software.
* @param sample_rate: this parameter can be one of the following values:
* @arg ASR_8KHZ: sample rate is 8kHz
* @arg ASR_16KHZ: sample rate is 16kHz
* @arg ASR_32KHZ: sample rate is 32kHz
* @arg ASR_44p1KHZ: sample rate is 44.1kHz
* @arg ASR_48KHZ: sample rate is 48kHz
* @arg ASR_88p2KHZ: sample rate is 88.2kHz
* @arg ASR_96KHZ: sample rate is 96kHz
* @param word_length: this parameter can be one of the following values:
* @arg WL_8BIT: sample bit is 8 bit
* @arg WL_16BIT: sample bit is 16 bit
* @arg WL_24BIT: sample bit is 24 bit (World length is 24bits but ADC and DAC are 16bits)
* @retval none
*/
void audio_set_param(audio_t *obj, audio_sr sample_rate, audio_wl word_length);
/**
* @brief Set the tx buffer address.
* @param obj: Audio object define in application software.
* @param tx_buf: Set the address of tx buffer. Need 4-byte aligned.
* @param tx_page_size: This unit is byte. This number needs to be a multiple of 64, and the maximum value is 4032.
* @retval none
*/
void audio_set_tx_dma_buffer(audio_t *obj, u8 *tx_buf, u32 tx_page_size);
/**
* @brief Set the rx buffer address.
* @param obj: Audio object define in application software.
* @param rx_buf: Set the address of tx buffer. Need 4-byte aligned.
* @param rx_page_size: This unit is byte. This number needs to be a multiple of 64, and the maximum value is 4032.
* @retval none
*/
void audio_set_rx_dma_buffer(audio_t *obj, u8 *rx_buf, u32 rx_page_size);
/**
* @brief Set tx interrupt handler.
* @param obj: Audio object define in application software.
* @param tx_handler: User defined IRQ callback function.
* @param arg: User defined IRQ callback parameter.
* @retval none
*/
void audio_tx_irq_handler(audio_t *obj, audio_irq_handler tx_handler, u32 arg);
/**
* @brief Set rx interrupt handler.
* @param obj: Audio object define in application software.
* @param rx_handler: User defined IRQ callback function.
* @param arg: User defined IRQ callback parameter.
* @retval none
*/
void audio_rx_irq_handler(audio_t *obj, audio_irq_handler rx_handler, u32 arg);
/**
* @brief Get the current tx page address.
* @param obj: Audio object define in application software.
* @retval Tx page address
*/
u8 *audio_get_tx_page_adr(audio_t *obj);
/**
* @brief Inform Audio the tx page data of the channel is ready.
* @param obj: Audio object define in application software.
* @param pbuf: tx buffer adderss.
* @retval none
*/
void audio_set_tx_page(audio_t *obj, u8 *pbuf);
/**
* @brief Inform Audio that finish receiving the rx page data of the channel.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_set_rx_page(audio_t *obj);
/**
* @brief Start the tx transmission.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_tx_start (audio_t *obj);
/**
* @brief Start the rx transmission.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_rx_start (audio_t *obj);
/**
* @brief Start the tx and rx transmission.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_trx_start (audio_t *obj);
/**
* @brief Stop the tx transmission.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_tx_stop (audio_t *obj);
/**
* @brief Stop the rx transmission.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_rx_stop (audio_t *obj);
/**
* @brief Stop the tx and rx transmission.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_trx_stop (audio_t *obj);
/**
* @brief Get the error count of tx transmission when happen the interrupt.
* @param obj: Audio object define in application software.
* @retval Tx error count
*/
u8 audio_get_tx_error_cnt (audio_t *obj);
/**
* @brief Get the error count of rx transmission when happen the interrupt.
* @param obj: Audio object define in application software.
* @retval Rx error count
*/
u8 audio_get_rx_error_cnt (audio_t *obj);
/**
* @brief clean the error count.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_clean_error_cnt (audio_t *obj);
/**
* @brief Make the data from tx to rx and bypass the audio codec.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_sport_loopback (audio_t *obj, BOOL en);
/**
* @brief Control the mute of the microphone.
* @param obj: Audio object define in application software.
* @param en: To enable or disable mute.
* @retval none
*/
void audio_mic_analog_mute (audio_t *obj, BOOL en);
/**
* @brief Control the boost gain of the microphone.
* @param obj: Audio object define in application software.
* @param en: To enable or disable.
* @param mic_gain: Select the microphone gain.
* @arg MIC_0DB: 0dB.
* @arg MIC_20DB: 20dB.
* @arg MIC_30DB: 30dB.
* @arg MIC_40DB: 40dB.
* @retval none
*/
void audio_mic_analog_gain (audio_t *obj, BOOL en, audio_mic_gain mic_gain);
/**
* @brief Control the mute of the line-in.
* @param obj: Audio object define in application software.
* @param en: To enable or disable mute.
* @retval none
*/
void audio_line_in_analog_mute (audio_t *obj, BOOL en);
/**
* @brief Control the digital gain of ADC.
* @param obj: Audio object define in application software.
* @param step: The digital volume. Every Step is 0.375dB.
* @arg 0x7F: 30dB.
* @arg ...
* @arg 0x2F: 0dB.
* @arg ...
* @arg 0x00: -17.625dB.
* @retval none
*/
void audio_adc_digital_vol (audio_t *obj, u8 step);
/**
* @brief Control the digital mute of ADC.
* @param obj: Audio object define in application software.
* @param mute_en: To enable or disable mute.
* @retval none
*/
void audio_adc_digital_mute (audio_t *obj, BOOL mute_en);
/**
* @brief Control the mute of the headphone.
* @param obj: Audio object define in application software.
* @param en: To enable or disable mute.
* @retval none
*/
void audio_headphone_analog_mute (audio_t *obj, BOOL en);
/**
* @brief Control the digital gain of DAC.
* @param obj: Audio object define in application software.
* @param step: The digital volume. Every Step is 0.375dB.
* @arg 0xAF: 0dB.
* @arg 0xAE: -0.375dB.
* @arg ...
* @arg 0x00: -65.625dB.
* @retval none
*/
void audio_dac_digital_vol (audio_t *obj, u8 step);
/**
* @brief Control the digital mute of DAC.
* @param obj: Audio object define in application software.
* @param mute_en: To enable or disable mute.
* @retval none
*/
void audio_dac_digital_mute (audio_t *obj, BOOL mute_en);
/**
* @brief Control the VREF voltage.
* @param obj: Audio object define in application software.
* @param voltage: Select the VREF voltage.
* @arg VREF_0p52VDD: 0.52*VDD.
* @arg VREF_0p51VDD: 0.51*VDD.
* @arg VREF_0p50VDD: 0.50*VDD.
* @arg VREF_0p49VDD: 0.49*VDD.
* @retval none
*/
void audio_vref_voltage_ctrl (audio_t *obj, audio_vref_voltage voltage);
/**
* @brief Initializes the sidetone function. Allows to hear mic voice in the headset.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_sidetone_init (audio_t *obj);
/**
* @brief Deinitializes the sidetone function.
* @param obj: Audio object define in application software.
* @retval none
*/
void audio_sidetone_deinit (audio_t *obj);
/**
* @brief Control the digital gain and boost of sidetone.
* @param obj: Audio object define in application software.
* @param sidetone_boost: Audio object define in application software.
* @arg 0x00: 0dB.
* @arg 0x01: 12dB.
* @param step: The digital volume. Every Step is 1.5dB.
* @arg 0x1F: 0dB.
* @arg 0x1E: -1.5dB.
* @arg ...
* @arg 0x00: -46.5dB.
* @retval none
*/
void audio_sidetone_vol (audio_t *obj, audio_sidetone_boost_t sidetone_boost, u8 step);
/**
* @brief Control the high pass filter of sidetone.
* @param obj: Audio object define in application software.
* @param en: 0 is disable, 1 is enable.
* @param sidetone_hpf: Select the cut-off frequency.
* @arg SIDETONE_120HZ: 120Hz.
* @arg SIDETONE_239HZ: 239Hz.
* @arg SIDETONE_358HZ: 358Hz.
* @arg SIDETONE_477HZ: 477Hz.
* @arg SIDETONE_597HZ: 597Hz.
* @arg SIDETONE_716HZ: 716Hz.
* @arg SIDETONE_835HZ: 835Hz.
* @arg SIDETONE_955HZ: 955Hz.
* @retval none
*/
void audio_sidetone_hpf_ctrl (audio_t *obj, BOOL en, audio_sidetone_hpf sidetone_hpf);
/**
* @brief The wind filter is implemented by a high pass filter.Remove wind noise at application mode.
* The cut-off frequency of wind filter is programmable and is varied according to different sample rate.
* @param obj: Audio object define in application software.
* @param en Enable control: 0 is disable, 1 is enable.
* @param sample_rate: this parameter can be one of the following values:
* @arg ASR_8KHZ: sample rate is 8kHz
* @arg ASR_16KHZ: sample rate is 16kHz
* @arg ASR_32KHZ: sample rate is 32kHz
* @arg ASR_44p1KHZ: sample rate is 44.1kHz
* @arg ASR_48KHZ: sample rate is 48kHz
* @arg ASR_88p2KHZ: sample rate is 88.2kHz
* @arg ASR_96KHZ: sample rate is 96kHz
* @param coef_num Set the wind filter coefficient " n ".
* For the formula of Fc calculation is also shown as: Fc = (Fs * tan-1(a/(2-a))) / pi.
* Sample rate Fs = 8K/12K/16K, a = 2 ^(-6) (1 + n).
* Sample rate Fs = 24K/32K, a = 2 ^(-7) (1 + n).
* Sample rate Fs = 44.1K/48K, a = 2 ^(-8) (1 + n).
* Sample rate Fs = 88.2K/96K, a = 2 ^(-9) (1 + n).
* n (coef_num) is the coefficient.
* @retval none
*/
void audio_wind_filter (audio_t *obj, BOOL en, audio_sr sample_rate, u8 coef_num);
/**
* @brief Control the mic bias.
* @param obj: Audio object define in application software.
* @param en: 0 is disable, 1 is enable.
* @param voltage: Select the bias voltage.
* @arg 00: 0.9AVDD. (default)
* @arg 01: 0.86AVDD.
* @arg 10: 0.75AVDD.
* @arg 11: reserved.
* @retval none
*/
void audio_mic_bias_ctrl (audio_t *obj, BOOL en, audio_bias_voltage voltage);
/**
* @brief Control the amplifier of the headphone. The default value is enabled.
* @param obj: Audio object define in application software.
* @param en: 0 is disable, 1 is enable.
* @retval none
*/
void audio_hpo_amplifier (audio_t *obj, BOOL en);
/*\@}*/
#ifdef __cplusplus
}
#endif
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP)"
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/audio_api.h
|
C
|
apache-2.0
| 15,738
|
/*******************************************************************************
* Copyright (c) 2014, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*******************************************************************************/
#ifndef MBED_EXT_CHG_API_EXT_H
#define MBED_EXT_CHG_API_EXT_H
#if (defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) || (defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1))
///@name AmebaPro Only
///@{
#include "device.h"
#if defined (CONFIG_PLATFORM_8195BLP)
/** @addtogroup chg CHG
* @ingroup hal
* @brief chg functions
* @{
*/
///@name Ameba Common
///@{
typedef struct chg_s chg_t;
/**
* @brief Initializes the CHG registers with default parameters and run CHG state machine.
* @param obj: CHG object define in application software.
* @param cc: The Constant Current value, Uint:mA.
* @param cv: The Constant Voltage value, Uint:mV.
* @retval none
*/
void charger_sm(chg_t *obj, u16 cc, u16 cv);
///@}
/*\@}*/
#endif
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8195BLP)"
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/chg_api.h
|
C
|
apache-2.0
| 1,285
|
/** mbed Microcontroller Library
******************************************************************************
* @file cir_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed I2S API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_EXT_CIR_API_EXT_H
#define MBED_EXT_CIR_API_EXT_H
#if (defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) || (defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1))
///@name AmebaPro Only
///@{
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
NEC = 0x00,
SONY = 0x01,
PHILIPS = 0x02,
JVC = 0x03
} cir_protocol;
typedef enum {
INIT_OUTPUT_LOW = Init_Low,
INIT_OUTPUT_HIGH = Init_High
} cir_init_value;
typedef enum {
CIR_NO_CARRIER = No_Carrier,
CIR_CARRIER = Carrier
} cir_carrier;
typedef enum {
SCLK_DIV_AUTO = Auto
} cir_sclkdiv;
typedef enum {
STAT_SUCCESS = cir_success,
STAT_REPEAT = cir_repeat,
STAT_FAIL = cir_fail,
STAT_REPEAT_HEADER = cir_repeat_header
} cir_rx_status;
typedef enum {
NEC_NORMAL_TX = NEC_Tx_Normal,
NEC_REPEAT_TX = NEC_Tx_Repeat,
NEC_EXTEND_TX = NEC_Tx_Extend
} cir_nec_tx_format;
typedef enum {
NEC_NORMAL_RX = NEC_Rx_Normal,
NEC_EXTEND_RX = NEC_Rx_Extend
} cir_nec_rx_format;
typedef enum {
SONY_SIRC_12BITS = SonySIRC_12bits,
SONY_SIRC_15BITS = SonySIRC_15bits,
SONY_SIRC_20BITS = SonySIRC_20bits
} cir_sony_sirc_format;
typedef enum {
PHILIPS_RC5 = Philips_rc5_Normal,
} cir_philips_rc5_format;
typedef enum {
JVC_NORMAL_TX = Jvc_Tx_Normal,
JVC_REPEAT_HEADER_TX = Jvc_Tx_Repeat_Header,
JVC_REPEAT_NO_HEADER_TX = Jvc_Tx_Repeat_No_Header
} cir_jvc_tx_format;
typedef enum {
JVC_NORMAL_RX = Jvc_Rx_Normal,
} cir_jvc_rx_format;
typedef union {
__IOM uint32_t w;
struct {
__IOM uint32_t address : 8;
__IOM uint32_t command : 8;
} b;
} recv_nec_normal_format_t, *precv_nec_normal_format_t;
typedef union {
__IOM uint32_t w;
struct {
__IOM uint32_t address_l : 8;
__IOM uint32_t address_h : 8;
__IOM uint32_t command : 8;
} b;
} recv_nec_extend_format_t, *precv_nec_extend_format_t;
typedef union {
__IOM uint32_t w;
struct {
__IOM uint32_t command : 7;
__IOM uint32_t address : 5;
} b;
} recv_sony_src_12bits_t, *precv_sony_src_12bits_t;
typedef union {
__IOM uint32_t w;
struct {
__IOM uint32_t command : 7;
__IOM uint32_t address : 8;
} b;
} recv_sony_src_15bits_t, *precv_sony_src_15bits_t;
typedef union {
__IOM uint32_t w;
struct {
__IOM uint32_t command : 7;
__IOM uint32_t address : 5;
__IOM uint32_t extend : 8;
} b;
} recv_sony_src_20bits_t, *precv_sony_src_20bits_t;
typedef union {
__IOM uint32_t w;
struct {
__IOM uint32_t field : 1;
__IOM uint32_t toggle : 1;
__IOM uint32_t address : 5;
__IOM uint32_t command : 6;
} b;
} recv_philips_rc5_format_t, *precv_philips_rc5_format_t;
typedef union {
__IOM uint32_t w;
struct {
__IOM uint32_t address : 8;
__IOM uint32_t command : 8;
} b;
} recv_jvc_format_t, *precv_jvc_format_t;
/**
\brief Define the CIR symbol.
*/
enum cir_symbol_e {
SYMBOL_NONE_RX = 0x00,
SYMBOL_NONE_TX = 0x00,
SYMBOL01 = 0x01,
SYMBOL02 = 0x02,
SYMBOL03 = 0x03,
SYMBOL04 = 0x04,
SYMBOL05 = 0x05,
SYMBOL06 = 0x06,
SYMBOL07 = 0x07,
SYMBOL_END_TX = 0x08,
SYMBOL_NO_HEADER_TX = 0x08
};
typedef uint8_t cir_symbol_t;
/**
\brief The tx parameter table to describe the tx protocol .
*/
typedef struct cir_tx_protocol_s {
u32 carrier_frequency; /*!< Set the tx carrier frequency */
u16 symbol01_us; /*!< Set the symbol01 duration */
u16 symbol02_us; /*!< Set the symbol02 duration */
u16 symbol03_us; /*!< Set the symbol03 duration */
u16 symbol04_us; /*!< Set the symbol04 duration */
u16 symbol05_us; /*!< Set the symbol05 duration */
u16 symbol06_us; /*!< Set the symbol06 duration */
u16 symbol07_us; /*!< Set the symbol07 duration */
cir_symbol_t tx_start_first_symbol : 4; /*!< Set the first tx symbol of encoding the start symbol */
cir_symbol_t tx_start_second_symbol : 4; /*!< Set the second tx symbol of encoding the start symbol */
cir_symbol_t tx_bit0_first_symbol : 4; /*!< Set the first tx symbol of encoding bit0 */
cir_symbol_t tx_bit0_second_symbol : 4; /*!< Set the second tx symbol of encoding bit0 */
cir_symbol_t tx_bit1_first_symbol : 4; /*!< Set the first tx symbol of encoding bit1 */
cir_symbol_t tx_bit1_second_symbol : 4; /*!< Set the second tx symbol of encoding bit1 */
cir_symbol_t tx_end_first_symbol : 4; /*!< Set the first tx symbol of encoding the end symbol */
cir_symbol_t tx_end_second_symbol : 4; /*!< Set the second tx symbol of encoding the end symbol */
u8 symbol01_type : 1; /*!< Set symbol01 carrier, 0: No carrier. 1: Carrier. */
u8 symbol02_type : 1; /*!< Set symbol02 carrier, 0: No carrier. 1: Carrier. */
u8 symbol03_type : 1; /*!< Set symbol03 carrier, 0: No carrier. 1: Carrier. */
u8 symbol04_type : 1; /*!< Set symbol04 carrier, 0: No carrier. 1: Carrier. */
u8 symbol05_type : 1; /*!< Set symbol05 carrier, 0: No carrier. 1: Carrier. */
u8 symbol06_type : 1; /*!< Set symbol06 carrier, 0: No carrier. 1: Carrier. */
u8 symbol07_type : 1; /*!< Set symbol07 carrier, 0: No carrier. 1: Carrier. */
} cir_tx_protocol_t, *pcir_tx_protocol_t;
/**
\brief The rx parameter table to describe the rx protocol .
*/
typedef struct cir_rx_protocol_s {
u32 carrier_frequency; /*!< Set the rx carrier frequency */
u16 symbol01_us; /*!< Set the symbol01 duration */
u16 symbol02_us; /*!< Set the symbol02 duration */
u16 symbol03_us; /*!< Set the symbol03 duration */
u16 symbol04_us; /*!< Set the symbol04 duration */
u16 symbol05_us; /*!< Set the symbol05 duration */
u16 symbol06_us; /*!< Set the symbol06 duration */
u16 symbol07_us; /*!< Set the symbol07 duration */
u16 symbol08_us; /*!< Set the symbol08 duration */
cir_symbol_t rx_start_first_symbol_gp0 : 4; /*!< Start to decode the first symbol of the group 0 */
cir_symbol_t rx_start_second_symbol_gp0 : 4; /*!< Start to decode the second symbol of the group 0 */
cir_symbol_t rx_start_first_symbol_gp1 : 4; /*!< Start to decode the first symbol of the group 1 */
cir_symbol_t rx_start_second_symbol_gp1 : 4; /*!< Start to decode the second symbol of the group 1 */
cir_symbol_t rx_start_first_symbol_gp2 : 4; /*!< Start to decode the first symbol of the group 2 */
cir_symbol_t rx_start_second_symbol_gp2 : 4; /*!< Start to decode the second symbol of the group 2 */
cir_symbol_t rx_start_first_symbol_gp3 : 4; /*!< Start to decode the first symbol of the group 3 */
cir_symbol_t rx_start_second_symbol_gp3 : 4; /*!< Start to decode the second symbol of the group 3 */
cir_symbol_t rx_bit0_first_symbol_gp0 : 4; /*!< Set the first symbol of the group 0 to decode bit 0 */
cir_symbol_t rx_bit0_second_symbol_gp0 : 4; /*!< Set the second symbol of the group 0 to decode bit 0 */
cir_symbol_t rx_bit0_first_symbol_gp1 : 4; /*!< Set the first symbol of the group 1 to decode bit 0 */
cir_symbol_t rx_bit0_second_symbol_gp1 : 4; /*!< Set the second symbol of the group 1 to decode bit 0 */
cir_symbol_t rx_bit1_first_symbol_gp0 : 4; /*!< Set the first symbol of the group 0 to decode bit 1 */
cir_symbol_t rx_bit1_second_symbol_gp0 : 4; /*!< Set the second symbol of the group 0 to decode bit 1 */
cir_symbol_t rx_bit1_first_symbol_gp1 : 4; /*!< Set the first symbol of the group 1 to decode bit 1 */
cir_symbol_t rx_bit1_second_symbol_gp1 : 4; /*!< Set the second symbol of the group 1 to decode bit 1 */
cir_symbol_t rx_separate_symbol_in_gp0 : 4; /*!< Separate the rx symbol of the group 0 */
cir_symbol_t rx_separate_first_symbol_gp0 : 4; /*!< Set the first generated symbol of the group 0 */
cir_symbol_t rx_separate_second_symbol_gp0 : 4; /*!< Set the second generated symbol of the group 0 */
cir_symbol_t rx_separate_symbol_in_gp1 : 4; /*!< Separate the rx symbol of the group 1 */
cir_symbol_t rx_separate_first_symbol_gp1 : 4; /*!< Set the first generated symbol of the group 1 */
cir_symbol_t rx_separate_second_symbol_gp1 : 4; /*!< Set the second generated symbol of the group 1 */
u8 symbol01_type : 1; /*!< Set symbol01 carrier, 0: No carrier. 1: Carrier. */
u8 symbol02_type : 1; /*!< Set symbol02 carrier, 0: No carrier. 1: Carrier. */
u8 symbol03_type : 1; /*!< Set symbol03 carrier, 0: No carrier. 1: Carrier. */
u8 symbol04_type : 1; /*!< Set symbol04 carrier, 0: No carrier. 1: Carrier. */
u8 symbol05_type : 1; /*!< Set symbol05 carrier, 0: No carrier. 1: Carrier. */
u8 symbol06_type : 1; /*!< Set symbol06 carrier, 0: No carrier. 1: Carrier. */
u8 symbol07_type : 1; /*!< Set symbol07 carrier, 0: No carrier. 1: Carrier. */
u8 symbol08_type : 1; /*!< Set symbol08 carrier, 0: No carrier. 1: Carrier. */
} cir_rx_protocol_t, *pcir_rx_protocol_t;
typedef void (*cir_irq_handler)(void *);
typedef struct cir_s cir_t;
/**
* @brief Initializes the CIR device, include clock/function/interrupt/CIR registers.
* @param obj: CIR object define in application software.
* @param tx: Tx PinName according to pinmux spec. This pin is not configured when set PinName "NC".
* @param rx: Rx PinName according to pinmux spec. This pin is not configured when set PinName "NC".
* @retval none
*/
void cir_init (cir_t *obj, PinName tx, PinName rx);
/**
* @brief Deinitializes the CIR device, include function/interrupt/CIR registers.
* @param obj: CIR object define in application software.
* @retval none
*/
void cir_deinit (cir_t *obj);
/**
* @brief Set the protocol and tx parameters.
* @param obj: CIR object define in application software.
* @arg 0 : NEC protocol.
* @arg 1 : SONY protocol.
* @arg 2 : PHILIPS protocol.
* @arg 3 : JVC protocol.
* @param output_init: Set the initial output.
* @arg 0 : The output is low.
* @arg 1 : The output is high.
* @param carrier: Set the waveform with carrier or no carrier.
* @arg 0 : The carrier symbol has no carrier.
* @arg 1 : The carrier symbol has carrier.
* @param tx_sclkdiv: The divisor of the system clock to generate a proper tick time for the CIR carrier generation.
* @arg 0 : Generate the appropriate value automatically. (Suggestion)
* @arg 1 ~ 255 : SCLK / tx_sclkdiv.
* @param irq_tx_end_cb: User defined IRQ callback function. When finish the output, generate the interrupt.
* @param irq_tx_end_arg: User defined IRQ callback parameter.
* @param protocol: Set the protocol.
* @retval none
*/
void cir_set_tx_protocol (cir_t *obj, cir_protocol protocol, cir_init_value output_init, cir_carrier carrier, cir_sclkdiv tx_sclkdiv,
cir_irq_handler irq_tx_end_cb, void *irq_tx_end_arg);
/**
* @brief Set the protocol and tx parameters.
* @param obj: CIR object define in application software.
* @param protocol: Set the protocol.
* @arg 0 : NEC protocol.
* @arg 1 : SONY protocol.
* @arg 2 : PHILIPS protocol.
* @arg 3 : JVC protocol.
* @param output_init: Set the initial output.
* @arg 0 : The output is low.
* @arg 1 : The output is high.
* @param carrier: Set the waveform with carrier or no carrier.
* @arg 0 : The carrier symbol has no carrier.
* @arg 1 : The carrier symbol has carrier.
* @param rx_sclkdiv: The divisor of the system clock to generate a proper clock for the input sampling and trigger tick event.
* @arg 0 : Set the appropriate value automatically. (Suggestion)
* @arg 1 ~ 255 : SCLK / rx_sclkdiv.
* @param symbol_time_tolerance_us: Set the time tolerance for demodulating RX symbols. This unit is us.
* @param carrier_tolerance_cnt: Set the tolerance of carrier numbers for demodulating RX symbols.
* @arg 0 : This setting is "0" when this waveform is no carrier.
* @param check_frame_end_time_us: Set the end time after receiving the last symbol. This unit is us.
* @param irq_tx_end_cb: User defined IRQ callback function. When finish to receive data, generate the interrupt.
* @param irq_tx_end_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_set_rx_protocol (cir_t *obj, cir_protocol protocol, cir_init_value input_init, cir_carrier carrier, cir_sclkdiv rx_sclkdiv,
u16 symbol_time_tolerance_us, u16 carrier_tolerance_cnt, u16 check_frame_end_time_us,
cir_irq_handler irq_rx_end_cb, void *irq_rx_end_arg);
/**
* @brief Set the rx data pointer by using the normal NEC protocol.
* @param obj: CIR object define in application software.
* @param data: Rx data pointer.
* @retval none
*/
void cir_nec_recv_normal_format (cir_t *obj, u32 *data);
/**
* @brief Set the rx data pointer by using the extend NEC protocol.
* @param obj: CIR object define in application software.
* @param data: Rx data pointer.
* @retval none
*/
void cir_nec_recv_extend_format (cir_t *obj, u32 *data);
/**
* @brief Send the tx data by using the normal NEC protocol.
* @param obj: CIR object define in application software.
* @param address: The protocol address.
* @param command: The protocol command.
* @retval none
*/
void cir_nec_send_normal_format (cir_t *obj, u8 address, u8 command);
/**
* @brief Send the tx data by using the extend NEC protocol.
* @param obj: CIR object define in application software.
* @param address_l: The protocol high address.
* @param address_h: The protocol low address.
* @param command: The protocol command.
* @retval none
*/
void cir_nec_send_extend_format (cir_t *obj, u8 address_l, u8 address_h, u8 command);
/**
* @brief Send the repeat format by using the NEC protocol.
* @param obj: CIR object define in application software.
* @retval none
*/
void cir_nec_send_repeat_format (cir_t *obj);
/**
* @brief Monitor the specific rx data by using the normal NEC protocol, and generate the interrupt.
* @param obj: CIR object define in application software.
* @param address: Monitor this address.
* @param command: Monitor this command.
* @param irq_monitor_cb: User defined IRQ callback function.
* @param irq_monitor_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_monitor_nec_normal_format (cir_t *obj, u8 address, u8 command, cir_irq_handler irq_monitor_cb, void *irq_monitor_arg);
/**
* @brief Monitor the specific rx data by using the extend NEC protocol, and generate the interrupt.
* @param obj: CIR object define in application software.
* @param address_l: Monitor this low address.
* @param address_h: Monitor this high address.
* @param command: Monitor this command.
* @param irq_monitor_cb: User defined IRQ callback function.
* @param irq_monitor_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_monitor_nec_extend_format (cir_t *obj, u8 address_l, u8 address_h, u8 command, cir_irq_handler irq_monitor_cb, void *irq_monitor_arg);
/**
* @brief Get the address of the normal NEC protocol.
* @param obj: CIR object define in application software.
* @retval The 8-bit address.
*/
u8 cir_nec_get_normal_address (cir_t *obj);
/**
* @brief Get the command of the normal NEC protocol.
* @param obj: CIR object define in application software.
* @retval The 8-bit command.
*/
u8 cir_nec_get_normal_command (cir_t *obj);
/**
* @brief Get the address of the extend NEC protocol.
* @param obj: CIR object define in application software.
* @retval The 8-bit low address.
*/
u8 cir_nec_get_extend_address_low (cir_t *obj);
/**
* @brief Get the address of the extend NEC protocol.
* @param obj: CIR object define in application software.
* @retval The 8-bit high address.
*/
u8 cir_nec_get_extend_address_high (cir_t *obj);
/**
* @brief Get the command of the extend NEC protocol.
* @param obj: CIR object define in application software.
* @retval The 8-bit command.
*/
u8 cir_nec_get_extend_command (cir_t *obj);
/**
* @brief Set the rx data pointer by using the 12-bit SONY protocol.
* @param obj: CIR object define in application software.
* @param data: Rx data pointer.
* @retval none
*/
void cir_sony_recv_12bit_format (cir_t *obj, u32 *data);
/**
* @brief Set the rx data pointer by using the 15-bit SONY protocol.
* @param obj: CIR object define in application software.
* @param data: Rx data pointer.
* @retval none
*/
void cir_sony_recv_15bit_format (cir_t *obj, u32 *data);
/**
* @brief Set the rx data pointer by using the 20-bit SONY protocol.
* @param obj: CIR object define in application software.
* @param data: Rx data pointer.
* @retval none
*/
void cir_sony_recv_20bit_format (cir_t *obj, u32 *data);
/**
* @brief Send the tx data by using the 12-bit SONY protocol.
* @param obj: CIR object define in application software.
* @param address_5bits: The 5-bit address.
* @param command_7bits: The 7-bit command.
* @retval none
*/
void cir_sony_send_12bit_format (cir_t *obj, u8 address_5bits, u8 command_7bits);
/**
* @brief Send the tx data by using the 15-bit SONY protocol.
* @param obj: CIR object define in application software.
* @param address_8bits: The 8-bit address.
* @param command_7bits: The 7-bit command.
* @retval none
*/
void cir_sony_send_15bit_format (cir_t *obj, u8 address_8bits, u8 command_7bits);
/**
* @brief Send the tx data by using the 20-bit SONY protocol.
* @param obj: CIR object define in application software.
* @param address_5bits: The 5-bit address.
* @param command_7bits: The 7-bit command.
* @param extend_8bits: The 8-bit extend.
* @retval none
*/
void cir_sony_send_20bit_format (cir_t *obj, u8 address_5bits, u8 command_7bits, u8 extend_8bits);
/**
* @brief Monitor the specific rx data by using the 12-bit SONY protocol, and generate the interrupt.
* @param obj: CIR object define in application software.
* @param address_5bits: Monitor this 5-bit address.
* @param command_7bits: Monitor this 7-bit command.
* @param irq_monitor_cb: User defined IRQ callback function.
* @param irq_monitor_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_monitor_sony_12bit_format (cir_t *obj, u8 address_5bits, u8 command_7bits, cir_irq_handler irq_monitor_cb, void *irq_monitor_arg);
/**
* @brief Monitor the specific rx data by using the 15-bit SONY protocol, and generate the interrupt.
* @param obj: CIR object define in application software.
* @param address_8bits: Monitor this 8-bit address.
* @param command_7bits: Monitor this 7-bit command.
* @param irq_monitor_cb: User defined IRQ callback function.
* @param irq_monitor_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_monitor_sony_15bit_format (cir_t *obj, u8 address_8bits, u8 command_7bits, cir_irq_handler irq_monitor_cb, void *irq_monitor_arg);
/**
* @brief Monitor the specific rx data by using the 20-bit SONY protocol, and generate the interrupt.
* @param obj: CIR object define in application software.
* @param address_5bits: Monitor this 5-bit address.
* @param command_7bits: Monitor this 7-bit command.
* @param extend_8bits: Monitor this 8-bit extend.
* @param irq_monitor_cb: User defined IRQ callback function.
* @param irq_monitor_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_monitor_sony_20bit_format (cir_t *obj, u8 address_5bits, u8 command_7bits, u8 extend_8bits, cir_irq_handler irq_monitor_cb, void *irq_monitor_arg);
/**
* @brief Get the address of the 12-bit SONY protocol.
* @param obj: CIR object define in application software.
* @retval The 5-bit address.
*/
u8 cir_sony_get_12bit_format_address (cir_t *obj);
/**
* @brief Get the command of the 12-bit SONY protocol.
* @param obj: CIR object define in application software.
* @retval The 7-bit command.
*/
u8 cir_sony_get_12bit_format_command (cir_t *obj);
/**
* @brief Get the address of the 15-bit SONY protocol.
* @param obj: CIR object define in application software.
* @retval The 8-bit address.
*/
u8 cir_sony_get_15bit_format_address (cir_t *obj);
/**
* @brief Get the command of the 15-bit SONY protocol.
* @param obj: CIR object define in application software.
* @retval The 7-bit command.
*/
u8 cir_sony_get_15bit_format_command (cir_t *obj);
/**
* @brief Get the address of the 20-bit SONY protocol.
* @param obj: CIR object define in application software.
* @retval The 5-bit address.
*/
u8 cir_sony_get_20bit_format_address (cir_t *obj);
/**
* @brief Get the command of the 20-bit SONY protocol.
* @param obj: CIR object define in application software.
* @retval The 7-bit command.
*/
u8 cir_sony_get_20bit_format_command (cir_t *obj);
/**
* @brief Get the extend of the 20-bit SONY protocol.
* @param obj: CIR object define in application software.
* @retval The 8-bit extend.
*/
u8 cir_sony_get_20bit_format_extend (cir_t *obj);
/**
* @brief Set the rx data pointer by using the PHILIPS RC5 protocol.
* @param obj: CIR object define in application software.
* @param data: Rx data pointer.
* @retval none
*/
void cir_philips_rc5_recv_format (cir_t *obj, u32 *data);
/**
* @brief Send the tx data by using the PHILIPS RC5 protocol.
* @param obj: CIR object define in application software.
* @param field_1bits: The 1-bit field.
* @param toggle_1bits: The 1-bit toggle.
* @param address_5bits: The 5-bit address.
* @param command_6bits: The 6-bit command.
* @retval none
*/
void cir_philips_rc5_send_format (cir_t *obj, u8 field_1bits, u8 toggle_1bits, u8 address_5bits, u8 command_6bits);
/**
* @brief Monitor the specific rx data by using the PHILIPS RC5 protocol, and generate the interrupt.
* @param obj: CIR object define in application software.
* @param field_1bits: Monitor this 1-bit field.
* @param toggle_1bits: Monitor this 1-bit toggle.
* @param address_5bits: Monitor this 5-bit address.
* @param command_6bits: Monitor this 6-bit command.
* @param irq_monitor_cb: User defined IRQ callback function.
* @param irq_monitor_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_monitor_philips_rc5_format (cir_t *obj, u8 field_1bits, u8 toggle_1bits, u8 address_5bits, u8 command_6bits, cir_irq_handler irq_monitor_cb, void *irq_monitor_arg);
/**
* @brief Get the address of the PHILIPS RC5 protocol.
* @param obj: CIR object define in application software.
* @retval The 5-bit address.
*/
u8 cir_philips_rc5_get_address (cir_t *obj);
/**
* @brief Get the command of the PHILIPS RC5 protocol.
* @param obj: CIR object define in application software.
* @retval The 6-bit command.
*/
u8 cir_philips_rc5_get_command (cir_t *obj);
/**
* @brief Get the field of the PHILIPS RC5 protocol.
* @param obj: CIR object define in application software.
* @retval The 1-bit field.
*/
u8 cir_philips_rc5_get_format_field (cir_t *obj);
/**
* @brief Get the toggle of the PHILIPS RC5 protocol.
* @param obj: CIR object define in application software.
* @retval The 1-bit toggle.
*/
u8 cir_philips_rc5_get_format_toggle (cir_t *obj);
/**
* @brief Set the rx data pointer by using the JVC protocol.
* @param obj: CIR object define in application software.
* @param data: Rx data pointer.
* @retval none
*/
void cir_jvc_recv_format (cir_t *obj, u32 *data);
/**
* @brief Send the tx data by using the normal format of the JVC protocol.
* @param obj: CIR object define in application software.
* @param address_8bits: The 8-bit address.
* @param command_8bits: The 8-bit command.
* @retval none
*/
void cir_jvc_send_normal_format (cir_t *obj, u8 address_8bits, u8 command_8bits);
/**
* @brief Send the tx data by using the header and repeat format of the JVC protocol.
* @param obj: CIR object define in application software.
* @param address_8bits: The 8-bit address.
* @param command_8bits: The 8-bit command.
* @retval none
*/
void cir_jvc_send_repeat_header_format (cir_t *obj, u8 address_8bits, u8 command_8bits);
/**
* @brief Send the tx data by using the repeat format of the JVC protocol.
* @param obj: CIR object define in application software.
* @param address_8bits: The 8-bit address.
* @param command_8bits: The 8-bit command.
* @retval none
*/
void cir_jvc_send_repeat_no_header_format (cir_t *obj, u8 address_8bits, u8 command_8bits);
/**
* @brief Monitor the specific rx data by using the JVC protocol, and generate the interrupt.
* @param obj: CIR object define in application software.
* @param address_8bits: Monitor this 8-bit address.
* @param command_8bits: Monitor this 8-bit command.
* @param irq_monitor_cb: User defined IRQ callback function.
* @param irq_monitor_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_monitor_jvc_format (cir_t *obj, u8 address_8bits, u8 command_8bits, cir_irq_handler irq_monitor_cb, void *irq_monitor_arg);
/**
* @brief Get the address of the JVC protocol.
* @param obj: CIR object define in application software.
* @retval The 8-bit address.
*/
u8 cir_jvc_get_address (cir_t *obj);
/**
* @brief Get the command of the JVC protocol.
* @param obj: CIR object define in application software.
* @retval The 8-bit command.
*/
u8 cir_jvc_get_command (cir_t *obj);
/**
* @brief Get the receiving status by using NEC, SONY, PHILIPS RC5, or JVC protocol.
* @param obj: CIR object define in application software.
* @retval STAT_SUCCESS: The receiving is the normal format.
* @retval STAT_REPEAT: The receiving is the repeat format.
* @retval STAT_FAIL: The receiving is failed.
* @retval STAT_REPEAT_HEADER: The receiving is the header and repeat format of the JVC protocol.
*/
cir_rx_status cir_get_protocol_rx_status (cir_t *obj);
/**
* @brief Monitor the specific rx data, and generate the interrupt.
* @param obj: CIR object define in application software.
* @param en: To enable or disable.
* @param monitor_data: Monitor the data.
* @param monitor_cnt: Monitor the bit length. Monitor counts 1~32 from the LSB. 0 is inactive.
* @param irq_monitor_cb: User defined IRQ callback function.
* @param irq_monitor_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_recv_monitor_mode (cir_t *obj, BOOL en, u32 monitor_data, u32 monitor_cnt, cir_irq_handler monitor_cb, void *pmonitor_arg);
/**
* @brief Make the new tx protocol.
* @param obj: CIR object define in application software.
* @param ptx_protocol: Set the tx protocol table.
* @param output_init - Set the tx initial level.
* @param carrier - Let the carrier symbol of the tx protocol table generate the carrier.
* @arg 0 : The carrier symbol has no carrier.
* @arg 1 : The carrier symbol has carrier.
* @param tx_sclkdiv: The divisor of the system clock is to generate a proper tick time for the CIR carrier generation.
* @arg 0 : Generate the appropriate value automatically. (Suggestion)
* @arg 1 ~ 255 : SCLK / tx_sclkdiv.
* @param irq_tx_end_cb: User defined IRQ callback function.
* @param irq_tx_end_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_make_tx_protocol (cir_t *obj, cir_tx_protocol_t *ptx_protocol, cir_init_value output_init, cir_carrier carrier, cir_sclkdiv tx_sclkdiv,
cir_irq_handler irq_tx_end_cb, void *irq_tx_end_arg);
/**
* @brief Change the tx start symbol of tx protocol table according to the protocol header.
* @param obj: CIR object define in application software.
* @param first_symbol: Set the tx protocol table.
* @param second_symbol: Set the tx protocol table.
* @retval none
*/
void cir_change_tx_start_symbol (cir_t *obj, cir_symbol_t first_symbol, cir_symbol_t second_symbol);
/**
* @brief Change the tx bit0 symbol of tx protocol table.
* @param obj: CIR object define in application software.
* @param first_symbol: Set the tx protocol table.
* @param second_symbol: Set the tx protocol table.
* @retval none
*/
void cir_change_tx_bit0_symbol (cir_t *obj, cir_symbol_t first_symbol, cir_symbol_t second_symbol);
/**
* @brief Change the tx bit1 symbol of tx protocol table.
* @param obj: CIR object define in application software.
* @param first_symbol: Set the tx protocol table.
* @param second_symbol: Set the tx protocol table.
* @retval none
*/
void cir_change_tx_bit1_symbol (cir_t *obj, cir_symbol_t first_symbol, cir_symbol_t second_symbol);
/**
* @brief Change the tx end symbol of tx protocol table.
* @param obj: CIR object define in application software.
* @param first_symbol: Set the tx protocol table.
* @param second_symbol: Set the tx protocol table.
* @retval none
*/
void cir_change_tx_end_symbol (cir_t *obj, cir_symbol_t first_symbol, cir_symbol_t second_symbol);
/**
* @brief Send the tx data.
* @param obj: CIR object define in application software.
* @param data : The TX data pinter.
* @param length: The TX data length.
* @retval none
*/
void cir_send_make_protocol (cir_t *obj, u32 *data, u32 length);
/**
* @brief Set the protocol and tx parameters.
* @param obj: CIR object define in application software.
* @param prx_protocol: Set the rx protocol table.
* @param output_init: Set the initial output.
* @arg 0 : The output is low.
* @arg 1 : The output is high.
* @param carrier: Set the waveform with carrier or no carrier.
* @arg 0 : The carrier symbol has no carrier.
* @arg 1 : The carrier symbol has carrier.
* @param rx_sclkdiv: The divisor of the system clock to generate a proper clock for the input sampling and trigger tick event.
* @arg 0 : Set the appropriate value automatically. (Suggestion)
* @arg 1 ~ 255 : SCLK / rx_sclkdiv.
* @param symbol_time_tolerance_us: Set the time tolerance for demodulating RX symbols. This unit is us.
* @param carrier_tolerance_cnt: Set the tolerance of carrier numbers for demodulating RX symbols.
* @arg 0 : This setting is "0" when this waveform is no carrier.
* @param check_frame_end_time_us: Set the end time after receiving the last symbol. This unit is us.
* @param irq_tx_end_cb: User defined IRQ callback function. When finish to receive data, generate the interrupt.
* @param irq_tx_end_arg: User defined IRQ callback parameter.
* @retval none
*/
void cir_make_rx_protocol (cir_t *obj, cir_rx_protocol_t *prx_protocol, cir_init_value input_init, cir_carrier carrier, cir_sclkdiv rx_sclkdiv,
u16 symbol_time_tolerance_us, u16 carrier_tolerance_cnt, u16 check_frame_end_time_us,
cir_irq_handler irq_rx_end_cb, void *irq_rx_end_arg);
/**
* @brief Set the rx data pointer.
* @param obj: CIR object define in application software.
* @param data: Set the RX data pointer.
* @param data_32bits_num: Set the limit number of RX data, and the unit is 32 bits.
* @arg 0 : Do nothing.
* @arg 1 : the limit number <= 32bits.
* @arg 2 : 32bits < the limit number <= 64bits.
* @arg 3 : ...
* @arg n : (32*(n-1))bits < the limit number <= (32*n)bits.
* @retval none
*/
void cir_recv_make_protocol (cir_t *obj, u32 *data, u32 data_32bits_num);
/**
* @brief Get the number of decoded bits when receive the data.
* @param obj: CIR object define in application software.
* @retval The number of decoded bits.
*/
u32 cir_recv_bit_length (cir_t *obj);
/**
* @brief Check the matching status in order to recognize the decoding start-symbol.
* That is to say, use to recognize the different header.
* @param obj: CIR object define in application software.
* @retval The start matching status. 0: Not match the decoding symbols of group 0, 1: Match the decoding symbols of group 0.
*/
BOOL cir_get_start_match_gp0_status (cir_t *obj);
/**
* @brief Check the matching status in order to recognize the decoding start-symbol.
* That is to say, use to recognize the different header.
* @param obj: CIR object define in application software.
* @retval The start matching status. 0: Not match the decoding symbols of group 1, 1: Match the decoding symbols of group 1.
*/
BOOL cir_get_start_match_gp1_status (cir_t *obj);
/**
* @brief Reset CIR and registers.
* @retval none
*/
void cir_reset (void);
/*\@}*/
#ifdef __cplusplus
}
#endif
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8195BLP)"
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/cir_api.h
|
C
|
apache-2.0
| 34,041
|
/** mbed Microcontroller Library
******************************************************************************
* @file crypto_api.h
* @brief This file provides mbed API for CRYPTO.
*
* @author
* @version V1.0.0
* @date 2017-12-11
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_CRYPTO_API_H
#define MBED_CRYPTO_API_H
#if defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)
///@name AmebaPro Only
///@{
#include "device.h"
#include "basic_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**************[Error index]***********************************
*
* _ERRNO_CRYPTO_DESC_NUM_SET_OutRange -2
* _ERRNO_CRYPTO_BURST_NUM_SET_OutRange -3
* _ERRNO_CRYPTO_NULL_POINTER -4
* _ERRNO_CRYPTO_ENGINE_NOT_INIT -5
* _ERRNO_CRYPTO_ADDR_NOT_32Byte_Aligned -6
* _ERRNO_CRYPTO_KEY_OutRange -7
* _ERRNO_CRYPTO_MSG_OutRange -8
* _ERRNO_CRYPTO_IV_OutRange -9
* _ERRNO_CRYPTO_AAD_OutRange -10
* _ERRNO_CRYPTO_AUTH_TYPE_NOT_MATCH -11
* _ERRNO_CRYPTO_CIPHER_TYPE_NOT_MATCH -12
* _ERRNO_CRYPTO_KEY_IV_LEN_DIFF -13
* _ERRNO_CRYPTO_AES_MSGLEN_NOT_16Byte_Aligned -14
* _ERRNO_CRYPTO_CHACHA_MSGLEN_NOT_16Byte_Aligned -15
* _ERRNO_CRYPTO_DES_MSGLEN_NOT_8Byte_Aligned -16
* _ERRNO_CRYPTO_HASH_FINAL_NO_UPDATE -17
* _ERRNO_CRYPTO_CACHE_HANDLE -18
* _ERRNO_CRYPTO_CIPHER_DECRYPT_MSGLEN_NOT_8Byte_Aligned -19
*
*
**************************************************************/
/**
* @brief Define SHA2 different type
* used for compatible ameba1 sha2 APIs
*/
typedef enum _SHA2_TYPE_ {
MBED_SHA2_NONE = 0,
MBED_SHA2_224 = 224/8,
MBED_SHA2_256 = 256/8,
MBED_SHA2_384 = 384/8,
MBED_SHA2_512 = 512/8
} SHA2_TYPE;
/** @addtogroup crypto CRYPTO
* @ingroup hal
* @brief crypto functions
* @{
*/
/// Crypto doesn't support this feature.
#define _ERRNO_CRYPTO_NOT_SUPPORT_THIS_FEATURE -30
///@name Ameba Common
///@{
// Ameba_pro mbed api
//Crypto engine init/deinit
/**
* @brief Initializes the CRYPTO, including clock/function/interrupt/CRYPTO Engine registers.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_init(void);
/**
* @brief Deinitializes the CRYPTO, including clock/function/interrupt/CRYPTO Engine registers.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_deinit(void);
//Auth md5
/**
* @brief MD5 message digest algorithm (hash function).
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of MD5 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_md5(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Initializes the MD5 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_md5_init(void);
/**
* @brief MD5 process buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of MD5 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_md5_process(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Update MD5 with new buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_md5_update(const uint8_t *message, const uint32_t msglen);
/**
* @brief Get MD5 final hash result.
* @param pDigest: the result buffer of MD5 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_md5_final(uint8_t *pDigest);
//Auth SHA1
/**
* @brief SHA1 message digest algorithm (hash function).
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of SHA1 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha1(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Initializes the SHA1 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha1_init(void);
/**
* @brief SHA1 process buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of SHA1 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha1_process(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Update SHA1 with new buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha1_update(const uint8_t *message, const uint32_t msglen);
/**
* @brief Get SHA1 final hash result.
* @param pDigest: the result buffer of SHA1 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha1_final(uint8_t *pDigest);
//Auth SHA2_224
/**
* @brief SHA2_224 message digest algorithm (hash function).
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of SHA2_224 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha2_224(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Initializes the SHA2_224 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha2_224_init(void);
/**
* @brief SHA2_224 process buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of SHA2_224 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha2_224_process(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Update SHA2_224 with new buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha2_224_update(const uint8_t *message, const uint32_t msglen);
/**
* @brief Get SHA2_224 final hash result.
* @param pDigest: the result buffer of SHA2_224 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha2_224_final(uint8_t *pDigest);
//Auth SHA2_256
/**
* @brief SHA2_256 message digest algorithm (hash function).
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of SHA2_256 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha2_256(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Initializes the SHA2_256 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha2_256_init(void);
/**
* @brief SHA2_256 process buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of SHA2_256 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha2_256_process(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Update SHA2_256 with new buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha2_256_update(const uint8_t *message, const uint32_t msglen);
/**
* @brief Get SHA2_256 final hash result.
* @param pDigest: the result buffer of SHA2_256 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_sha2_256_final(uint8_t *pDigest);
//Auth HMAC_MD5
/**
* @brief HMAC_MD5 message digest algorithm (hash function).
* @param message: input buffer.
* @param msglen: input buffer length.
* @param key: HMAC secret key buffer.
* @param keylen: length of the HMAC key.
* @param pDigest: the result buffer of HMAC_MD5 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_md5(const uint8_t *message, const uint32_t msglen,
const uint8_t *key, const uint32_t keylen, uint8_t *pDigest);
/**
* @brief Initializes the HMAC-MD5 function.
* @param key: HMAC secret key buffer.
* @param keylen: length of the HMAC key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_md5_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief HMAC_MD5 process buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of HMAC_MD5 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_md5_process(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Update HMAC_MD5 with new buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_md5_update(const uint8_t *message, const uint32_t msglen);
/**
* @brief Get HMAC_MD5 final hash result.
* @param pDigest: the result buffer of HMAC_MD5 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_md5_final(uint8_t *pDigest);
//Auth HMAC_SHA1
/**
* @brief HMAC_SHA1 message digest algorithm (hash function).
* @param message: input buffer.
* @param msglen: input buffer length.
* @param key: HMAC secret key buffer.
* @param keylen: length of the HMAC key.
* @param pDigest: the result buffer of HMAC_SHA1 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha1(const uint8_t *message, const uint32_t msglen,
const uint8_t *key, const uint32_t keylen, uint8_t *pDigest);
/**
* @brief Initializes the HMAC_SHA1 function.
* @param key: HMAC secret key buffer.
* @param keylen: length of the HMAC key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha1_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief HMAC_SHA1 process buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of HMAC_SHA1 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha1_process(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Update HMAC_SHA1 with new buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha1_update(const uint8_t *message, const uint32_t msglen);
/**
* @brief Get HMAC_SHA1 final hash result.
* @param pDigest: the result buffer of HMAC_SHA1 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha1_final(uint8_t *pDigest);
//Auth HMAC_SHA2_224
/**
* @brief HMAC_SHA2_224 message digest algorithm (hash function).
* @param message: input buffer.
* @param msglen: input buffer length.
* @param key: HMAC secret key buffer.
* @param keylen: length of the HMAC key.
* @param pDigest: the result buffer of HMAC_SHA2_224 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha2_224(const uint8_t *message, const uint32_t msglen,
const uint8_t *key, const uint32_t keylen, uint8_t *pDigest);
/**
* @brief Initializes the HMAC_SHA2_224 function.
* @param key: HMAC secret key buffer.
* @param keylen: length of the HMAC key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha2_224_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief HMAC_SHA2_224 process buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of HMAC_SHA2_224 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha2_224_process(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Update HMAC_SHA2_224 with new buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha2_224_update(const uint8_t *message, const uint32_t msglen);
/**
* @brief Get HMAC_SHA2_224 final hash result.
* @param pDigest: the result buffer of HMAC_SHA2_224 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha2_224_final(uint8_t *pDigest);
//Auth HMAC_SHA2_256
/**
* @brief HMAC_SHA2_256 message digest algorithm (hash function).
* @param message: input buffer.
* @param msglen: input buffer length.
* @param key: HMAC secret key buffer.
* @param keylen: length of the HMAC key.
* @param pDigest: the result buffer of HMAC_SHA2_256 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha2_256(const uint8_t *message, const uint32_t msglen,
const uint8_t *key, const uint32_t keylen, uint8_t *pDigest);
/**
* @brief Initializes the HMAC_SHA2_256 function.
* @param key: HMAC secret key buffer.
* @param keylen: length of the HMAC key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha2_256_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief HMAC_SHA2_256 process buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of HMAC_SHA2_256 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha2_256_process(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest);
/**
* @brief Update HMAC_SHA2_256 with new buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha2_256_update(const uint8_t *message, const uint32_t msglen);
/**
* @brief Get HMAC_SHA2_256 final hash result.
* @param pDigest: the result buffer of HMAC_SHA2_256 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_hmac_sha2_256_final(uint8_t *pDigest);
// DES-CBC
/**
* @brief Initializes the DES-CBC function with a secret key.
* @param key: secret key buffer.
* @param keylen: length of the key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_des_cbc_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief DES-CBC buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of DES-CBC encrypt function(Ciphertext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_des_cbc_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
/**
* @brief DES-CBC buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of DES-CBC decrypt function(Plaintext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_des_cbc_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
// DES-ECB
/**
* @brief Initializes the DES-ECB function with a secret key.
* @param key: secret key buffer.
* @param keylen: length of the key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_des_ecb_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief DES-ECB buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of DES-ECB encrypt function(Ciphertext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_des_ecb_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
/**
* @brief DES-ECB buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of DES-ECB decrypt function(Plaintext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_des_ecb_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
// 3DES-CBC
/**
* @brief Initializes the 3DES-CBC function with a secret key.
* @param key: secret key buffer.
* @param keylen: length of the key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_3des_cbc_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief 3DES-CBC buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of 3DES-CBC encrypt function(Ciphertext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_3des_cbc_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
/**
* @brief 3DES-CBC buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of 3DES-CBC decrypt function(Plaintext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_3des_cbc_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
// 3DES-ECB
/**
* @brief Initializes the 3DES-ECB function with a secret key.
* @param key: secret key buffer.
* @param keylen: length of the key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_3des_ecb_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief 3DES-ECB buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of 3DES-ECB encrypt function(Ciphertext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_3des_ecb_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
/**
* @brief 3DES-ECB buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of 3DES-ECB decrypt function(Plaintext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_3des_ecb_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
// AES-CBC
/**
* @brief Initializes the AES-CBC function with a secret key.
* @param key: secret key buffer.
* @param keylen: length of the key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_cbc_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief AES-CBC buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult the result buffer of AES-CBC encrypt function(Ciphertext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_cbc_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
/**
* @brief AES-CBC buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of AES-CBC decrypt function(Plaintext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_cbc_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
// AES-ECB
/**
* @brief Initializes the AES-ECB function with a secret key.
* @param key: secret key buffer.
* @param keylen: length of the key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_ecb_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief AES-ECB buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of AES-ECB encrypt function(Ciphertext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_ecb_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
/**
* @brief AES-ECB buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of AES-ECB decrypt function(Plaintext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_ecb_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
// AES-CTR
/**
* @brief Initializes the AES-CTR function with a secret key.
* @param key: secret key buffer.
* @param keylen: length of the key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_ctr_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief AES-CTR buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of AES-CTR encrypt function(Ciphertext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_ctr_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
/**
* @brief AES-CTR buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of AES-CTR decrypt function(Plaintext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_ctr_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
// AES-CFB
/**
* @brief Initializes the AES-CFB function with a secret key.
* @param key: secret key buffer.
* @param keylen: length of the key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_cfb_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief AES-CFB buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of AES-CFB encrypt function(Ciphertext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_cfb_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
/**
* @brief AES-CFB buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of AES-CFB decrypt function(Plaintext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_cfb_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
// AES-OFB
/**
* @brief Initializes the AES-OFB function with a secret key.
* @param key: secret key buffer.
* @param keylen: length of the key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_ofb_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief AES-OFB buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of AES-OFB encrypt function(Ciphertext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_ofb_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
/**
* @brief AES-OFB buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param ivlen: length of the initial vector.
* @param pResult: the result buffer of AES-OFB decrypt function(Plaintext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_ofb_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t ivlen,
uint8_t *pResult);
// AES-GCM
/**
* @brief Initializes the AES-GCM function with a secret key.
* @param key: secret key buffer.
* @param keylen: length of the key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_gcm_init(const uint8_t *key, const uint32_t keylen);
/**
* @brief AES-GCM buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param aad: additional data buffer.
* @param aadlen: length of additional data.
* @param pResult: the result buffer of AES-GCM encrypt function(Ciphertext).
* @param pTag: buffer for holding the tag(Authentication code).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_gcm_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv,
const uint8_t *aad, const uint32_t aadlen,
uint8_t *pResult, uint8_t *pTag);
/**
* @brief AES-GCM buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param aad: additional data buffer.
* @param aadlen: length of additional data.
* @param pResult: the result buffer of AES-GCM decrypt function(Plaintext).
* @param pTag: buffer for holding the tag(Authentication code).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_aes_gcm_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv,
const uint8_t *aad, const uint32_t aadlen,
uint8_t *pResult, uint8_t *pTag);
// CHACHA20
/**
* @brief Initializes the Chacha20 function with a secret key.
* @param key: secret key buffer.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_chacha_init(const uint8_t *key);
/**
* @brief Chacha20 buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param count: initial counter value.
* @param pResult: the result buffer of Chacha20 encrypt function(Ciphertext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_chacha_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t count,
uint8_t *pResult);
/**
* @brief Chacha20 buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param iv: buffer holding the initial vector data.
* @param count: initial counter value.
* @param pResult: the result buffer of Chacha20 decrypt function(Plaintext).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_chacha_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *iv, const uint32_t count,
uint8_t *pResult);
// POLY1305
/**
* @brief Poly1305 message digest algorithm.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param key: secret key buffer.
* @param pDigest: the result buffer of Poly1305 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_poly1305(
const uint8_t *message, const uint32_t msglen,
const uint8_t *key,
uint8_t *pDigest);
/**
* @brief Initializes the Poly1305 function with a secret key.
* @param key: secret key buffer.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_poly1305_init(const uint8_t *key);
/**
* @brief Poly1305 process buffer.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param pDigest: the result buffer of Poly1305 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_poly1305_process(
const uint8_t *message, const uint32_t msglen,
uint8_t *pDigest);
// CHACHA+POLY1305
/**
* @brief Initializes the Chacha20_Poly1305 function with a secret key.
* @param key: secret key buffer.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_chacha_poly1305_init(const uint8_t *key);
/**
* @brief Chacha20_Poly1305 buffer encryption.
* @param message: input buffer(Plaintext).
* @param msglen: input buffer length.
* @param nonce: numbers used once buffer.
* @param aad: additional data buffer.
* @param aadlen: length of additional data.
* @param pResult: the result buffer of Chacha20_Poly1305 encrypt function(Ciphertext).
* @param pTag: buffer for holding the tag(Authentication code).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_chacha_poly1305_encrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *nonce,
const uint8_t *aad, const uint32_t aadlen,
uint8_t *pResult, uint8_t *pTag);
/**
* @brief Chacha20_Poly1305 buffer decryption.
* @param message: input buffer(Ciphertext).
* @param msglen: input buffer length.
* @param nonce: numbers used once buffer.
* @param aad: additional data buffer.
* @param aadlen: length of additional data.
* @param pResult: the result buffer of Chacha20_Poly1305 decrypt function(Plaintext).
* @param pTag: buffer for holding the tag(Authentication code).
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_chacha_poly1305_decrypt(
const uint8_t *message, const uint32_t msglen,
const uint8_t *nonce,
const uint8_t *aad, const uint32_t aadlen,
uint8_t *pResult, uint8_t *pTag);
// crc
/**
* @brief Calculate CRC32 value using command mode.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pResult: the result value of CRC32.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_crc32_cmd(const uint8_t *message, const uint32_t msglen, uint32_t *pCrc);
/**
* @brief Calculate CRC32 value using DMA mode.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pResult: the result value of CRC32.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_crc32_dma(const uint8_t *message, const uint32_t msglen, uint32_t *pCrc);
/**
* @brief Set the CRC basic parameters
* @param order: CRC polynomial order
* @param polynom: CRC polynomial coefficients
* @param crcinit: CRC initial value
* @param crcxor: CRC XOR output value
* @param refin: CRC input swap value
* @param refout: CRC output swap value
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_crc_setting(int order, unsigned long polynom, unsigned long crcinit,
unsigned long crcxor, int refin, int refout);
/**
* @brief Calculate CRC value using command mode.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pResult: the result value of CRC.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_crc_cmd(const uint8_t *message, const uint32_t msglen, uint32_t *pCrc);
/**
* @brief Calculate CRC value using DMA mode.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pResult: the result value of CRC.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
int crypto_crc_dma(const uint8_t *message, const uint32_t msglen, uint32_t *pCrc);
///@}
/*\@}*/
//----------------------------------------------------------------------------------//
// Compatible with Ameba1 hal apis
// Redefine function for Ameba1 crypto hal APIs
/// Redefine Ameba1 crypto initialize function.
#define rtl_cryptoEngine_init crypto_init
/// Redefine Ameba1 crypto md5 hash function.
#define rtl_crypto_md5 crypto_md5
/// Redefine Ameba1 crypto md5 hash initialize function.
#define rtl_crypto_md5_init crypto_md5_init
/// Redefine Ameba1 crypto md5 hash process function.
#define rtl_crypto_md5_process crypto_md5_process
/// Redefine Ameba1 crypto sha1 hash function.
#define rtl_crypto_sha1 crypto_sha1
/// Redefine Ameba1 crypto sha1 hash initialize function.
#define rtl_crypto_sha1_init crypto_sha1_init
/// Redefine Ameba1 crypto sha1 hash process function.
#define rtl_crypto_sha1_process crypto_sha1_process
/// Redefine Ameba1 crypto hmac_md5 hash function.
#define rtl_crypto_hmac_md5 crypto_hmac_md5
/// Redefine Ameba1 crypto hmac_md5 hash initialize function.
#define rtl_crypto_hmac_md5_init crypto_hmac_md5_init
/// Redefine Ameba1 crypto hmac_md5 hash process function.
#define rtl_crypto_hmac_md5_process crypto_hmac_md5_process
/// Redefine Ameba1 crypto hmac_sha1 hash function.
#define rtl_crypto_hmac_sha1 crypto_hmac_sha1
/// Redefine Ameba1 crypto hmac_sha1 hash initialize function.
#define rtl_crypto_hmac_sha1_init crypto_hmac_sha1_init
/// Redefine Ameba1 crypto hmac_sha1 hash process function.
#define rtl_crypto_hmac_sha1_process crypto_hmac_sha1_process
/// Redefine Ameba1 crypto des_cbc cipher initialize function.
#define rtl_crypto_des_cbc_init crypto_des_cbc_init
/// Redefine Ameba1 crypto des_cbc cipher encrypt function.
#define rtl_crypto_des_cbc_encrypt crypto_des_cbc_encrypt
/// Redefine Ameba1 crypto des_cbc cipher decrypt function.
#define rtl_crypto_des_cbc_decrypt crypto_des_cbc_decrypt
/// Redefine Ameba1 crypto des_ecb cipher initialize function.
#define rtl_crypto_des_ecb_init crypto_des_ecb_init
/// Redefine Ameba1 crypto des_ecb cipher encrypt function.
#define rtl_crypto_des_ecb_encrypt crypto_des_ecb_encrypt
/// Redefine Ameba1 crypto des_ecb cipher decrypt function.
#define rtl_crypto_des_ecb_decrypt crypto_des_ecb_decrypt
/// Redefine Ameba1 crypto 3des_cbc cipher initialize function.
#define rtl_crypto_3des_cbc_init crypto_3des_cbc_init
/// Redefine Ameba1 crypto 3des_cbc cipher encrypt function.
#define rtl_crypto_3des_cbc_encrypt crypto_3des_cbc_encrypt
/// Redefine Ameba1 crypto 3des_cbc cipher decrypt function.
#define rtl_crypto_3des_cbc_decrypt crypto_3des_cbc_decrypt
/// Redefine Ameba1 crypto 3des_ecb cipher initialize function.
#define rtl_crypto_3des_ecb_init crypto_3des_ecb_init
/// Redefine Ameba1 crypto 3des_ecb cipher encrypt function.
#define rtl_crypto_3des_ecb_encrypt crypto_3des_ecb_encrypt
/// Redefine Ameba1 crypto 3des_ecb cipher decrypt function.
#define rtl_crypto_3des_ecb_decrypt crypto_3des_ecb_decrypt
/// Redefine Ameba1 crypto aes_cbc cipher initialize function.
#define rtl_crypto_aes_cbc_init crypto_aes_cbc_init
/// Redefine Ameba1 crypto aes_cbc cipher encrypt function.
#define rtl_crypto_aes_cbc_encrypt crypto_aes_cbc_encrypt
/// Redefine Ameba1 crypto aes_cbc cipher decrypt function.
#define rtl_crypto_aes_cbc_decrypt crypto_aes_cbc_decrypt
/// Redefine Ameba1 crypto aes_ecb cipher initialize function.
#define rtl_crypto_aes_ecb_init crypto_aes_ecb_init
/// Redefine Ameba1 crypto aes_ecb cipher encrypt function.
#define rtl_crypto_aes_ecb_encrypt crypto_aes_ecb_encrypt
/// Redefine Ameba1 crypto aes_ecb cipher decrypt function.
#define rtl_crypto_aes_ecb_decrypt crypto_aes_ecb_decrypt
/// Redefine Ameba1 crypto aes_ctr cipher initialize function.
#define rtl_crypto_aes_ctr_init crypto_aes_ctr_init
/// Redefine Ameba1 crypto aes_ctr cipher encrypt function.
#define rtl_crypto_aes_ctr_encrypt crypto_aes_ctr_encrypt
/// Redefine Ameba1 crypto aes_ctr cipher decrypt function.
#define rtl_crypto_aes_ctr_decrypt crypto_aes_ctr_decrypt
/**
* @brief Compatible function: Ameba1 SHA2 message digest algorithm (hash function).
* @param sha2type: different sha2 type.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of SHA2 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
* @note Input sha2 type:
* - SHA2_224: (224/8)
* - SHA2_256: (256/8)
*/
__STATIC_INLINE int rtl_crypto_sha2(const SHA2_TYPE sha2type, const uint8_t *message,
const uint32_t msglen, uint8_t *pDigest)
{
if (sha2type == MBED_SHA2_224) {
return crypto_sha2_224(message, msglen, pDigest);
} else if (sha2type == MBED_SHA2_256) {
return crypto_sha2_256(message, msglen, pDigest);
}else {
return _ERRNO_CRYPTO_NOT_SUPPORT_THIS_FEATURE;
}
}
/**
* @brief Compatible function: Ameba1 initializes the SHA2 function.
* @param sha2type: different sha2 type.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
* @note Input sha2 type:
* - SHA2_224: (224/8)
* - SHA2_256: (256/8)
*/
__STATIC_INLINE int rtl_crypto_sha2_init(const SHA2_TYPE sha2type)
{
if (sha2type == MBED_SHA2_224) {
return crypto_sha2_224_init();
} else if (sha2type == MBED_SHA2_256) {
return crypto_sha2_256_init();
}else {
return _ERRNO_CRYPTO_NOT_SUPPORT_THIS_FEATURE;
}
}
/**
* @brief Compatible function: Ameba1 SHA2 process buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of SHA2 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
__STATIC_INLINE int rtl_crypto_sha2_process(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest)
{
return crypto_sha2_256_process(message, msglen, pDigest);
}
/**
* @brief Compatible function: Ameba1 HMAC_SHA2 message digest algorithm (hash function).
* @param sha2type: different sha2 type.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param key: HMAC secret key buffer.
* @param keylen: length of the HMAC key.
* @param pDigest: the result buffer of HMAC_SHA2 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
* @note Input sha2 type:
* - SHA2_224: (224/8)
* - SHA2_256: (256/8)
*/
__STATIC_INLINE int rtl_crypto_hmac_sha2(const SHA2_TYPE sha2type, const uint8_t *message,const uint32_t msglen,
const uint8_t *key, const uint32_t keylen, uint8_t *pDigest)
{
if (sha2type == MBED_SHA2_224) {
return crypto_hmac_sha2_224(message, msglen, key, keylen, pDigest);
} else if (sha2type == MBED_SHA2_256){
return crypto_hmac_sha2_256(message, msglen, key, keylen, pDigest);
} else {
return _ERRNO_CRYPTO_NOT_SUPPORT_THIS_FEATURE;
}
}
/**
* @brief Compatible function: Ameba1 initializes the HMAC_SHA2 function.
* @param sha2type: different sha2 type.
* @param key: HMAC secret key buffer.
* @param keylen: length of the HMAC key.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
* @note Input sha2 type:
* - SHA2_224: (224/8)
* - SHA2_256: (256/8)
*/
__STATIC_INLINE int rtl_crypto_hmac_sha2_init(const SHA2_TYPE sha2type, const uint8_t *key, const uint32_t keylen)
{
if (sha2type == MBED_SHA2_224) {
return crypto_hmac_sha2_224_init(key, keylen);
} else if (sha2type == MBED_SHA2_256) {
return crypto_hmac_sha2_256_init(key, keylen);
} else {
return _ERRNO_CRYPTO_NOT_SUPPORT_THIS_FEATURE;
}
}
/**
* @brief Compatible function: Ameba1 HMAC_SHA2 process buffer.
* @param message: input buffer.
* @param msglen: input buffer length.
* @param pDigest: the result buffer of HMAC_SHA2 function.
* @retval 0: SUCCESS
* @retval < 0: FAIL(Refer to ERRNO)
*/
__STATIC_INLINE int rtl_crypto_hmac_sha2_process(const uint8_t *message, const uint32_t msglen, uint8_t *pDigest)
{
return crypto_hmac_sha2_256_process(message, msglen, pDigest);
}
#ifdef __cplusplus
}
#endif
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP)"
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/crypto_api.h
|
C
|
apache-2.0
| 42,938
|
/** mbed Microcontroller Library
******************************************************************************
* @file dma_api.h
* @author
* @version V1.0.0
* @brief This file provides mbed GDMA API
******************************************************************************
* @attention
*
* Copyright (c) 2015, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
******************************************************************************
*/
#ifndef MBED_GDMA_API_H
#define MBED_GDMA_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup dma DMA
* @ingroup hal
* @brief dma functions
* @{
*/
///@name Ameba Common
///@{
typedef struct gdma_s gdma_t;
typedef void (*dma_irq_handler)(uint32_t id);
/**
* @brief Initial the GDMA
* @param dma_obj: the GDMA object
* @param handler: the callback function for a DMA transfer complete.
* @param id: the argument of the callback function.
* @retval None
*
*/
void dma_memcpy_init(gdma_t *dma_obj, dma_irq_handler handler, uint32_t id);
/**
* @brief De-Initial the GDMA
* @param dma_obj: the GDMA object
* @retval None
*
*/
void dma_memcpy_deinit(gdma_t *dma_obj);
/**
* @brief To do a memory copy by DMA
* @param dma_obj: the GDMA object
* @param dst: destination memory address
* @param src: source memory address
* @param len: copy data length
* @retval None
*/
void dma_memcpy(gdma_t *dma_obj, void *dst, void* src, uint32_t len);
///@}
#if defined(CONFIG_PLATFORM_8195A) && (CONFIG_PLATFORM_8195A == 1)
///@name Ameba1 Only
///@{
/**
* @brief Initial the GDMA
* @param dma_obj: the GDMA object
* @param handler: the callback function for a DMA transfer complete.
* @param id: the argument of the callback function.
* @retval None
*
*/
void dma_memcpy_aggr_init(gdma_t * dma_obj, dma_irq_handler handler, uint32_t id);
void dma_memcpy_aggr(gdma_t * dma_obj, PHAL_GDMA_BLOCK block_info);
///@}
#endif //CONFIG_PLATFORM_8195A
#if defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)
///@name AmebaPro Only
///@{
/**
* @brief To do a memory copy with multiple blocks by DMA
* @param dma_obj: the GDMA object
* @param phal_gdma_block: the struct contains source , destination informaiton
* @param block_num: number of blocks to be transferred
* @retval None
*/
void dma_multiblk_memcpy(gdma_t *dma_obj, phal_gdma_block_t phal_gdma_block, u8 block_num);
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP)"
/**@}*/
#ifdef __cplusplus
}
#endif
#endif // end of "#define MBED_GDMA_API_H"
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/dma_api.h
|
C
|
apache-2.0
| 2,805
|
/** mbed Microcontroller Library
******************************************************************************
* @file efuse_api.h
* @author
* @version V1.0.0
* @brief This file provides mbed EFUSE API.
******************************************************************************
* @attention
*
* Copyright (c) 2015, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
******************************************************************************
*/
#ifndef MBED_EXT_EFUSE_API_EXT_H
#define MBED_EXT_EFUSE_API_EXT_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup efuse EFUSE
* @ingroup hal
* @brief efuse functions
* @{
*/
///@name Ameba Common
///@{
/**
* @brief Get remaining efuse length
* @retval : remaining efuse length
*/
int efuse_get_remaining_length(void);
/**
* @brief Read efuse contant of specified user
* @param data: Specified the address to save the readback data.
* @retval none
*/
void efuse_mtp_read(uint8_t * data);
/**
* @brief Write user's contant to efuse
* @param data: Specified the data to be programmed.
* @param len: Specifies the data length of programmed data.
* @retval value:
* - 0~32: Success
* - -1: Failure
*/
int efuse_mtp_write(uint8_t *data, uint8_t len);
/**
* @brief Read efuse OTP contant
* @param address: Specifies the offset of the OTP.
* @param len: Specifies the length of readback data.
* @param buf: Specified the address to save the readback data.
* @retval 0: Success
* @retval -1: Failure
*/
int efuse_otp_read(u8 address, u8 len, u8 *buf);
/**
* @brief Write user's contant to OTP efuse
* @param address: Specifies the offset of the programmed OTP.
* @param len: Specifies the data length of programmed data.
* @param buf: Specified the data to be programmed.
* @retval 0: Success
* @retval -1: Failure
*/
int efuse_otp_write(u8 address, u8 len, u8 *buf);
/**
* @brief ckeck user's contant to OTP efuse
* @param buf: Specified the data to be programmed.
* @param len: Specifies the data length of programmed data.
* @retval 0: Success
* @retval -1: Failure
*/
int efuse_otp_chk(u8 len, u8 *buf);
/**
* @brief Disable jtag
* @retval 0: Success
*/
int efuse_disable_jtag(void);
///@}
#if defined(CONFIG_PLATFORM_8195A) && (CONFIG_PLATFORM_8195A == 1)
///@name Ameba1 Only
///@{
/**
* @brief Write key1 to efuse
* @param address: Specifies the offset of the programmed efuse.
* @param len: Specifies the data length of programmed data.
* @param buf: Specified the data to be programmed.
* @retval 0: Success
* @retval -1: Failure
*/
int efuse_key1_write(u8 address, u8 len, u8 *buf);
/**
* @brief Write key2 to efuse
* @param address: Specifies the offset of the programmed efuse.
* @param len: Specifies the data length of programmed data.
* @param buf: Specified the data to be programmed.
* @retval 0: Success
* @retval -1: Failure
*/
int efuse_key2_write(u8 address, u8 len, u8 *buf);
///@}
#endif //CONFIG_PLATFORM_8195A
#if defined(CONFIG_PLATFORM_8711B) && (CONFIG_PLATFORM_8711B == 1)
///@name AmebaZ Only
///@{
/**
* @brief Set RDP Enable.
* @param none
* @note can not change or read back after write.
*/
void efuse_rdp_enable(void);
/**
* @brief Set 16B RDP key into EFUSE.
* @param rdp_key: 16B EFUSE KEY
* @note can not change or read back after write.
*/
void efuse_rdp_keyset(u8 *rdp_key);
/**
* @brief Set 16B OTF key into EFUSE.
* @param OtfKey: 16B EFUSE KEY
* @note can not change or read back after write.
*/
void efuse_otf_keyset(u8 *otf_key);
///@}
#endif //CONFIG_PLATFORM_8711B
#if defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1)
///@name AmebaPro Only
///@{
/**
* @brief Disable LP jtag
* @retval 0: Success
*/
int efuse_disable_lp_jtag(void);
/**
* @brief Disable HS secure jtag
* @retval 0: Success
*/
int efuse_disable_sec_jtag(void);
/**
* @brief Disable HS nonsecure jtag
* @retval 0: Success
*/
int efuse_disable_nonsec_jtag(void);
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BLP)"
#if defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)
///@name AmebaPro Only
///@{
/**
* @brief Write secure key to efuse
* @param buf: Specified the 32-byte security key to be programmed.
* @retval 0: Success
* @retval -1: Failure
*/
int efuse_sec_key_write(u8 *buf);
/**
* @brief Write super secure key to efuse
* @param buf: Specified the 32-byte super security key to be programmed.
* @retval 0: Success
* @retval -1: Failure
*/
int efuse_susec_key_write(u8 *buf);
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP)"
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif // MBED_EXT_EFUSE_API_EXT_H
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/efuse_api.h
|
C
|
apache-2.0
| 5,013
|
/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2015, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*******************************************************************************
*/
#ifndef ETHERNET_EX_API_H
#define ETHERNET_EX_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup ethernet_ex ETHERNET_EX
* @ingroup hal
* @brief ethernet extended functions
* @{
*/
#if defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)
///@name AmebaPro Only
///@{
/// the selection of Ethernet pinmux
#define ETH_PIN_SEL (Eth_Pin_Sel0)
/// the selection of the interface between MAC and PHY
#define ETH_IF_SEL (Eth_If_Mii)
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP)"
/// the size (unit: Bytes) of each Tx descriptor
#define ETH_TX_DESC_SIZE 20 // 20 Bytes
/// the size (unit: Bytes) of each Rx descriptor
#define ETH_RX_DESC_SIZE 16 // 16 Bytes
/// the size of the packet buffer
#define ETH_PKT_BUF_SIZE 1600
#if defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)
///@name AmebaPro Only
///@{
/**
\brief Defines Ethernet Pin mux selection.
*/
typedef enum {
Eth_Pin_Sel0 = EthPinSel0,
Eth_Pin_Sel1 = EthPinSel1
} EthPinmuxSel;
/**
\brief Defines the interface between MAC and PHY.
*/
typedef enum {
Eth_If_Mii = EthMiiMode,
Eth_If_Rmii = EthRmiiMode
} EthInterfaceSel;
/**
\brief Defines the link speed.
*/
typedef enum {
Eth_Spd_Auto = -1,
Eth_Spd_10M = 0,
Eth_Spd_100M = 1
} EthSpeedSel;
/**
\brief Defines the duplex mode.
*/
typedef enum {
Eth_Duplex_Auto = -1,
Eth_Duplex_Half = 0,
Eth_Duplex_Full = 1
} EthDuplexMode;
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP)"
/**
\brief The function type of the Ethernet MAC controller interrupt callback function.
*/
typedef void (*ethernet_callback)(uint32_t event, uint32_t data);
#if defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)
///@name AmebaPro Only
///@{
/**
\brief The function type of the OS task yield callback function.
*/
typedef void (*ethernet_task_yield)(void);
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP)"
/**
* @brief To hook a callback function for Ethernet MAC controller interrupt.
*
* @param[in] callback The callback function.
*
* @returns void
*/
void ethernet_irq_hook(ethernet_callback callback);
#if defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)
///@name AmebaPro Only
///@{
/**
* @brief To hook a callback function to make OS do a context-switch while waiting.
*
* @param[in] task_yield The callback function.
*
* @returns void.
*/
void ethernet_task_yield_hook (ethernet_task_yield task_yield);
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP)"
/**
* @brief To set the Tx/Rx descriptor number.
*
* @param[in] txdescCnt The specified Tx descriptor number.
* @param[in] rxdescCnt The specified Rx descriptor number.
*
* @returns void.
*/
void ethernet_set_descnum(uint8_t txdescCnt, uint8_t rxdescCnt);
/**
* @brief To set the start address of Tx/Rx descriptor ring and Tx/Rx packet buffer.
*
* @param[in] TxDescAddr The start address of Tx descriptor ring.
* @param[in] RxDescAddr The start address of Rx descriptor ring.
* @param[in] pTxPktBuf The start address of Tx packet buffer.
* @param[in] pRxPktBuf The start address of Rx packet buffer.
*
* @returns void.
*/
void ethernet_trx_pre_setting(uint8_t *TxDescAddr, uint8_t *RxDescAddr, uint8_t *pTxPktBuf, uint8_t *pRxPktBuf);
#if defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)
///@name AmebaPro Only
///@{
/**
* @brief To set the ethernet MAC address.
*
* @param[in] mac The specified MAC address.
*
* @returns void.
*/
void ethernet_set_address(char *mac);
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP)"
#ifdef __cplusplus
}
#endif
#endif // #ifndef ETHERNET_EX_API_H
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/ethernet_ex_api.h
|
C
|
apache-2.0
| 4,237
|
/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2015, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*******************************************************************************
*/
#ifndef EX_API_H
#define EX_API_H
#include "device.h"
#include "serial_api.h"
#include "spi_api.h"
#include "dma_api.h"
#include "flash_api.h"
#include "gpio_ex_api.h"
#include "gpio_irq_ex_api.h"
#include "i2c_ex_api.h"
#include "i2s_api.h"
#include "serial_ex_api.h"
#include "sleep_ex_api.h"
#include "spi_ex_api.h"
#include "sys_api.h"
#include "wdt_api.h"
#if defined(CONFIG_PLATFORM_8195A) && (CONFIG_PLATFORM_8195A == 1)
#include "nfc_api.h"
#include "ethernet_ex_api.h"
#endif //CONFIG_PLATFORM_8195A
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/ex_api.h
|
C
|
apache-2.0
| 1,019
|
/******************************************************************************
*
* Copyright(c) 2007 - 2021 Realtek Corporation. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************/
/** mbed Microcontroller Library
******************************************************************************
* @file flash_api.h
* @author
* @version V1.0.0
* @brief This file provides mbed FLASH API
******************************************************************************
*/
#ifndef MBED_EXT_FLASH_API_EXT_H
#define MBED_EXT_FLASH_API_EXT_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup flash FLASH
* @ingroup hal
* @brief flash functions
* @{
*/
///@name Ameba Common
///@{
typedef struct flash_s flash_t;
/**
* @brief Erase flash sector
* @param obj: Flash object define in application software.
* @param address: Specifies the starting address to be erased.
* @retval none
*/
void flash_erase_sector(flash_t *obj, uint32_t address);
/**
* @brief Erase flash block(64KB)
* @param obj: Flash object define in application software.
* @param address: Specifies the starting address to be erased.LSB 16bits will be masked.
* @retval none
*/
void flash_erase_block(flash_t * obj, uint32_t address);
/**
* @brief Read a word from specified address
* @param obj: Flash object define in application software.
* @param address: Specifies the address to read from.
* @param data: Specified the address to save the readback data.
* @retval 1: Success
* @note auto mode read is ok, because we have flash cache
*/
int flash_read_word(flash_t *obj, uint32_t address, uint32_t * data);
/**
* @brief Write a word to specified address
* @param obj: Flash object define in application software.
* @param address: Specifies the address to be programmed to.
* @param data: Specified the data to be programmed.
* @retval 1: Success
* @note user mode write used
*/
int flash_write_word(flash_t *obj, uint32_t address, uint32_t data);
/**
* @brief Read a stream of data from specified address
* @param obj: Flash object define in application software.
* @param address: Specifies the starting address to read from.
* @param len: Specifies the length of the data to read.
* @param data: Specified the address to save the readback data.
* @retval 1: Success
* @note auto mode is ok, because we have flash cache
*/
int flash_stream_read(flash_t *obj, uint32_t address, uint32_t len, uint8_t * data);
/**
* @brief Write a stream of data to specified address
* @param obj: Flash object define in application software.
* @param address: Specifies the starting address to write to.
* @param len: Specifies the length of the data to write.
* @param data: Pointer to a byte array that is to be written.
* @retval 1: Success
*/
int flash_stream_write(flash_t *obj, uint32_t address, uint32_t len, uint8_t * data);
/**
* @brief Control the flash chip write protect enable/disable.
* @param obj: Flash object define in application software.
* @param protect: This parameter can be 1 or 0.
* @arg 1: Protect the whole chip from being programmed/erased.
* @arg 0: Unprotect the whole chip from being programmed/erased.
* @retval none
*/
void flash_write_protect(flash_t *obj, uint32_t protect);
/**
* @brief Get the value of status register1
* @param obj: Flash object define in application software.
* @retval : The value of status register1.
*/
int flash_get_status(flash_t * obj);
/**
* @brief Set Status register to enable desired operation
* @param obj: Specifies the parameter of flash object.
* @param data: Specifies which bit users like to set.
* ex: if users want to set the third bit, data = 0x8.
* @retval 1: Success
* @note Please refer to the datatsheet of flash for more details of the content of status register.
* The block protected area and the corresponding control bits are provided in the flash datasheet.
*/
int flash_set_status(flash_t * obj, uint32_t data);
/**
* @brief This function aims to reset the status register, please make sure the operation is appropriate.
* @param obj: Specifies the parameter of flash object.
* @retval none
*/
void flash_reset_status(flash_t * obj);
/**
* @brief It is the same with flash_stream_write function which is used to write a stream of data to specified address.
* @param obj: Flash object define in application software.
* @param address: Specifies the starting address to write to.
* @param len: Specifies the length of the data to write.
* @param data: Pointer to a byte array that is to be written.
* @retval 1: Success
*/
int flash_burst_write(flash_t * obj, uint32_t address, uint32_t Length, uint8_t * data);
/**
* @brief It is the same with flash_stream_read function which is used to read a stream of data from specified address
* @param obj: Flash object define in application software.
* @param address: Specifies the starting address to read from.
* @param len: Specifies the length of the data to read.
* @param data: Specified the address to save the readback data.
* @retval 1: Success
*/
int flash_burst_read(flash_t * obj, uint32_t address, uint32_t Length, uint8_t * data);
/**
* @brief This function is only for Micron 128MB flash to access beyond 16MB by switching between eight 16MB-area(segment).
* Please refer to flash datasheet for more information about memory mapping.
* @param obj: Flash object define in application software.
* @param data: Specified which segment to choose.
* @retval 1: Success
*/
int flash_set_extend_addr(flash_t * obj, uint32_t data);
/**
* @brief This function is only for Micron 128MB flash to read from Extended Address Register, which shows the current segment.
* Please refer to flash datasheet for more information about memory mapping.
* @param obj: Flash object define in application software.
* @retval : The value of current Extended Address Register.
*/
int flash_get_extend_addr(flash_t * obj);
/**
* @brief Get flash ID (command: 0x9F).
* @param obj: Flash object define in application software.
* @param buf: Pointer to a byte array to save the readback ID.
* @param len: Specifies the length of the buf. It should be 3.
* @retval -1: Fail.
*/
int flash_read_id(flash_t *obj, uint8_t *buf, uint8_t len);
/**
* @brief This function is only for Winbond flash to get unique ID (command: 0x4B).
* @param obj: Flash object define in application software.
* @param buf: Pointer to a byte array to save the readback unique ID.
* @param len: Specifies the length of the buf. It should be 8.
* @retval -1: Fail.
*/
int flash_read_unique_id(flash_t *obj, uint8_t *buf, uint8_t len);
/**
* @brief This function is only for Winbond flash to set lock mode.
* @param mode: This parameter can be 1 or 0.
* @arg 1: Enable individual sector / block protect feature.
* @arg 0: Set status register 1 to enble write protect feature.
* @retval none
* @note But not all Winbond flash supports the function, plase refer to data sheets of the target flashes.
*/
void flash_set_lock_mode(uint32_t mode);
/**
* @brief This function is only for Winbond flash to lock whole flash chip.
* @param none
* @retval none
* @note But not all Winbond flash supports the function, plase refer to data sheets of the target flashes.
*/
void flash_global_lock(void);
/**
* @brief This function is only for Winbond flash to unlock whole flash chip.
* @param none
* @retval none
* @note But not all Winbond flash supports the function, plase refer to data sheets of the target flashes.
*/
void flash_global_unlock(void);
/**
* @brief This function is only for Winbond flash to lock individual sector or block region, should refer to the datasheet for more details.
* @param address
* @retval none
* @note But not all Winbond flash supports the function, plase refer to data sheets of the target flashes.
*/
void flash_individual_lock(uint32_t address);
/**
* @brief This function is only for Winbond flash to unlock individual sector or block region, should refer to the datasheet for more details.
* @param address
* @retval none
* @note But not all Winbond flash supports the function, plase refer to data sheets of the target flashes.
*/
void flash_individual_unlock(uint32_t address);
/**
* @brief This function is only for Winbond flash to get the individual lock state on certain address.
* @param address
* @retval 1: the target sector/block is locked.
* 0: the target sector/block is not locked.
* @note But not all Winbond flash supports the function, plase refer to data sheets of the target flashes.
*/
int flash_read_individual_lock_state(uint32_t address);
///@}
#if ((defined(CONFIG_PLATFORM_8711B) && (CONFIG_PLATFORM_8711B == 1)) || (defined (CONFIG_PLATFORM_8721D) && (CONFIG_PLATFORM_8721D == 1)))
///@name AmebaZ and AmebaD
///@{
/**
* @brief Erase the whole flash chip
* @param obj: Flash object define in application software.
* @retval none
*/
void flash_erase_chip(flash_t *obj);
///@}
#endif //CONFIG_PLATFORM_8711B and CONFIG_PLATFORM_8721D
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/flash_api.h
|
C
|
apache-2.0
| 10,027
|
/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2015, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*******************************************************************************
*/
#ifndef MBED_GPIO_API_H
#define MBED_GPIO_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup gpio_ex GPIO_EX
* @ingroup hal
* @brief gpio extended functions
* @{
*/
/**
* @brief Sets value to the selected output port pin.
* @param obj: gpio object define in application software.
* @param value: specifies the value to be written to the selected pin
* This parameter can be one of the following values:
* @arg 0: Pin state set to low
* @arg 1: Pin state set to high
* @retval none
*/
void gpio_direct_write(gpio_t *obj, BOOL value) ;
/**
* @brief Sets pull type to the selected pin.
* @param obj: gpio object define in application software.
* @param pull_type: this parameter can be one of the following values:
* @arg PullNone: HighZ, user can input high or low use this pin
* @arg OpenDrain(is OpenDrain output): no pull + OUT + GPIO[gpio_bit] = 0
* @arg PullDown: pull down
* @arg PullUp: pull up
* @retval none
*/
void gpio_pull_ctrl(gpio_t *obj, PinMode pull_type);
/**
* @brief Deinitializes the GPIO device, include mode/direction/pull control registers.
* @param obj: gpio object define in application software.
* @retval none
*/
void gpio_deinit(gpio_t *obj);
/**
* @brief Set GPIO direction.
* @param obj: gpio object define in application software.
* @param direction: this parameter can be one of the following values:
* @arg PIN_INPUT: this pin is input
* @arg PIN_OUTPUT: this pin is output
* @retval none
*/
void gpio_change_dir(gpio_t *obj, PinDirection direction);
#if (defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) || (defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1))
///@name AmebaPro Only
///@{
/**
* @brief Sets schmitt trigger on/off control on the given GPIO pin .
* @param pin: PinName according to pinmux spec.
* @param ctrl The on/off control:
* - 0: disable the schmitt trigger.
* - 1: enable the schmitt trigger.
* @param v_h3l1 The GPIO Group Voltage Select:
* - 0: 1.8V.
* - 1: 3V.
* @retval none
*/
void gpio_schmitt_ctrl(PinName pin, BOOLEAN ctrl, uint8_t v_h3l1);
///@}
#endif //CONFIG_PLATFORM_8195BHP || CONFIG_PLATFORM_8195BLP
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/gpio_ex_api.h
|
C
|
apache-2.0
| 2,824
|
/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2015, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*******************************************************************************
*/
#ifndef MBED_GPIO_IRQ_EX_API_H
#define MBED_GPIO_IRQ_EX_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup gpio_irq_ex_api GPIO_IRQ_EX
* @ingroup hal
* @brief gpio IRQ extented functions
* @{
*/
///@name Ameba Common
///@{
typedef enum {
IRQ_LOW = 3,
IRQ_HIGH = 4,
IRQ_FALL_RISE = 5 // dual edge trigger, available for 8195B only
} gpio_irq_event_ex;
/**
* @brief Deinitializes the GPIO device interrupt mode, include mode/trigger/polarity registers.
* @param obj: gpio irq object define in application software.
* @retval none
*/
void gpio_irq_deinit(gpio_irq_t *obj);
/**
* @brief Sets pull type to the selected interrupt pin.
* @param obj: gpio irq object define in application software.
* @param pull_type: this parameter can be one of the following values:
* @arg PullNone: HighZ, user can input high or low use this pin
* @arg OpenDrain(is OpenDrain output): no pull + OUT + GPIO[gpio_bit] = 0
* @arg PullDown: pull down
* @arg PullUp: pull up
* @retval none
*/
void gpio_irq_pull_ctrl(gpio_irq_t *obj, PinMode pull_type);
///@}
#if (defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) || (defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1))
///@name AmebaPro Only
///@{
/**
* @brief To enables or disable the debounce function of the given GPIO IRQ pin.
* The debounce resource(circuit) is limited, not all GPIO pin
* can has debounce function.
*
* @param[in] pgpio_irq_adapter The GPIO IRQ pin adapter.
* @param[in] debounce_us The time filter for the debounce, in micro-second.
* But the time resolution is 31.25us (1/32K) and the
* maximum time is 512 ms.
* @param[in] enable: this parameter can be one of the following values:
* @arg 0 disable gpio debounce interrupt
* @arg 1 enable gpio debounce interrupt
* @return 0: Setting Succeed.
* @return -1: Setting Fail.
*/
int gpio_irq_debounce_set (gpio_irq_t *obj, uint32_t debounce_us, u8 enable);
///@}
#endif //CONFIG_PLATFORM_8195BHP || CONFIG_PLATFORM_8195BLP
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif // end of #ifndef MBED_GPIO_IRQ_EX_API_H
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/gpio_irq_ex_api.h
|
C
|
apache-2.0
| 2,696
|
/** mbed Microcontroller Library
******************************************************************************
* @file i2c_ex_api.h
* @author
* @version V1.0.0
* @brief This file provides mbed API for I2C.
******************************************************************************
* @attention
*
* Copyright (c) 2015, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
******************************************************************************
*/
#ifndef I2C_EX_API_H
#define I2C_EX_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup i2c_ex I2C_EX
* @ingroup hal
* @brief i2c extended functions
* @{
*/
///@name Ameba Common
///@{
typedef enum {
I2C_TX_COMPLETE = 0,
I2C_RX_COMPLETE = 1,
I2C_RD_REQ_COMMAND = 2,
I2C_ERR_OCCURRED = 3,
}I2CCallback;
/**
* @brief Enable/Disable i2c Device
* @param obj: i2c object define in application software.
* @param enable: this parameter can be one of the following values:
* @arg 0 disable
* @arg 1 enable
* @retval : result
*/
int i2c_enable_control(i2c_t *obj, int enable);
/**
* @brief Enable i2c master RESTART function
* @param obj: i2c object define in application software.
* @retval none
*/
void i2c_restart_enable(i2c_t *obj);
/**
* @brief Disable i2c Master RESTART function
* @param obj: i2c object define in application software.
* @retval none
*/
void i2c_restart_disable(i2c_t *obj);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/i2c_ex_api.h
|
C
|
apache-2.0
| 1,715
|
/** mbed Microcontroller Library
******************************************************************************
* @file i2s_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed I2S API
******************************************************************************
* @attention
*
* Copyright (c) 2015, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
******************************************************************************
*/
#ifndef MBED_EXT_I2S_API_EXT_H
#define MBED_EXT_I2S_API_EXT_H
#include "device.h"
#if !(defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) && !(defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1))
///@name Only Ameba1
#include "ameba_soc.h"
#endif // end of "#if !defined(CONFIG_PLATFORM_8195BHP) && !defined(CONFIG_PLATFORM_8195BLP)"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup i2s I2S
* @ingroup hal
* @brief i2s functions
* @{
*/
#if (defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) || (defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1)) || (defined(CONFIG_PLATFORM_8721D) && (CONFIG_PLATFORM_8721D == 1))
///@name AmebaPro and AmebaD
///@{
enum {
SR_8KHZ = I2S_SR_8KHZ,
SR_12KHZ = I2S_SR_12KHZ,
SR_16KHZ = I2S_SR_16KHZ,
SR_24KHZ = I2S_SR_24KHZ,
SR_32KHZ = I2S_SR_32KHZ,
SR_48KHZ = I2S_SR_48KHZ,
SR_64KHZ = I2S_SR_64KHZ,
SR_96KHZ = I2S_SR_96KHZ,
SR_192KHZ = I2S_SR_192KHZ,
SR_384KHZ = I2S_SR_384KHZ,
SR_7p35KHZ = I2S_SR_7p35KHZ,
SR_11p025KHZ = I2S_SR_11p025KHZ,
SR_14p7KHZ = I2S_SR_14p7KHZ,
SR_22p05KHZ = I2S_SR_22p05KHZ,
SR_29p4KHZ = I2S_SR_29p4KHZ,
SR_44p1KHZ = I2S_SR_44p1KHZ,
SR_58p8KHZ = I2S_SR_58p8KHZ,
SR_88p2KHZ = I2S_SR_88p2KHZ,
SR_176p4KHZ = I2S_SR_176p4KHZ
};
enum {
CH_STEREO = I2S_CH_STEREO,
CH_5P1 = I2S_CH_5P1,
CH_MONO = I2S_CH_MONO
};
enum {
WL_16b = I2S_WL_16,
WL_24b = I2S_WL_24,
WL_32b = I2S_WL_32
};
#else
///@name Ameba Common
///@{
enum {
SR_8KHZ = I2S_SR_8KHZ,
SR_16KHZ = I2S_SR_16KHZ,
SR_24KHZ = I2S_SR_24KHZ,
SR_32KHZ = I2S_SR_32KHZ,
SR_48KHZ = I2S_SR_48KHZ,
SR_96KHZ = I2S_SR_96KHZ,
SR_7p35KHZ = I2S_SR_7p35KHZ,
SR_14p7KHZ = I2S_SR_14p7KHZ,
SR_22p05KHZ = I2S_SR_22p05KHZ,
SR_29p4KHZ = I2S_SR_29p4KHZ,
SR_44p1KHZ = I2S_SR_44p1KHZ,
SR_88p2KHZ = I2S_SR_88p2KHZ
};
enum {
CH_STEREO = I2S_CH_STEREO,
CH_MONO = I2S_CH_MONO
};
enum {
WL_16b = I2S_WL_16,
WL_24b = I2S_WL_24
};
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8195BLP)"
enum {
I2S_DIR_RX = I2S_ONLY_RX, // Rx Only
I2S_DIR_TX = I2S_ONLY_TX, // Tx Only
I2S_DIR_TXRX = I2S_TXRX // Tx & Rx (BiDirection)
};
typedef void (*i2s_irq_handler)(uint32_t id, char *pbuf);
typedef struct i2s_s i2s_t;
/**
* @brief Deinitializes the I2S device, include function/interrupt/I2S registers.
* @param obj: i2s object define in application software.
* @retval none
*/
void i2s_deinit(i2s_t *obj);
/**
* @brief Sets page number, page size, page address.
* @param obj: i2s object define in application software.
* @param tx_buf: pointer to the start address of Tx page.
* @param rx_buf: pointer to the start address of Rx page.
* @param page_num: page number. This parameter must be set to a value in the 2~4 range
* @param page_size: page size. This parameter must be set to a value in the 4~16384 bytes range
* @retval none
*/
void i2s_set_dma_buffer(i2s_t *obj, char *tx_buf, char *rx_buf, uint32_t page_num, uint32_t page_size);
/**
* @brief Sets TX interrupt handler.
* @param obj: i2s object define in application software.
* @param handler: TX interrupt callback function.
* @param id: TX interrupt callback function parameter.
* @retval none
*/
void i2s_tx_irq_handler(i2s_t *obj, i2s_irq_handler handler, uint32_t id);
/**
* @brief Sets RX interrupt handler.
* @param obj: i2s object define in application software.
* @param handler: RX interrupt callback function.
* @param id: RX interrupt callback function parameter.
* @retval none
*/
void i2s_rx_irq_handler(i2s_t *obj, i2s_irq_handler handler, uint32_t id);
/**
* @brief Sets i2s data transfer direction.
* @param obj: i2s object define in application software.
* @param trx_type: transfer direction.
* This parameter can be one of the following values:
* @arg I2S_DIR_RX: Rx receive direction
* @arg I2S_DIR_TX: Tx transmission direction
* @arg I2S_DIR_TXRX: Tx & Rx bi-direction
* @retval none
*/
void i2s_set_direction(i2s_t *obj, int trx_type);
/**
* @brief Sets i2s channel number, sample rate, word length.
* @param obj: i2s object define in application software.
* @param channel_num: this parameter can be one of the following values:
* @arg CH_STEREO: stereo channel
* @arg CH_MONO: mono channel
* @param rate: this parameter can be one of the following values:
* @arg SR_8KHZ: sample rate is 8kHz
* @arg SR_16KHZ: sample rate is 16kHz
* @arg SR_24KHZ: sample rate is 24kHz
* @arg SR_32KHZ: sample rate is 32kHz
* @arg SR_48KHZ: sample rate is 48kHz
* @arg SR_96KHZ: sample rate is 96kHz
* @arg SR_7p35KHZ: sample rate is 7.35kHz
* @arg SR_14p7KHZ: sample rate is 14.7kHz
* @arg SR_22p05KHZ: sample rate is 22.05kHz
* @arg SR_29p4KHZ: sample rate is 29.4kHz
* @arg SR_44p1KHZ: sample rate is 44.1kHz
* @arg SR_88p2KHZ: sample rate is 88.2kHz
* @param word_len: this parameter can be one of the following values:
* @arg WL_16b: sample bit is 16 bit
* @arg WL_24b: sample bit is 24 bit
* @retval none
*/
void i2s_set_param(i2s_t *obj, int channel_num, int rate, int word_len);
/**
* @brief Gets current tx page address.
* @param obj: i2s object define in application software.
* @retval : address of current tx page or NULL
* @note current page own by cpu, return address of current tx page
* @note current page own by i2s, return NULL
*/
int* i2s_get_tx_page(i2s_t *obj);
/**
* @brief Sets current tx page own by i2s.
* @param obj: i2s object define in application software.
* @param pbuf: tx buffer adderss.
* @retval none
*/
void i2s_send_page(i2s_t *obj, uint32_t *pbuf);
/**
* @brief Sets current rx page own by i2s.
* @param obj: i2s object define in application software.
* @retval none
*/
void i2s_recv_page(i2s_t *obj);
/**
* @brief Enable i2s interrupt and function.
* @param obj: i2s object define in application software.
* @retval none
*/
void i2s_enable(i2s_t *obj);
/**
* @brief Disable i2s interrupt and function.
* @param obj: i2s object define in application software.
* @retval none
*/
void i2s_disable(i2s_t *obj);
///@}
#if defined(CONFIG_PLATFORM_8195A) && (CONFIG_PLATFORM_8195A == 1)
///@name Ameba1 Only
///@{
/**
* @brief Initializes the I2S device, include clock/function/interrupt/I2S registers.
* @param obj: i2s object define in application software.
* @param sck: Serial clock PinName according to pinmux spec.
* @param ws: Word select PinName according to pinmux spec.
* @param sd: PinName according to pinmux spec.
* @retval none
*/
void i2s_init(i2s_t *obj, PinName sck, PinName ws, PinName sd);
///@}
#endif //CONFIG_PLATFORM_8195A
#if (defined(CONFIG_PLATFORM_8711B) && (CONFIG_PLATFORM_8711B == 1)) || (defined(CONFIG_PLATFORM_8721D) && (CONFIG_PLATFORM_8721D == 1))
///@name AmebaZ and AmebaD
///@{
/**
* @brief Initializes the I2S device, include clock/function/interrupt/I2S registers.
* @param obj: i2s object define in application software.
* @param sck: Serial clock PinName according to pinmux spec.
* @param ws: Word select PinName according to pinmux spec.
* @param sd_tx: Tx PinName according to pinmux spec.
* @param sd_rx: Rx PinName according to pinmux spec.
* @param mck: Master clock PinName according to pinmux spec.
* @retval none
*/
void i2s_init(i2s_t *obj, PinName sck, PinName ws, PinName sd_tx, PinName sd_rx, PinName mck);
///@}
#endif //CONFIG_PLATFORM_8711B
#if (defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) || (defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1))
///@name AmebaPro Only
///@{
typedef enum {
FORMAT_I2S = I2S_FORMAT_I2S,
LEFT_JUST = I2S_FORMAT_LEFT_JUST,
FORMAT_RIGHT_JUST = I2S_FORMAT_RIGHT_JUST
} i2s_format;
typedef enum {
I2S_MASTER = I2S_MASTER_MODE,
I2S_SLAVE = I2S_SLAVE_MODE
} i2s_ms_mode;
typedef enum {
PAGE_0NUM = I2S_USELESS_PAGE,
PAGE_2NUM = I2S_2PAGE,
PAGE_3NUM = I2S_3PAGE,
PAGE_4NUM = I2S_4PAGE
} i2s_page_num;
typedef enum {
BURST8 = I2S_BURST8,
BURST12 = I2S_BURST12,
BURST16 = I2S_BURST16
} i2s_burst_size;
typedef enum {
LEFT_PHASE = I2S_LEFT_PHASE,
RIGHT_PHASE = I2S_RIGHT_PHASE
} i2s_ws_swap;
typedef enum {
NEGATIVE_EDGE = I2S_NEGATIVE_EDGE,
POSITIVE_EDGE = I2S_POSITIVE_EDGE
} i2s_edge_sw;
/**
* @brief Initializes the I2S device, include clock/function/interrupt/I2S registers.
* @param obj: i2s object define in application software.
* @param sck: Serial clock PinName according to pinmux spec.
* @param ws: Word select PinName according to pinmux spec.
* @param sd_tx0: Tx PinName according to pinmux spec.
* @param sd_rx: Rx PinName according to pinmux spec. This pin is not configured when set PinName "NC".
* @param mck: Master clock PinName according to pinmux spec. This pin is not configured when set PinName "NC".
* @param sd_tx1: Tx1 PinName according to pinmux spec. This pin is not configured when set PinName "NC".
* @param sd_tx2: Tx2 PinName according to pinmux spec. This pin is not configured when set PinName "NC".
* @retval none
*/
void i2s_init(i2s_t *obj, PinName sck, PinName ws, PinName sd_tx0, PinName sd_rx, PinName mck, PinName sd_tx1, PinName sd_tx2);
/**
* @brief Reset the I2S.
* @param obj: i2s object define in application software.
* @retval none
*/
void i2s_sw_reset(i2s_t *obj);
/**
* @brief Set the I2S format.
* @param obj: i2s object define in application software.
* @param format: The I2S formate.
* @FORMAT_I2S : I2S
* @LEFT_JUST : Left Justified
* @FORMAT_RIGHT_JUST : Right Justified
* @retval none
*/
void i2s_set_format(i2s_t *obj, i2s_format format);
/**
* @brief Set the master or slave mode.
* @param obj: i2s object define in application software.
* @param ms_mode: Master or slave mode.
* @I2S_MASTER : Master mode.
* @I2S_SLAVE : Left Justified
* @FORMAT_RIGHT_JUST : Right Justified
* @retval none
*/
void i2s_set_master(i2s_t *obj, i2s_ms_mode ms_mode);
/**
* @brief Set the burst size for DMA.
* @param obj: i2s object define in application software.
* @param burst_size: Set the burst size.
* @BURST8 : The burst size is 8-words.
* @BURST12 : The burst size is 12-words.
* @BURST16 : The burst size is 16-words.
* @retval none
*/
void i2s_set_dma_burst_size(i2s_t *obj, i2s_burst_size burst_size);
/**
* @brief Make the data do the byte switch.
* @param obj: i2s object define in application software.
* @param byte_swap_en: To enable or disable.
* @retval none
*/
void i2s_set_byte_swap(i2s_t *obj, BOOL byte_swap_en);
/**
* @brief Make the SCK inverse.
* @param obj: i2s object define in application software.
* @param sck_inv_en: To enable or disable.
* @retval none
*/
void i2s_set_sck_inv(i2s_t *obj, BOOL sck_inv_en);
/**
* @brief Control whether the first data appear in the "right" or "left" phase of WS clock.
* @param obj: i2s object define in application software.
* @param ws_swap: Select the right or left phase.
* @LEFT_PHASE : Select the left phase.
* @RIGHT_PHASE : Select the right phase.
* @retval none
*/
void i2s_set_ws_swap(i2s_t *obj, i2s_ws_swap ws_swap);
/**
* @brief Set the I2S loopback mode. Need to set the I2S direction is only TX.
* @param obj: i2s object define in application software.
* @param loopback_en: To enable or disable.
* @retval none
*/
void i2s_set_loopback(i2s_t *obj, BOOL loopback_en);
/**
* @brief Chose to send data at the negative edge or positive edge of SCK.
* @param obj: i2s object define in application software.
* @param edge_sw: Select the sending edge.
* @NEGATIVE_EDGE : Select the negative edge.
* @POSITIVE_EDGE : Select the positive edge.
* @retval none
*/
void i2s_set_data_start_edge(i2s_t *obj, i2s_edge_sw edge_sw);
/**
* @brief Set the I2S mute mode.
* @param obj: i2s object define in application software.
* @param mute_en: To enable or disable.
* @retval none
*/
void i2s_set_mute(i2s_t *obj, BOOL mute_en);
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8195BLP)"
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/i2s_api.h
|
C
|
apache-2.0
| 13,189
|
/**************************************************************************//**
* @file icc_api.c
* @brief This file defines the data types and macro for ICC API implementation.
*
* @version V1.00
* @date 2017-06-05
*
* @note
*
******************************************************************************
*
* Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef MBED_ICC_API_H
#define MBED_ICC_API_H
#if (defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) || (defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1))
///@name AmebaPro Only
///@{
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup icc ICC
* @ingroup hal
* @brief ICC(Inter CPU Communication) HAL APIs
* @{
*/
/**
\brief ICC message queue ID.
*/
typedef enum icc_api_msg_qid_e {
ICC_MsgHQ = 0, ///< higher priority message queue, data is this queue will be processed first
ICC_MsgLQ = 1 ///< lower priority message queue
} icc_msg_qid_t, *picc_msg_qid_t;
/**
\brief Default type for ICC user application command word.
*/
typedef struct icc_user_cmd_s {
union {
uint32_t cmd_w;
struct {
uint32_t para0:24; ///< command parameter 0. User application can re-define this field
uint32_t cmd:8; ///< command type, bit[31:24] is dedicated for the command type.
} cmd_b;
};
} icc_user_cmd_t, *picc_user_cmd_t;
#if 0
/**
\brief Default type for ICC user application message word.
*/
typedef struct icc_user_msg_s{
union {
uint32_t msg_w;
struct {
icc_msg_qid_t msg_q:8; ///< message queue selection, bit[7:0] is dedicated for the message queue ID.
uint32_t msg_op:8; ///< message operland. User application can re-define this field.
uint32_t msg_type:8; ///< message type, bit[23:13] is dedicated for the message type.
uint32_t cmd:8; ///< command type, bit[31:24] is reserved for the command type. User application should not use this field.
} msg_b;
};
} icc_user_msg_t, *picc_user_msg_t;
#endif
/**
\brief The function type of the ICC command callback function.
*/
typedef void (*icc_user_cmd_callback_t)(uint32_t icc_cmd, uint32_t icc_cmd_op, uint32_t cb_arg);
/**
\brief The function type of the ICC message callback function.
*/
typedef void (*icc_user_msg_callback_t)(uint8_t *pmsg_buf, uint32_t msg_size, uint32_t cb_arg);
/**
\brief The function type of the message data transfer complete callback function.
*/
typedef void (*icc_msg_tx_callback_t)(uint32_t cb_arg);
/**
* @brief Initials the ICC (Inter CPU Communication) object.
* The secure region ICC object should be initialed first.
*
* @returns void.
*/
void icc_init (void);
/**
* @brief Disables the ICC interface.
*
* @returns void.
*/
void icc_deinit (void);
/**
* @brief Submits a message RX request with RX data buffer to the ICC HAL. The RX requests
* are used to receive messages from HS platform.
* @param[in] rx_req The message RX request will to be added to the message RX request pending queue.
* @param[in] pbuf The data buffer for ICC message data receiving.
* @param[in] size The size, in byte, of the data buffer.
*
* @return void.
*/
void icc_msg_rx_req_submit (icc_msg_rx_req_t *rx_req, uint8_t *pbuf, uint32_t size);
/**
* @brief Registers(add) an ICC command to the user application ICC command table.
*
* @param[in] cmd The user application ICC command type to be registered.
* @param[in] callback The handler function of this user application ICC command type.
* @param[in] cb_arg The application data will be passed back to the application with the callback function.
*
* @return void.
*/
void icc_cmd_register(uint8_t cmd, icc_user_cmd_callback_t callback, uint32_t cb_arg);
/**
* @brief Unregisters(remove) an ICC command from the user application ICC command table.
*
* @param[in] cmd The ICC command type to be removed from the user application ICC command table.
*
* @returns void.
*/
void icc_cmd_unregister(uint8_t cmd);
/**
* @brief Sends an ICC command to the LS platform.
*
* @param[in] cmd The ICC command word 0, it contains the command type and the data word0.
* @param[in] cmd_para1 The ICC command parameter(data word1).
* @param[in] timeout_us The period, in micro-second, to wait the completion of
* command sending.
* -Value 0: no wait.
* -Value 0xFFFFFFFF: wait forever.
* @param[in] task_yield The OS task yield function. The ICC HAL will call this function
* while wait for the command sending is finished.
*
* @return void.
*/
void icc_cmd_send (uint32_t cmd_w, uint32_t cmd_para1, uint32_t timeout_us, void *task_yield);
/**
* @brief Registers(adds) an ICC user application message to the
* ICC user application message table.
*
* @param[in] msg_type The ICC message type to be registered.
* @param[in] frame The frame type(category) of this ICC message.
* @param[in] callback The ICC message handler function of this new added message type.
* @param[in] cb_arg The application data will be passed back to the application
* with the callback function.
*
* @return void.
*/
void icc_msg_register (uint8_t msg_type, uint8_t frame,
icc_user_msg_callback_t callback, uint32_t cb_arg);
/**
* @brief Un-register(remove) an user application ICC message from the
* user application ICC message table.
*
* @param[in] msg The user application ICC message type to be removed
* from the user application ICC message table.
* @param[in] frame The frame type(category) of this ICC message.
*
* @returns void.
*/
void icc_msg_unregister (uint8_t msg, uint8_t frame);
/**
* @brief Sends a ICC message (with message data) to peer.
* @param[in] msg_type The message type of the ICC message to be send.
* @param[in] frame_type The frame type(category) of the message type.
* @param[in] q_id The message queue ID. It assign the message queue to send this message(with its data).
* @param[in] msg_data The buffer of the message data to be send.
* @param[in] msg_len The length(in byte) of data in the buffer msg_data to be send.
* @param[in] callback The call-back function for the message data transfer is done.
* @param[in] callback_arg The argument of the call-back function.
*
* @return 0: Message send OK. (the TX request adds to the TX pending queue OK).
* @return < 0: Gor error on Message sending.
*/
int32_t icc_msg_tx_submit (uint8_t msg_type, uint8_t frame_type, uint8_t *msg_data, uint16_t msg_len,
icc_msg_tx_callback_t callback, uint32_t callback_arg);
/** @} */ /* End of group icc */
#ifdef __cplusplus
}
#endif
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8195BLP)"
#endif // end of "#ifndef MBED_ICC_API_H"
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/icc_api.h
|
C
|
apache-2.0
| 7,275
|
/******************************************************************************
*
* Copyright(c) 2007 - 2021 Realtek Corporation. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************/
/**
******************************************************************************
* @file log_uart_api.h
* @author
* @version
* @brief This file provides user interface for log uart
* base on the functionalities provided by Realtek periphera.
******************************************************************************
*/
#ifndef LOG_UART_API_H
#define LOG_UART_API_H
#if defined(CONFIG_PLATFORM_8195A) && (CONFIG_PLATFORM_8195A == 1)
#include "device.h"
#include "serial_api.h"
#include "hal_log_uart.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup log_uart LOG_UART
* @ingroup hal
* @brief log_uart functions
* @{
*/
///@name Ameba1 Only
///@{
/******************************************************
* Type Definitions
******************************************************/
/** Log uart irq handler function pointer type
*
* @param id : The argument for log uart interrupt handler
* @param event : The log uart interrupt indication ID. More details is shown in hal_log_uart.h
*/
typedef void (*loguart_irq_handler)(uint32_t id, LOG_UART_INT_ID event);
typedef struct log_uart_s log_uart_t;
/******************************************************
* Function Declarations
******************************************************/
/**
* @brief Initialize Realtek log uart.
* Initialize the required parts of the log uart.
* i.e. baudrate, data bits, parity, etc.
* @param[in] obj: The address of log uart object.
* @param[in] baudrate: Baud rate of the log uart object.
* @param[in] data_bits: Data bits of the log uart object.
* @param[in] parity: Parity type of the log uart object
- ParityNone, - Do not use parity
- ParityOdd, - Use odd parity
- ParityEven, - Use even parity
- ParityForced1, - Use even parity, the same as ParityEven
- ParityForced0 - Use odd parity, the same as ParityOdd
* @param[in] stop_bits: The number of stop bits for the log uart object.
* @return 0 if initialization is successful, -1 otherwise
*/
int32_t log_uart_init(log_uart_t *obj, int baudrate, int data_bits, SerialParity parity, int stop_bits);
/**
* @brief Release the resources related to Realtek log uart.
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_free(log_uart_t *obj);
/**
* @brief Set the baud rate of log uart.
* @param[in] obj: The address of log uart object.
* @param[in] baudrate: Baud rate of the log uart object.
* @return None
*/
void log_uart_baud(log_uart_t *obj, int baudrate);
/**
* @brief Set parameters for log uart.
* including data bits, parity type and stop bits
* @param[in] obj: The address of log uart object.
* @param[in] data_bits: Data bits of log uart object.
* @param[in] parity: Parity type of the log uart object
- ParityNone, - Do not use parity
- ParityOdd, - Use odd parity
- ParityEven, - Use even parity
- ParityForced1, - Use even parity, the same as ParityEven
- ParityForced0 - Use odd parity, the same as ParityOdd
* @param[in] stop_bits: The number of stop bits for the log uart object.
* @return None
*/
void log_uart_format(log_uart_t *obj, int data_bits, SerialParity parity, int stop_bits);
/**
* @brief Set irq handler for log uart.
* @param[in] obj: The address of log uart object.
* @param[in] handler: The interrupt handler for log uart.
* @param[in] id: The argument for log uart interrupt handler.
* @return None
*/
void log_uart_irq_handler(log_uart_t *obj, loguart_irq_handler handler, uint32_t id);
/**
* @brief Enable/disable the specific irq indication ID.
* @param[in] obj: The address of log uart object.
* @param[in] irq: The log uart interrupt indication ID which will be enabled/disabled.
* @param[in] enable: 1 enable, 0 disable
* @return None
*/
void log_uart_irq_set(log_uart_t *obj, LOG_UART_INT_ID irq, uint32_t enable);
/**
* @brief Read one character from log uart.
This function will block untill the log uart gets something to read
* @param[in] obj: The address of log uart object.
* @return the character read from log uart
*/
char log_uart_getc(log_uart_t *obj);
/**
* @brief Write one character to log uart.
This function will block untill the data is successfully written to log uart
* @param[in] obj: The address of log uart object.
* @param[in] c: The one byte data to be written to log uart.
* @return None
*/
void log_uart_putc(log_uart_t *obj, char c);
/**
* @brief Check whether log uart is ready to read data
* @param[in] obj: The address of log uart object.
* @return 1 if there is data at log uart to be read, 0 otherwise
*/
int log_uart_readable(log_uart_t *obj);
/**
* @brief Check whether log uart is ready to write data
* @param[in] obj: The address of log uart object.
* @return 1 if log uart is ready for writing, 0 otherwise
*/
int log_uart_writable(log_uart_t *obj);
/**
* @brief Clear both data at log uart
This function will clear data in both TX FIFO and RX FIFO of log uart
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_clear(log_uart_t *obj);
/**
* @brief Clear TX FIFO of log uart
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_clear_tx(log_uart_t *obj);
/**
* @brief Clear RX FIFO of log uart
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_clear_rx(log_uart_t *obj);
/**
* @brief Set break control for log uart
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_break_set(log_uart_t *obj);
/**
* @brief Clear break control for log uart
* @param[in] obj: The address of log uart object.
* @return None
*/
void log_uart_break_clear(log_uart_t *obj);
/**
* @brief Set the handler for complete TX
* @param[in] obj: The address of log uart object.
* @param[in] handler: The function which is called when log uart has finished transmitting data.
* @param[in] id: The parameter for handler.
* @return None
*/
void log_uart_tx_comp_handler(log_uart_t *obj, void *handler, uint32_t id);
/**
* @brief Set the handler for complete RX
* @param[in] obj: The address of log uart object.
* @param[in] handler: The function which is called when log uart has finished receving data
* @param[in] id: The parameter for handler.
* @return None
*/
void log_uart_rx_comp_handler(log_uart_t *obj, void *handler, uint32_t id);
/**
* @brief Set the handler for line status
* @param[in] obj: The address of log uart object.
* @param[in] handler: The function which is called when log uart gets an line status indication ID.
* @param[in] id: The parameter for handler.
* @return None
*/
void log_uart_line_status_handler(log_uart_t *obj, void *handler, uint32_t id);
/**
* @brief Read data from log uart in blocking mode.
* @param[in] obj: The address of log uart object.
* @param[out] prxbuf: The buffer to store received data.
* @param[in] len: The maximum length of data to be read
* @param[in] timeout_ms: Blocking time in ms.
* @return the length of received data in bytes
*/
int32_t log_uart_recv(log_uart_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms);
/**
* @brief Send data to log uart in blocking mode
* @param[in] obj: The address of log uart object.
* @param[in] ptxbuf: Data buffer to be sent to log uart
* @param[in] len: Length of data to be sent to log uart
* @param[in] timeout_ms: Blocking time in ms.
* @return the length of sent data in bytes
*/
int32_t log_uart_send(log_uart_t *obj, char *ptxbuf, uint32_t len, uint32_t timeout_ms);
/**
* @brief Read data from log uart in interrupt mode(Non-blocking)
* @param[in] obj: The address of log uart object.
* @param[out] prxbuf: The buffer to store received data.
* @param[in] len: The maximum length of data to be read
* @return 0 if success
*/
int32_t log_uart_recv_stream(log_uart_t *obj, char *prxbuf, uint32_t len);
/**
* @brief Send data to log uart in interrupt mode(Non-blocking)
* @param[in] obj: The address of log uart object.
* @param[in] ptxbuf: Data buffer to be sent to log uart
* @param[in] len: Length of data to be sent to log uart
* @return 0 if success
*/
int32_t log_uart_send_stream(log_uart_t *obj, char *ptxbuf, uint32_t len);
/**
* @brief Read data from log uart with a given timeout in interrupt mode(Non-blocking)
* @param[in] obj: The address of log uart object.
* @param[out] prxbuf: The buffer to store received data.
* @param[in] len: The maximum length of data to be read
* @param[in] timeout_ms: The timeout for reading data in ms
* @param[in] force_cs: User callback function
* @return the length in Byte of received data before timeout, or error (< 0)
*/
int32_t log_uart_recv_stream_timeout(log_uart_t *obj, char *prxbuf, uint32_t len,
uint32_t timeout_ms, void *force_cs);
/**
* @brief Abort interrupt mode of sending data
* @param[in] obj: The address of log uart object.
* @return the length of data sent to log uart.
*/
int32_t log_uart_send_stream_abort(log_uart_t *obj);
/**
* @brief Abort interrupt mode of receiving data
* @param[in] obj: The address of log uart object.
* @return the length of data received from log uart.
*/
int32_t log_uart_recv_stream_abort(log_uart_t *obj);
/**
* @brief Disable log uart
* @param[in] obj: The address of log uart object.
* @return None.
*/
void log_uart_disable(log_uart_t *obj);
/**
* @brief Enable log uart
* @param[in] obj: The address of log uart object.
* @return None.
*/
void log_uart_enable(log_uart_t *obj);
/**
* @brief Read Line-Status register
* @return value:
* - Bit 0: RX Data Ready
* - Bit 1: Overrun Error
* - Bit 2: Parity Error
* - Bit 3: Framing Error
* - Bit 4: Break Interrupt (received data input is held in 0 state for a longer than a full word tx time)
* - Bit 5: TX FIFO empty (THR empty)
* - Bit 6: TX FIFO empty (THR & TSR both empty)
* - Bit 7: Receiver FIFO Error (parity error, framing error or break indication)
*/
uint8_t log_uart_raed_lsr(log_uart_t *obj);
/**
* @brief Read Modem-Status register
* @return value:
* - Bit 0: DCTS, The CTS line has changed its state
* - Bit 1: DDSR, The DSR line has changed its state
* - Bit 2: TERI, RI line has changed its state from low to high state
* - Bit 3: DDCD, DCD line has changed its state
* - Bit 4: Complement of the CTS input
* - Bit 5: Complement of the DSR input
* - Bit 6: Complement of the RI input
* - Bit 7: Complement of the DCD input
*/
uint8_t log_uart_raed_msr(log_uart_t *obj);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif //CONFIG_PLATFORM_8195A
#endif // end of "#ifndef LOG_UART_API_H"
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/log_uart_api.h
|
C
|
apache-2.0
| 12,054
|
/******************************************************************************
*
* Copyright(c) 2007 - 2021 Realtek Corporation. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************/
#ifndef MBED_NFC_API_H
#define MBED_NFC_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
#define NFCTAGLENGTH 36 // maximum 36*4=144 bytes
#define NFC_MAX_CACHE_PAGE_NUM 36 // maximum 36*4=144 bytes
typedef enum _NFC_STATUS_ {
NFC_OK = 0,
NFC_ERROR = -1
}NFC_STATUS, *PNFC_STATUS;
typedef enum _NFC_PWR_STATUS_ {
NFC_PWR_DISABLE = 0,
NFC_PWR_RUNNING = 1,
NFC_PWR_SLEEP0 = 2,
NFC_PWR_SLEEP1 = 3,
NFC_PWR_DOWN = 4,
NFC_PWR_ERROR = -1
}NFC_PWR_STATUS, *PNFC_PWR_STATUS;
typedef enum _NFC_EVENT_ {
NFC_EV_READER_PRESENT = (1<<0),
NFC_EV_READ = (1<<1),
NFC_EV_WRITE = (1<<2),
NFC_EV_ERR = (1<<3),
NFC_EV_CACHE_READ = (1<<4)
}NFC_EVENT, *PNFC_EVENT;
typedef struct nfctag_s nfctag_t;
typedef void (*nfc_read_cb)(void *arg, void *buf, unsigned int page);
typedef void(*nfc_write_cb)(void *arg, unsigned int page, uint32_t pgdat);
typedef void(*nfc_event_cb)(void *arg, unsigned int event);
typedef void(*nfc_cache_read_cb)(void *arg, void *buf, unsigned int page);
int nfc_init(nfctag_t *obj, uint32_t *pg_init_val);
void nfc_read(nfctag_t *obj, nfc_read_cb handler, void *arg);
void nfc_write(nfctag_t *obj, nfc_write_cb handler, void *arg);
void nfc_event(nfctag_t *obj, nfc_event_cb handler, void *arg, unsigned int event_mask);
int nfc_power(nfctag_t *obj, int pwr_mode, int wake_event);
int nfc_cache_write(nfctag_t *obj, uint32_t *tbuf, unsigned int spage, unsigned int pg_num);
int nfc_cache_raed(nfctag_t *obj, nfc_cache_read_cb handler, void *arg, unsigned int start_pg);
int nfc_status(nfctag_t *obj);
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/nfc_api.h
|
C
|
apache-2.0
| 2,437
|
/** mbed Microcontroller Library
******************************************************************************
* @file pcm_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed I2S API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_EXT_PCM_API_EXT_H
#define MBED_EXT_PCM_API_EXT_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup pcm PCM
* @ingroup hal
* @brief pcm functions
* @{
*/
typedef enum {
U_LAW = PCM_U_LAW,
A_LAW = PCM_A_LAW
} pcm_ua_law;
typedef enum {
CH0 = PCM_CH0,
CH1 = PCM_CH1,
CH2 = PCM_CH2,
CH3 = PCM_CH3,
CH4 = PCM_CH4,
CH5 = PCM_CH5,
CH6 = PCM_CH6,
CH7 = PCM_CH7,
CH8 = PCM_CH8,
CH9 = PCM_CH9,
CH10 = PCM_CH10,
CH11 = PCM_CH11,
CH12 = PCM_CH12,
CH13 = PCM_CH13,
CH14 = PCM_CH14,
CH15 = PCM_CH15
} pcm_ch;
typedef enum {
SLOT0 = PCM_SLOT0,
SLOT1 = PCM_SLOT1,
SLOT2 = PCM_SLOT2,
SLOT3 = PCM_SLOT3,
SLOT4 = PCM_SLOT4,
SLOT5 = PCM_SLOT5,
SLOT6 = PCM_SLOT6,
SLOT7 = PCM_SLOT7,
SLOT8 = PCM_SLOT8,
SLOT9 = PCM_SLOT9,
SLOT10 = PCM_SLOT10,
SLOT11 = PCM_SLOT11,
SLOT12 = PCM_SLOT12,
SLOT13 = PCM_SLOT13,
SLOT14 = PCM_SLOT14,
SLOT15 = PCM_SLOT15,
SLOT16 = PCM_SLOT16,
SLOT17 = PCM_SLOT17,
SLOT18 = PCM_SLOT18,
SLOT19 = PCM_SLOT19,
SLOT20 = PCM_SLOT20,
SLOT21 = PCM_SLOT21,
SLOT22 = PCM_SLOT22,
SLOT23 = PCM_SLOT23,
SLOT24 = PCM_SLOT24,
SLOT25 = PCM_SLOT25,
SLOT26 = PCM_SLOT26,
SLOT27 = PCM_SLOT27,
SLOT28 = PCM_SLOT28,
SLOT29 = PCM_SLOT29,
SLOT30 = PCM_SLOT30,
SLOT31 = PCM_SLOT31
} pcm_slot;
typedef enum {
PCM_MASTER = PCM_MASTER_MODE,
PCM_SLAVE = PCM_SLAVE_MODE
} pcm_ms_mode;
typedef enum {
FRAME_HIGH_ACTIVE = PCM_FRAME_HIGH_ACTIVE,
FRAME_LOW_ACTIVE = PCM_FRAME_LOW_ACTIVE
} pcm_frame_active;
typedef enum {
COMPENDER_MODE = PCM_COMPENDER_MODE,
LINEAR_MODE = PCM_LINEAR_MODE
} pcm_mode;
typedef enum {
PCM_LOOPBACK_DIS = PCM_LOOPBACK_DISABLE,
PCM_LOOPBACK_EN = PCM_LOOPBACK_ENABLE
} pcm_loopback_mode;
typedef enum {
ENDIANSWAP_DISABLE = PCM_ENDIANSWAP_DISABLE,
ENDIANSWAP_ENABLE = PCM_ENDIANSWAP_ENABLE
} pcm_endian_swap;
typedef enum {
PCM_PAGE0 = 0,
PCM_PAGE1 = 1
} pcm_page;
typedef void (*pcm_irq_handler)(void *data, u16 *pbuf);
typedef struct pcm_s pcm_t;
/**
* @brief Initializes the PCM device, include clock/function/interrupt/PCM registers.
* @param obj: PCM object define in application software.
* @param sync: Fram sync PinName according to pinmux spec.
* @param clk: Clock PinName according to pinmux spec.
* @param out: Tx PinName according to pinmux spec.
* @param in: Rx PinName according to pinmux spec.
* @retval none
*/
void pcm_init(pcm_t *obj, PinName sync, PinName clk, PinName out, PinName in);
/**
* @brief Set tx interrupt handler according to channel
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @param handler: User defined IRQ callback function.
* @retval none
*/
void pcm_tx_irq_handler(pcm_t *obj, pcm_ch chan, pcm_irq_handler handler);
/**
* @brief Set rx interrupt handler according to channel
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @param handler: User defined IRQ callback function.
* @retval none
*/
void pcm_rx_irq_handler(pcm_t *obj, pcm_ch chan, pcm_irq_handler handler);
/**
* @brief Set the PCM format and parameters.
* @param obj: PCM object define in application software.
* @param ms_mode: Set master or slave mode
* @param linear_mode: Set linear or compender mode. when choose the compender mode, need to set A-law or U-law.
* @param loop_back: Use lookback mode.
* @param endian_swap: Use endian swap.
* @param fs_inv: Set frame sync is the high or low active.
* @retval none
*/
void pcm_set_format(pcm_t *obj, pcm_ms_mode ms_mode, pcm_mode linear_mode, pcm_loopback_mode loop_back, pcm_endian_swap endian_swap, pcm_frame_active fs_inv);
/**
* @brief Set the buffer address
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @param tx_buf: Set the address of tx buffer. Need 4-byte aligned.
* @param rx_buf: Set the address of rx buffer. Need 4-byte aligned.
* @retval none
*/
void pcm_set_dma_buffer(pcm_t *obj, pcm_ch chan, u16 *tx_buf, u16 *rx_buf);
/**
* @brief Control the tx and rx enable by the channel.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @param tx_en: To enable or disable.
* @param rx_en: To enable or disable.
* @retval none
*/
void pcm_chan_trx_ctrl(pcm_t *obj, pcm_ch chan, BOOL tx_en, BOOL rx_en);
/**
* @brief Set the page size of the channel.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @param page_size: Need the even number 2~512, page units: 2 bytes
* @retval none
*/
void pcm_chan_page_size(pcm_t *obj, pcm_ch chan, u32 page_size);
/**
* @brief Set the time slot of the channel. If configured as 16 bit linear mode, only even number time slot is allowed.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @param slot: Set the time slot, 0~31.
* @retval none
*/
void pcm_chan_time_slot(pcm_t *obj, pcm_ch chan, pcm_slot slot);
/**
* @brief Set the time slot for the wideband. If configured as 16 bit linear mode, only even number time slot is allowed.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel. The channel is only valid for CH0~CH7.
* @param wband_en: To enable or disable.
* @param wtsa: Set the time slot, SLOT0~SLOT31.
* @retval none
*/
void pcm_chan_wideband(pcm_t *obj, pcm_ch chan, BOOL wband_en, pcm_slot wtsa);
/**
* @brief Set U-law or A-law in the compender mode.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @param ua_law: Set U-law or A-law.
* @arg U_LAW: U-law.
* @arg A_LAW: A-law.
* @retval none
*/
void pcm_chan_compender_law(pcm_t *obj, pcm_ch chan, pcm_ua_law ua_law);
/**
* @brief Reset all channel setting and state machine.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_reset(pcm_t *obj);
/**
* @brief Clear interrupt status for all channels.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_clear_all_Intr(pcm_t *obj);
/**
* @brief Disable interrupt for all channels.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_disable_all_Intr(pcm_t *obj);
/**
* @brief Reset all logic and registers to initial state. Gate PCM Clock.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_disable(pcm_t *obj);
/**
* @brief Enable PCM and Clock
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_enable(pcm_t *obj);
/**
* @brief Deinitializes the PCM device, include function/interrupt/PCM registers.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_deinit(pcm_t *obj);
/**
* @brief Start the transmission for all enabled channels.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_start_trx(pcm_t *obj);
/**
* @brief Start this tx channel. This channel needs to enable first by pcm_chan_trx_ctrl.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
void pcm_start_tx_chan(pcm_t *obj, pcm_ch chan);
/**
* @brief Start this rx channel. This channel needs to enable first by pcm_chan_trx_ctrl.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
void pcm_start_rx_chan(pcm_t *obj, pcm_ch chan);
/**
* @brief Stop the transmission for all channels.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_stop_trx_all_chan(pcm_t *obj);
/**
* @brief Stop the tx transmission for all channels.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_stop_tx_all_chan(pcm_t *obj);
/**
* @brief Stop the rx transmission for all channels.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_stop_rx_all_chan(pcm_t *obj);
/**
* @brief Stop the tx transmission for this channel.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
void pcm_stop_tx_chan(pcm_t *obj, pcm_ch chan);
/**
* @brief Stop the rx transmission for this channel.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
void pcm_stop_rx_chan(pcm_t *obj, pcm_ch chan);
/**
* @brief Get the next address to be processed.
* This function needs in the interrupt handler.
* @param obj: PCM object define in application software.
* @retval none
*/
u8 *pcm_irq_get_tx_next_page_adr(pcm_t *obj);
/**
* @brief Inform PCM the tx page data is ready.
* This function needs in the interrupt handler.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_irq_set_txpage(pcm_t *obj);
/**
* @brief Inform PCM that finish receiving the rx page data.
* This function needs in the interrupt handler.
* @param obj: PCM object define in application software.
* @retval none
*/
void pcm_irq_set_rxpage(pcm_t *obj);
/**
* @brief Get the processing channel number in the interrupt handler.
* This function needs in the interrupt handler.
* @param obj: PCM object define in application software.
* @retval none
*/
u8 pcm_irq_get_channel(pcm_t *obj);
/**
* @brief Get the buffer size of the processing channel in the interrupt handler.
* This function needs in the interrupt handler.
* @param obj: PCM object define in application software.
* @retval none
*/
u32 pcm_irq_get_buffer_size(pcm_t *obj);
/**
* @brief Get the the page number of the processing channel in the interrupt handler.
* This function needs in the interrupt handler.
* @param obj: PCM object define in application software.
* @retval none
*/
u8 pcm_irq_get_page_0_or_1(pcm_t *obj);
/**
* @brief Get the next address of the channel to be processed.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
u8 *pcm_get_tx_next_page_adr(pcm_t *obj, pcm_ch chan);
/**
* @brief Inform PCM the tx page data of the channel is ready.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
void pcm_set_txpage(pcm_t *obj, pcm_ch chan);
/**
* @brief Inform PCM that finish receiving the rx page data of the channel.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
void pcm_set_rxpage(pcm_t *obj, pcm_ch chan);
/**
* @brief Get the buffer size of the channel.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
u32 pcm_get_buffer_size(pcm_t *obj, pcm_ch chan);
/**
* @brief Get the address of the tx page0 data.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
u32 pcm_get_tx_page0_adr(pcm_t *obj, pcm_ch chan);
/**
* @brief Get the address of the tx page1 data.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
u32 pcm_get_tx_page1_adr(pcm_t *obj, pcm_ch chan);
/**
* @brief Get the address of the rx page0 data.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
u32 pcm_get_rx_page0_adr(pcm_t *obj, pcm_ch chan);
/**
* @brief Get the address of the rx page1 data.
* @param obj: PCM object define in application software.
* @param chan: Set the PCM channel, CH0 ~ CH15.
* @retval none
*/
u32 pcm_get_rx_page1_adr(pcm_t *obj, pcm_ch chan);
///@}
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/pcm_api.h
|
C
|
apache-2.0
| 13,524
|
/*******************************************************************************
* Copyright (c) 2014, Realtek Semiconductor Corp.
* All rights reserved.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*******************************************************************************/
#ifndef MBED_EXT_POWER_MODE_API_EXT_H
#define MBED_EXT_POWER_MODE_API_EXT_H
#if (defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) || (defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1))
///@name AmebaPro Only
///@{
#include "device.h"
#if defined (CONFIG_PLATFORM_8195B)
/** @addtogroup power mode POWER MODE
* @ingroup hal
* @brief power mode functions
* @{
*/
#if defined (CONFIG_PLATFORM_8195BLP)
//SLP
#define SLP_STIMER BIT0
#define SLP_GTIMER BIT1
#define SLP_GPIO BIT2
#define SLP_PWM BIT3
#define SLP_UART BIT4
#define SLP_HSTIMER BIT5
#define SLP_WLAN BIT6
#define SLP_I2C BIT7
#define SLP_ADC BIT8
#define SLP_COMP BIT9
#define SLP_SGPIO BIT10
//DSTBY
#define DSTBY_STIMER BIT0
#define DSTBY_GTIMER BIT1
#define DSTBY_GPIO BIT2
#define DSTBY_PWM BIT3
#define DSTBY_UART BIT4
#define DSTBY_HSTIMER BIT5
#define DSTBY_WLAN BIT6
#define DSTBY_I2C BIT7
#define DSTBY_ADC BIT8
#define DSTBY_COMP BIT9
#define DSTBY_SGPIO BIT10
//DS wake event
#define DS_STIMER BIT0
#define DS_GPIO BIT1
#define DS_ADP BIT2
#define DS_RTC BIT3
#elif defined (CONFIG_PLATFORM_8195BHP)
//SLP
#define SLP_GTIMER BIT1
#define SLP_GPIO BIT2
#define SLP_PWM BIT3
#define SLP_UART BIT4
#define SLP_MII BIT5
#define SLP_WLAN BIT6
#define SLP_I2C BIT7
#define SLP_ADC BIT8
#define SLP_USB BIT9
#define SLP_SGPIO BIT10
#define SLP_SDIO BIT11
//DSTBY
#define DSTBY_GTIMER BIT1
#define DSTBY_GPIO BIT2
#endif
///@name Ameba Common
///@{
enum {
AON_128K = CLK_128K, // AON CLK 128kHz
AON_100K = CLK_100K, // AON CLK 100kHz
};
/**
* @brief The function for ls sleep mode.
*
* @param[in] Option, To slect AON Timer,GPIO...etc
* - bit[4]: the UART Wake up event.
* - bit[3]: the PWM Wake up event.
* - bit[2]: the GPIO A13 as a Wake up event.
* - bit[1]: the GTimer Wake up event. Only active at 128kHz
* - bit[0]: the AON Timer Wake up event.
* @param[in] SDuration, wake up after SDuration value. Uint: us
* @param[in] Clock, 1: 100kHz, 0: 128kHz.
* @param[in] GpioOption, GPIOA0~A13 as a wake up trigger.
*
* @returns void
*/
void SleepCG (u16 Option, u32 SDuration, u8 Clock, u8 GpioOption);
#if defined (CONFIG_PLATFORM_8195BHP)
/**
* @brief The function for hs power gated.
*
* @param[in] Option, To slect HS Timer and GPIO
* - bit[2]: the GPIO Wake up event.
* - bit[1]: the GTimer Wake up event.
* @param[in] SDuration, wake up after SDuration value. Uint: us
* @param[in] Memsel, 1: Enable memory, 0: Disable memory.
* @param[in] GpioOption, Select GPIO pin as a wake up trigger.
*
* @returns void
*/
void SleepPG (u16 Option, u32 SDuration, u8 Memsel, u8 GpioOption);
#endif
#if defined (CONFIG_PLATFORM_8195BLP)
/**
* @brief The function for ls standby mode.
*
* @param[in] Option, To slect AON Timer,GPIO...etc
* - bit[4]: the UART Wake up event.
* - bit[3]: the PWM Wake up event.
* - bit[2]: the GPIO Wake up event.
* - bit[1]: the GTimer Wake up event. Not ready
* - bit[0]: the AON Timer Wake up event.
* @param[in] SDuration, wake up after SDuration value. Uint: us
* @param[in] Memsel, 1: Enable memory, 0: Disable memory.
* @param[in] GpioOption, GPIOA0~A13 as a wake up trigger.
*
* @returns void
*/
void Standby (u16 Option, u32 SDuration, u8 Memsel, u8 GpioOption);
/**
* @brief The stubs functions table to exports POWER MODE HAL functions in ROM.
*/
//extern const hal_power_mode_func_stubs_t hal_power_mode_stubs;
/**
* @brief The function for ls deep sleep mode.
*
* @param[in] Option, To slect AON Timer,GPIO,ADP and RTC.
* - bit[2]: the ADP Wake up event.
* - bit[1]: the GPIO Wake up event.
* - bit[0]: the AON Timer Wake up event.
* @param[in] SDuration, wake up after SDuration value. Uint: us
* @param[in] Memsel, 1: Enable memory, 0: Disable memory.
* @param[in] Clock, 1: 100kHz, 0: 128kHz.
*
* @returns void
*/
void DeepSleep (u8 Option, u32 SDuration, u8 Memsel, u8 Clock);
/**
* @brief The function for ls deep sleep mode.
*
* @param[in] Option The RTC wake up event.
* - bit[3]: Wake up per day.
* - bit[2]: Wake up per hour.
* - bit[1]: Wake up per minute.
* - bit[0]: Wake up per second.
* @param[in] Memsel, 1: Enable memory, 0: Disable memory.
*
* @returns void
*/
void DeepSleep_RTC (u8 Option, u8 Memsel);
///@}
/*\@}*/
#endif
#endif
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8195BLP)"
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/power_mode_api.h
|
C
|
apache-2.0
| 5,467
|
/** mbed Microcontroller Library
******************************************************************************
* @file pwmout_ex_api.h
* @author
* @version V1.0.0
* @brief This file provides mbed pwm API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_PWMOUT_EX_API_H
#define MBED_PWMOUT_EX_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup pwm PWM
* @ingroup hal
* @brief pwm functions
* @{
*/
///@name Ameba Common
///@{
typedef void (*pwm_lim_callback_t) (void *, u8 dir);
typedef void (*pwm_period_callback_t) (void *);
/**
* @brief Set the start timing offset of the specified channel in seconds.
* @param obj: PWM object define in application software.
* @param seconds: The period value to be set in seconds.
* @retval none
*/
void pwmout_startoffset(pwmout_t *obj, float seconds);
/**
* @brief Set the start timing offset of the specified channel in millseconds.
* @param obj: PWM object define in application software.
* @param ms: The period value to be set in millseconds.
* @retval none
*/
void pwmout_startoffset_ms(pwmout_t *obj, int ms);
/**
* @brief Set the start timing offset of the specified channel in microseconds.
* @param obj: PWM object define in application software.
* @param us: The period value to be set in microseconds.
* @retval none
*/
void pwmout_startoffset_us(pwmout_t *obj, int us);
//typedef struct pwmout_s pwmout_t;
/**
* @brief To enable the PWM period end interrupt.
*
* @param obj: PWM object define in application software.
* @param callback The callback function. It will be called when the interrupt is accurred.
* @param arg The argument of the callback function.
* @param enable To enable(1) or disable(0) the interrupt. For interrupt disable, the arguments
* 'callback' & 'arg' are ignored.
* @returns void
*/
void pwmout_period_int(pwmout_t *obj, pwm_period_callback_t callback, u8 enable);
/**
* @brief To setup the PWM duty auto adjustment interrupt.
*
* @param obj: PWM object define in application software.
* @param callback The callback function. It will be called when the interrupt is accurred.
* @param direction The bit map to enable/disable the interrupt. Bit 1 control the interrupt of duty duration
* reachs the up limit. Bit 0 control the interrupt of duty duration reachs the down limit.
* @param enable To enable(1) or disable(0) the interrupt. For interrupt disable, the arguments
* 'callback' & 'arg' are ignored.
*
* @returns void
*/
void pwmout_autoadj_int (pwmout_t *obj, pwm_lim_callback_t callback, u8 direction, u8 enable);
/**
* @brief To start the PWM duty auto-adjustment for duty duration increasing.
*
* @param obj: PWM object define in application software.
* @param max_duty_us The up limit of the duty duration, in us.
* @param step_sz_us The step size of each duty duration increasing, in us.
* @param step_period_cnt The stay time of each duty duration increasing step, uint is PWM period.
*
* @returns The result.
*/
void pwmout_autoadj_inc(pwmout_t *obj, u32 max_duty_us, u32 step_sz_us, u32 step_period_cnt);
/**
* @brief To start the PWM duty auto-adjustment for duty duration decreasing.
*
* @param obj: PWM object define in application software.
* @param min_duty_us The up limit of the duty duration, in us.
* @param step_sz_us The step size of each duty duration increasing, in us.
* @param step_period_cnt The stay time of each duty duration increasing step, uint is PWM period.
*
* @returns The result.
*/
void pwmout_autoadj_dec(pwmout_t *obj, u32 min_duty_us, u32 step_sz_us, u32 step_period_cnt);
/**
* @brief To Eable the PWM function.
* @param obj: PWM object define in application software.
*
* @returns void
*/
void pwmout_start(pwmout_t *obj);
/**
* @brief To Disable the PWM function.
* @param obj: PWM object define in application software.
*
* @returns void
*/
void pwmout_stop(pwmout_t *obj);
/**
* @brief Eable the Multible PWM function/registers of the specified pin with default parameters in same time.
* @param pin_ctrl: the pinname of specified channel to be set. Bit 0 control the PWM0. Bit 1 control the PWM1.
* Bit 2 control the PWM2...etc
*
* @returns void
*/
void pwmout_multi_start(u8 pin_ctrl);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/pwmout_ex_api.h
|
C
|
apache-2.0
| 5,218
|
/** mbed Microcontroller Library
******************************************************************************
* @file qdec_api.h
* @author
* @version V1.0.0
* @brief
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_EXT_QDEC_API_EXT_H
#define MBED_EXT_QDEC_API_EXT_H
#if defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)
///@name AmebaPro Only
///@{
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup qdec QDEC
* @ingroup hal
* @brief qdec functions
* @{
*/
typedef enum {
QDEC_SClk_2M = QdecSClk_2M,
QDEC_SClk_32K = QdecSClk_32K,
QDEC_SClk_MAXID = QdecSClk_MAXID
} qdec_clk_source;
typedef enum {
ONE_PHASE_COUNT = One_Phase,
TWO_PHASE_COUNT = Two_Phase
} qdec_resolution;
typedef enum {
REF_INDEX = Index_Event,
PC_OVER_UNDER_FLOW = PC_Over_Or_Under_Flow
} qdec_rotation_source;
typedef enum {
INPUT_INIT_LOW = Input_Low,
INPUT_INIT_HIGH = Input_High
} qdec_index_level;
typedef enum {
INDEX_NO_RST = Disable_Rst,
INDEX_RST_1ST = Reset_1st_Index,
INDEX_RST_ALWAYS = Reset_Every_Index
} qdec_index_rst;
typedef enum {
PC_CHANGE_1_CNT = Pos_Chg1,
PC_CHANGE_2_CNT = Pos_Chg2,
PC_CHANGE_4_CNT = Pos_Chg4
} qdec_cnt_chg;
typedef enum {
CAL_PC_ABSOLUTE_CNT = Absolute_Count,
CAL_PC_NOT_ABSOLUTE_CNT = Not_Absolute_Count
} qdec_vmuc_mode;
typedef struct qdec_def_setting_s {
u8 smp_div; /*!< Sampling Clock = source clock/(smp_div+1). Value: 0 ~ 31. */
qdec_resolution resolution; /*!< The position accumulation counter. 0: 1 phase, 1: 2 phases. Only phase A edges are counted. */
u16 pc_maximum; /*!< The maximum value of the position counter. Value: 0 ~ 65535. */
qdec_rotation_source rotation_mode; /*!< 0: accumulate the rotation number when the index event occurres with direction(+/-), 1: accumulate the rotation number when the position counter occurres overflow(+)/underflow(-). */
BOOL filter_enable; /*!< 0: disable de-bounce. 1: enable de-bounce. */
u16 filter_time; /*!< De-bounce timer configuration, Value: 0 ~ 2047, unit is sclk: 0.5us or 31.25us. The time needs a little bigger than the maximum period of noise. */
BOOL index_enable; /*!< 0: The index pulse signal detection is disabled. 1: enable. */
qdec_index_level index_level; /*!< 0: The index input is low. 1: The index input is lhigh. */
qdec_index_rst index_rst; /*!< The index input can reset the position counter. 0: disable, 1: only reset 1st, 2: reset every index. */
} qdec_def_setting_t, *pqdec_def_setting_t;
typedef void (*qdec_irq_handler)(void *);
typedef struct qdec_s qdec_t;
/**
* @brief Initializes the QDEC device, include clock/function/interrupt/QDEC registers.
* @param obj: QDEC object define in application software.
* @param pha: PHA PinName according to pinmux spec.
* @param phb: PHB PinName according to pinmux spec.
* @param idx: IDX PinName according to pinmux spec. This pin is not configured when set PinName "NC".
* @param source_clk: The clock source of the quadrature decoder.
* @arg 0 : 2MHz
* @arg 1 : 32KHz
* @retval none
*/
void qdec_init (qdec_t *obj, PinName pha, PinName phb, PinName idx, qdec_clk_source source_clk);
/**
* @brief Deinitializes the QDEC device, include function/interrupt/QDEC registers.
* @param obj: QDEC object define in application software.
* @retval none
*/
void qdec_deinit (qdec_t *obj);
/**
* @brief Set the clock source, and the clock divider
* @param obj: QDEC object define in application software.
* @param smp_div: Sampling Clock = source clock/(smp_div+1). Value: 0 ~ 31.
* @retval none
*/
void qdec_set_sampling_div (qdec_t *obj, u8 smp_div);
/**
* @brief Set the position accumulation counter.
* @param obj: QDEC object define in application software.
* @param resolution: The resolution of the quadrature decoder.
* @arg 0 : 1 phase
* @arg 1 : 2 phases. Only phase A edges are counted.
* @retval none
*/
void qdec_set_resolution (qdec_t *obj, qdec_resolution resolution);
/**
* @brief Set the position accumulation counter.
* @param obj: QDEC object define in application software.
* @param pc_maximum: The maximum value of the position counter is according to the quadrature encoder. Value: 0 ~ 65535.
* @retval none
*/
void qdec_set_pc_maximum (qdec_t *obj, u16 pc_maximum);
/**
* @brief Set the method for calculating the rotation.
* @param obj: QDEC object define in application software.
* @param rotation_mode: The rotation mode.
* @arg 0 : Accumulate the rotation number when the index event occurres with direction(+/-).
* @arg 1 : Accumulate the rotation number when the position counter occurres overflow(+)/underflow(-).
* @retval none
*/
void qdec_set_rotation_mode (qdec_t *obj, qdec_rotation_source rotation_mode);
/**
* @brief Set the glitch filter.
* @param obj: QDEC object define in application software.
* @param filter_enable: To enable or disable.
* @param filter_time: Set de-bounce time = filter_time x clock source unit, clock source unit is 0.5us or 31.25us.
* @retval none
*/
void qdec_set_filter_init (qdec_t *obj, BOOL filter_enable, u16 filter_time);
/**
* @brief Configure the function of the index pin.
* @param obj: QDEC object define in application software.
* @param index_enable: To enable or disable.
* @param index_level: Set the used level according to the quadrature encoder.
* @param index_rst: The index input can reset the position counter.
* @arg 0 : disable.
* @arg 1 : only reset 1st.
* @arg 2 : always reset.
* @retval none
*/
void qdec_set_index_init (qdec_t *obj, BOOL index_enable, qdec_index_level index_level, qdec_index_rst index_rst);
/**
* @brief Control quadrature decoder.
* @param obj: QDEC object define in application software.
* @param qdec_en_ctrl: To enable or disable.
* @retval none
*/
void qdec_set_en (qdec_t *obj, BOOL qdec_en_ctrl);
/**
* @brief Control the interrupt event when change the direction.
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_position_direction_change_init (qdec_t *obj, BOOL en, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Set a value changed on the position counter which will trigger the position changed interrupt.
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param count_change_value: This field set a value changed on the position counter which will trigger the position changed interrupt.
* @arg 00: +/- 1.
* @arg 01: +/- 2.
* @arg 10: +/- 4.
* @arg 11: reserved.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_position_count_change_init (qdec_t *obj, BOOL en, qdec_cnt_chg count_change_value, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event when the position counter is equal to the compare value.
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param compare_value: If the position counter is equal to this value, the corresponding interrupt will be asserted. The value is 0x00~0xFFFF.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_position_compare_init (qdec_t *obj, BOOL en, u16 compare_value, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event when the position counter value is overflow (Max position counter -> 0x0000).
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_position_overflow_init (qdec_t *obj, BOOL en, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event when the position counter value is underflow (0x0000 -> Max position counter).
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_position_underflow_init (qdec_t *obj, BOOL en, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event when the rotation counter is equal to the rotation value.
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param compare_value: If the rotation counter is equal to this value, the corresponding interrupt will be asserted. The value is 0x00~0xFFF.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_rotation_compare_init (qdec_t *obj, BOOL en, u16 compare_value, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event when the rotation counter value is overflow (Max rotation counter -> 0x0000).
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_rotation_overflow_init (qdec_t *obj, BOOL en, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event when the rotation counter value is underflow (0x0000 -> Max position counter).
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_rotation_underflow_init (qdec_t *obj, BOOL en, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event when get the velocity by measuring the counts in a period of time.
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param vmuc_mode: Control the measurement value.
* @arg 0 : the counter value uses the absolute value.
* @arg 1 : the counter value does not use the absolute value.
* @param time_us: Measure time. This unit is us.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_velocity_measure_cnt_init (qdec_t *obj, BOOL en, qdec_vmuc_mode vmuc_mode, u32 time_us, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event. The measuring counts is less than the low limit when execute the velocity function.
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param low_limit_cnt: The low limit value is 0x00~0xFFFF.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_velocity_measure_cnt_lowlmt_init (qdec_t *obj, BOOL en, u16 low_limit_cnt, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event. The measuring counts is bigger than the up limit when execute the velocity function.
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param up_limit_cnt: The up limit value is 0x00~0xFFFF.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_velocity_measure_cnt_uplmt_init (qdec_t *obj, BOOL en, u16 up_limit_cnt, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event for detecting the index.
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_index_present_init (qdec_t *obj, BOOL en, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Control the interrupt event for checking that the position counter is zero at the present of index.
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @param qdec_cb: User defined IRQ callback function.
* @param pqdec_arg: User defined IRQ callback parameter.
* @retval none
*/
void qdec_set_index_check_position_init (qdec_t *obj, BOOL en, qdec_irq_handler qdec_cb, void *pqdec_arg);
/**
* @brief Reset the position counter and machine.
* @param obj: QDEC object define in application software.
* @retval none
*/
void qdec_position_reset (qdec_t *obj);
/**
* @brief Reset the rotation counter and machine.
* @param obj: QDEC object define in application software.
* @retval none
*/
void qdec_rotation_reset (qdec_t *obj);
/**
* @brief Reset the velocity counter and machine.
* @param obj: QDEC object define in application software.
* @retval none
*/
void qdec_velocity_cnt_reset (qdec_t *obj);
/**
* @brief Start the timer to measure the velocity.
* @param obj: QDEC object define in application software.
* @param en: To enable or disable.
* @retval none
*/
void qdec_start_velocity_measure_cnt (qdec_t *obj, BOOL en);
/**
* @brief Get the velocity counts.
* @param obj: QDEC object define in application software.
* @retval The capture value of the velocity counter.
*/
u16 qdec_get_velocity_measure_cnt (qdec_t *obj);
/**
* @brief Calculate RPM (Revolution Per Minute) according to the velocity counts.
* @param obj: QDEC object define in application software.
* @param velocity_cnt: The velocity counts.
* @retval RPM
*/
float qdec_get_velocity_measure_cnt_rpm (qdec_t *obj, u16 velocity_cnt);
/**
* @brief Get the position counter of QDEC.
* @param obj: QDEC object define in application software.
* @retval Position counter 16bits.
*/
u16 qdec_get_position (qdec_t *obj);
/**
* @brief Get the rotation counter of QDEC.
* @param obj: QDEC object define in application software.
* @retval Rotation counter 12bits.
*/
u16 qdec_get_rotation (qdec_t *obj);
/**
* @brief Get the movement direction of QDEC.
* @param obj: QDEC object define in application software.
* @retval 0: decrease, 1: increase
*/
u8 qdec_get_direction (qdec_t *obj);
/**
* @brief Get the phase state of QDEC.
* @param obj: QDEC object define in application software.
* @retval Current state of (A, B) phase
*/
u8 qdec_get_phase_state (qdec_t *obj);
/*\@}*/
#ifdef __cplusplus
}
#endif
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP)"
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/qdec_api.h
|
C
|
apache-2.0
| 16,085
|
/******************************************************************************
*
* Copyright(c) 2007 - 2021 Realtek Corporation. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************/
#ifndef MBED_SERIAL_EX_API_H
#define MBED_SERIAL_EX_API_H
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup uart_ex UART_EX
* @ingroup hal
* @brief uart extended functions
* @{
*/
///@name Ameba Common
///@{
/**
* @brief Define RX FIFO Level: RX interrupt trigger, RTS de-assert trigger
*/
typedef enum {
FifoLv1Byte=0, /*!< 1-byte */
FifoLvQuarter=1, /*!< 4-byte/8-byte(for 8195B) */
FifoLvHalf=2, /*!< 8-byte/16-byte(for 8195B) */
FifoLvFull=3 /*!< 14-byte/30-bytes(for 8195B) */
} SerialFifoLevel;
/**
* @brief Clear TX fifo.
* @param obj: uart object define in application software.
* @retval none
*/
void serial_clear_tx(serial_t *obj);
/**
* @brief Clear RX fifo.
* @param obj: uart object define in application software.
* @retval none
*/
void serial_clear_rx(serial_t *obj);
/**
* @brief set TX complete handler.
* @param obj: uart object define in application software.
* @param handler: TX complete callback function.
* @param id: TX complete callback function parameter.
* @retval none
* @note this function is used when asynchronous API is used.
*/
void serial_send_comp_handler(serial_t *obj, void *handler, uint32_t id);
/**
* @brief set RX complete handler.
* @param obj: uart object define in application software.
* @param handler: RX complete callback function.
* @param id: RX complete callback function parameter.
* @retval none
* @note this function is used when asynchronous API is used.
*/
void serial_recv_comp_handler(serial_t *obj, void *handler, uint32_t id);
/**
* @brief recv target length data use poll mode, with time out.
* @param obj: uart object define in application software.
* @param ptxbuf: buffer to be written to Tx FIFO.
* @param len: number of data to be recv.
* @param timeout_ms: polling time before timeout.
* @retval : return received bytes count
* @note this function is synchronous API.
*/
int32_t serial_recv_blocked(serial_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms);
/**
* @brief send target length data use poll mode, with time out.
* @param obj: uart object define in application software.
* @param ptxbuf: buffer to be written to Tx FIFO.
* @param len: number of data to be send.
* @param timeout_ms: polling time before timeout.
* @retval : transmitted bytes count
* @note this function is synchronous API.
*/
int32_t serial_send_blocked(serial_t *obj, char *ptxbuf, uint32_t len, uint32_t timeout_ms);
/**
* @brief recv target length data use interrupt mode.
* @param obj: uart object define in application software.
* @param prxbuf: buffer to save data read from UART FIFO.
* @param len: number of data to be read.
* @retval : HAL_Status
* @note this function is asynchronous API.
*/
int32_t serial_recv_stream(serial_t *obj, char *prxbuf, uint32_t len);
/**
* @brief send target length data use interrupt mode.
* @param obj: uart object define in application software.
* @param ptxbuf: buffer to be written to Tx FIFO.
* @param len: number of data to be send.
* @retval : HAL_Status
* @note this function is asynchronous API.
*/
int32_t serial_send_stream(serial_t *obj, char *ptxbuf, uint32_t len);
/**
* @brief recv target length data use DMA mode.
* @param obj: uart object define in application software.
* @param prxbuf: buffer to save data read from UART FIFO.
* @param len: number of data to be read.
* @retval : HAL_Status
* @note this function is asynchronous API.
*/
int32_t serial_recv_stream_dma(serial_t *obj, char *prxbuf, uint32_t len);
/**
* @brief send target length data use DMA mode.
* @param obj: uart object define in application software.
* @param ptxbuf: buffer to be written to Tx FIFO.
* @param len: number of data to be send.
* @retval : HAL_Status
* @note this function is asynchronous API.
*/
int32_t serial_send_stream_dma(serial_t *obj, char *ptxbuf, uint32_t len);
/**
* @brief stop the stream or stream_dma TX.
* @param obj: uart object define in application software.
* @retval : number of bytes sent before stop
*/
int32_t serial_send_stream_abort(serial_t *obj);
/**
* @brief stop the stream or stream_dma RX.
* @param obj: uart object define in application software.
* @retval : number of bytes received before stop
*/
int32_t serial_recv_stream_abort(serial_t *obj);
/**
* @brief disable uart clock and function.
* @param obj: uart object define in application software.
* @retval none
*/
void serial_disable(serial_t *obj);
/**
* @brief enable uart clock and function.
* @param obj: uart object define in application software.
* @retval none
*/
void serial_enable(serial_t *obj);
/**
* @brief recv target length data use interrupt mode.
* @param obj: uart object define in application software.
* @param prxbuf: buffer to save data read from UART FIFO.
* @param len: number of data to be recv.
* @param timeout_ms: polling time before timeout.
* @param force_cs: forcing context switch function.
* @retval : the byte count received before timeout, or error(<0)
* @note this function is asynchronous API.
*/
int32_t serial_recv_stream_timeout(serial_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms, void *force_cs);
/**
* @brief recv target length data use DMA mode.
* @param obj: uart object define in application software.
* @param prxbuf: buffer to save data read from UART FIFO.
* @param len: number of data to be recv.
* @param timeout_ms: polling time before timeout.
* @param force_cs: forcing context switch function.
* @retval : the byte count received before timeout, or error(<0)
* @note this function is asynchronous API. Some parameters have changed for AmebaD.
*/
int32_t serial_recv_stream_dma_timeout(serial_t *obj, char *prxbuf, uint32_t len, uint32_t timeout_ms, void *force_cs);
///@}
/*\@}*/
#ifdef __cplusplus
}
#endif
#endif // #ifndef MBED_SERIAL_EX_API_H
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/serial_ex_api.h
|
C
|
apache-2.0
| 6,862
|
/** mbed Microcontroller Library
******************************************************************************
* @file sgpio_api.h
* @author
* @version V1.0.0
* @brief This file provides following mbed I2S API
******************************************************************************
* @attention
*
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
******************************************************************************
*/
#ifndef MBED_EXT_SGPIO_API_EXT_H
#define MBED_EXT_SGPIO_API_EXT_H
#if (defined(CONFIG_PLATFORM_8195BHP) && (CONFIG_PLATFORM_8195BHP == 1)) || (defined(CONFIG_PLATFORM_8195BLP) && (CONFIG_PLATFORM_8195BLP == 1))
///@name AmebaPro Only
///@{
#include "device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup sgpio SGPIO
* @ingroup hal
* @brief sgpio functions
* @{
*/
typedef enum {
RXTC_NO_TRIGGER = Rxtc_None,
RXTC_RISE_EDGE = Rxtc_InputRiseEg,
RXTC_FALL_EDGE = Rxtc_InputFallEg,
RXTC_BOTH_EDGE = Rxtc_InputBothEg,
RXTC_ACTIVE = 4
} sgpio_rxtc_input_start;
typedef enum {
RXTC_MATCH_EVENT0 = Rxtc_MatchEvent0,
RXTC_MATCH_EVENT1 = Rxtc_MatchEvent1,
RXTC_MATCH_EVENT2 = Rxtc_MatchEvent2
} sgpio_rxtc_match_event;
typedef enum {
CAP_NO_TRIGGER = Cap_None,
CAP_RISE_EDGE = Cap_InputRiseEg,
CAP_FALL_EDGE = Cap_InputFallEg,
CAP_BOTH_EDGE = Cap_InputBothEg,
CAP_MULTC_MATCH_EVENT0 = Cap_MultcMatchEvent0
} sgpio_capture_type;
typedef enum {
MULTC_TIMER = Multc_Timer_Mode,
MULTC_COUNTER_RISE_EDGE = Multc_Counter_InputRiseEg,
MULTC_COUNTER_FALL_EDGE = Multc_Counter_InputFallEg,
MULTC_COUNTER_BOTH_EDGE = Multc_Counter_InputBothEg
} sgpio_multc_mode;
typedef enum {
INPUT_NO_TRIGGER = Input_None,
INPUT_RISE_EDGE = Input_RiseEdge,
INPUT_FALL_EDGE = Input_FallEdge,
INPUT_BOTH_EDGE = Input_BothEdge
} sgpio_counter_edge;
typedef enum {
MULTC_MATCH_EVENT0 = Multc_MatchEvent0,
MULTC_MATCH_EVENT1 = Multc_MatchEvent1,
MULTC_MATCH_EVENT2 = Multc_MatchEvent2,
MULTC_MATCH_EVENT3 = Multc_MatchEvent3
} sgpio_multc_match_event;
typedef enum {
MULTC_MATCH_GROUP0 = Multc_MatchGroup0,
MULTC_MATCH_GROUP1 = Multc_MatchGroup1
} sgpio_multc_match_group;
typedef enum {
MATCH_OUTPUT_NONE = External_None,
MATCH_OUTPUT_LOW = External_Low,
MATCH_OUTPUT_HIGH = External_High,
MATCH_OUTPUT_TOGGLE = External_Toggle
} sgpio_external_output;
typedef enum {
INPUT_ONLY = Rx_Input_Only,
BIDIRECTION = Rx_In_And_Output
} sgpio_rx_inoutput;
typedef enum {
OUTPUT_LOW = Output_Is_Low,
OUTPUT_HIGH = Output_Is_High
} sgpio_output_value;
typedef enum {
FIRST_LSB = First_Data_LSB,
FIRST_MSB = First_Data_MSB
} sgpio_first_msb_or_lsb;
typedef enum {
GET_BIT0 = Compare_Result_Bit0,
GET_BIT1 = Compare_Result_Bit1
} sgpio_cmp_result_bit;
typedef enum {
UNIT_US = Time_unit_us,
UNIT_NS = Time_unit_ns
} sgpio_time_unit;
typedef enum {
TIMER_US = Timer_mode_unit_us,
TIMER_NS = Timer_mode_unit_ns,
COUNTER_CNT = Countr_mode_unit_cnt
} sgpio_source_unit;
typedef enum {
RXTC_INACTIVE = 0x00,
RXTC_RESET = 0x01,
RXTC_STOP = 0x02,
RXTC_RESET_STOP = 0x03
} sgpio_rxtc_ctrl;
typedef enum {
MULTC_INACTIVE = 0x00,
MULTC_RESET = 0x01,
MULTC_STOP = 0x02,
MULTC_RESET_STOP = 0x03
} sgpio_multc_ctrl;
typedef void (*sgpio_irq_handler)(void *);
typedef struct sgpio_s sgpio_t;
/**
* @brief Initializes the SGPIO device, include clock/function/interrupt/SGPIO registers.
* @param obj: SGPIO object define in application software.
* @param tx: Tx PinName according to pinmux spec.
* @param bi_dir_rx: Bidirectional Rx PinName according to pinmux spec.
* @retval none
*/
void sgpio_init (sgpio_t *obj, PinName tx, PinName bi_dir_rx);
/**
* @brief Deinitializes the SGPIO device, include function/interrupt/SGPIO registers.
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_deinit (sgpio_t *obj);
/**
* @brief Be able to release the SGPIO pins from the pin mux after initializes the SGPIO device.
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_pin_free (sgpio_t *obj);
/**
* @brief Reset SGPIO and registers.
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_reset (sgpio_t *obj);
/**
* @brief Configure SGPIO to become the rxtc timer. Use RXTC.
* @param obj: SGPIO object define in application software.
* @param timer_once_en: Enable that matching event is executed once.
* @arg 0 : Repeat. When the rxtc timer matches match_reset_value_time, only reset the timer.
* @arg 1 : Once. When the rxtc timer matches match_reset_value_time, reset and stop the timer.
* @param time_unit: Select the time unit.
* @arg 0 : The unit is us.
* @arg 1 : The unit is ns.
* @param match_time1: Matching this time 1 generates the interrupt.
* @param match_time1_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param pmatch_time1_arg: User defined IRQ callback parameter.
*
* @param match_time2: Matching this time 2 generates the interrupt.
* @param match_time2_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param pmatch_time2_arg: User defined IRQ callback parameter.
*
* @param match_time_reset: This match time is able to make the timer reset and stop.
* @param time_reset_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param ptime_reset_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_rxtc_timer_mode (sgpio_t *obj, BOOL timer_once_en, sgpio_time_unit time_unit,
u32 match_time1, sgpio_irq_handler match_time1_cb, void *pmatch_time1_arg,
u32 match_time2, sgpio_irq_handler match_time2_cb, void *pmatch_time2_arg,
u32 match_time_reset, sgpio_irq_handler time_reset_cb, void *ptime_reset_arg);
/**
* @brief Generate the external output when happen the match events of the rxtc timer.
* @param obj: SGPIO object define in application software.
* @param match_time1_output: Set the output value when match the time 1.
* @arg 0 : Inactive.
* @arg 1 : The output is low.
* @arg 2 : The output is high.
* @arg 3 : Toggle.
* @param match_time2_output: Set the output value when match the time 2.
* @param match_reset_time_output: Set the output value when match the reset time.
* @retval none
*/
void sgpio_rxtc_timer_match_output (sgpio_t *obj, sgpio_external_output match_time1_output, sgpio_external_output match_time2_output,
sgpio_external_output match_reset_time_output);
/**
* @brief Control to start the rxtc timer. Use RXTC.
* @param obj: SGPIO object define in application software.
* @param start_en: To enable or disable.
* @retval none
*/
void sgpio_rxtc_start_en (sgpio_t *obj, BOOL start_en);
/**
* @brief Configure SGPIO to become the multc timer. Use MULTC.
* @param obj: SGPIO object define in application software.
* @param timer_once_en: Enable that matching event is executed once.
* @arg 0 : Repeat. When the multc timer matches match_reset_value_time, only reset the timer.
* @arg 1 : Once. When the multc timer matches match_reset_value_time, reset and stop the timer.
* @param time_unit: Select the time unit.
* @arg 0 : The unit is us.
* @arg 1 : The unit is ns.
* @param match_time_reset: This match time is able to make the timer reset and stop.
* @param time_reset_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param ptime_reset_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_multc_timer_mode (sgpio_t *obj, BOOL timer_once_en, sgpio_time_unit time_unit,
u32 match_time_reset, sgpio_irq_handler time_reset_cb, void *ptime_reset_arg);
/**
* @brief Configure SGPIO to count input triggers. Use MULTC. When use the timeout function, use RXTC.
* Setting the monitor time can monitor the number of triggers in a period.
* Reset the counter when the monitor time is timeout.
* @param obj: SGPIO object define in application software.
* @param counter_en: To enable or disable.
* @param input_edge: Select the edge of the trigger event.
* @arg 0 : Inactive.
* @arg 1 : Count on the rising edge.
* @arg 2 : Count on the falling edge.
* @arg 3 : Count on the both edge.
* @param match_value: When the counter value is equal to match_value, generate an interrupt.
* @param match_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param pmatch_arg: User defined IRQ callback parameter.
* @param multc_ctrl: When the counter value is equal to match_value, control multc reset and stop.
* @arg 0 : Inactive
* @arg 1 : Reset MULTC.
* @arg 2 : Stop MULTC.
* @arg 3 : Reset and stop MULTC.
* @param timeout_unit: Select the timeout unit.
* @arg 0 : The unit is us.
* @arg 1 : The unit is ns.
* @param counter_timeout: If this value is not 0, make RXTC count time. When RXTC matches the timeout value, make MULTC reset and stop.
* @param timeout_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param ptimeout_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_multc_counter_mode (sgpio_t *obj, BOOL counter_en, sgpio_counter_edge input_edge, u16 match_value,
sgpio_irq_handler match_cb, void *pmatch_arg, sgpio_multc_ctrl multc_ctrl,
sgpio_time_unit timeout_unit, u32 counter_timeout, sgpio_irq_handler timeout_cb, void *ptimeout_arg);
/**
* @brief Generate the external output when happen the match events of the multc timer counter.
* @param obj: SGPIO object define in application software.
* @param source_unit: Select the time unit.
* @arg 0 : The unit is us in the timer mode.
* @arg 1 : The unit is ns in the timer mode.
* @arg 2 : The unit is count in the counter mode.
* @param match_value1_output: Set the output value when happen the multc match event 1.
* @arg 0 : Inactive.
* @arg 1 : The output is low.
* @arg 2 : The output is high.
* @arg 3 : Toggle.
* @param match_value1: The match value 1 of the multc timer counter .
* @param match_value2_output: Set the output value when happen the multc match event 2.
* @param match_value2: The match value 2 of the multc timer counter .
* @param match_value3_output: Set the output value when happen the multc match event 3.
* @param match_value3: The match value 3 of the multc timer counter .
* @retval none
*/
void sgpio_multc_timer_counter_match_output (sgpio_t *obj, sgpio_source_unit source_unit,
sgpio_external_output match_value1_output, u32 match_value1,
sgpio_external_output match_value2_output, u32 match_value2,
sgpio_external_output match_value3_output, u32 match_value3);
/**
* @brief Control to start the multc timer. Use MULTC.
* @param obj: SGPIO object define in application software.
* @param start_en: To enable or disable.
* @retval none
*/
void sgpio_multc_start_en (sgpio_t *obj, BOOL start_en);
/**
* @brief Configure SGPIO to become the capture mode for measuring the pulse width. Use RXTC.
* @param obj: SGPIO object define in application software.
* @param capture_en: To enable or disable.
* @param start_timer_edge: Select the trigger edge for starting the rxtc timer.
* @param input_capture_edge: Select the capture edge for capturing the time.
* @arg 0 : Inactive.
* @arg 1 : Capture on the rising edge.
* @arg 2 : Capture on the falling edge.
* @arg 3 : Capture on the both edge.
* @param rxtc_ctrl: When happen the capture event, control rxtc reset and stop.
* @arg 0 : Inactive
* @arg 1 : Reset RXTC.
* @arg 2 : Stop RXTC.
* @arg 3 : Reset and stop RXTC.
* @param max_capture_range_us: Set the maximum possible measurement value for making the prescale of the timer automatically.
* This setting will affect the accuracy.
* @param capture_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param pcapture_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_rxtc_capture_mode (sgpio_t *obj, BOOL capture_en, sgpio_rxtc_input_start start_timer_edge, sgpio_capture_type input_capture_edge,
sgpio_rxtc_ctrl rxtc_ctrl, u32 max_capture_range_us, sgpio_irq_handler capture_cb, void *pcapture_arg);
/**
* @brief Make the capture timer reset and stop in the capture mode when the timer value is equal to timeout_value. Use RXTC.
* @param obj: SGPIO object define in application software.
* @param capture_timeout_en: To enable or disable.
* @param rxtc_ctrl: When happen the capture timeout, control rxtc reset and stop.
* @arg 0 : Inactive
* @arg 1 : Reset RXTC.
* @arg 2 : Stop RXTC.
* @arg 3 : Reset and stop RXTC.
* @param time_unit: Select the time unit.
* @arg 0 : The unit is us.
* @arg 1 : The unit is ns.
* @param timeout_value: Matching this timeout value generates the interrupt.
* @param capture_timeout_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param pcapture_timeout_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_rxtc_capture_timeout(sgpio_t *obj, BOOL capture_timeout_en, sgpio_rxtc_ctrl rxtc_ctrl,
sgpio_time_unit time_unit, u32 timeout_value, sgpio_irq_handler capture_timeout_cb, void *pcapture_timeout_arg);
/**
* @brief Monitor the capture value. When the capture value is bigger than monitor time, generate the interrupt. Use RXTC.
* @param obj: SGPIO object define in application software.
* @param capture_monitor_en: To enable or disable.
* @param time_unit: Select the time unit.
* @arg 0 : The unit is us.
* @arg 1 : The unit is ns.
* @param monitor_time: The monitor value.
* @param monitor_count: Set the continuous numbers of the successful condition. Value: 1 ~ 32, 0: Inactive.
* @param capture_monitor_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param pcapture_monitor_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_rxtc_capture_monitor(sgpio_t *obj, BOOL capture_monitor_en, sgpio_time_unit time_unit, u32 monitor_time, u8 monitor_count,
sgpio_irq_handler capture_monitor_cb, void *pcapture_monitor_arg);
/**
* @brief Get the capture value. Use RXTC.
* @param obj: SGPIO object define in application software.
* @param time_unit: Select the time unit.
* @arg 0 : The unit is us.
* @arg 1 : The unit is ns.
* @retval The capture value.
*/
u32 sgpio_get_rxtc_capture_time (sgpio_t *obj, sgpio_time_unit time_unit);
/**
* @brief Set the trigger edge to start the timer, and sample the input value according to the sampling time.
* The sampling data is put in the 32-bit register. Use RXTC.
* @param obj: SGPIO object define in application software.
* @param sampling_en: To enable or disable.
* @param start_timer_edge: Select the trigger edge for starting the rxtc timer.
* @param time_unit: Select the time unit.
* @arg 0 : The unit is us.
* @arg 1 : The unit is ns.
* @param sampling_time1: The sampling time 1 needs less than the sampling end time. Set to 0 when not in use.
* @param sampling_time2: The sampling time 2 needs less than the sampling end time. Set to 0 when not in use.
* @param sampling_end_time: The sampling end time. Matching this time is to make the timer reset and stop.
* @param sampling_bit_length: Set the bit length generated the interrupt. Value: 1 ~ 32, 0: Inactive.
* @param first_msb_or_lsb: Putting in the register is LSB or MSB.
* @param sampling_finish_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param psampling_finish_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_sampling_rxdata (sgpio_t *obj, BOOL sampling_en, sgpio_rxtc_input_start start_timer_edge, sgpio_time_unit time_unit,
u32 sampling_time1, u32 sampling_time2, u32 sampling_end_time, u8 sampling_bit_length,
sgpio_first_msb_or_lsb first_msb_or_lsb, sgpio_irq_handler sampling_finish_cb, void *psampling_finish_arg);
/**
* @brief Set the trigger edge to start the timer, and translate the capture time into "0" or "1" according to the result of the comparison.
* When the capture time is bigger than the compare time, the bit result is put in the 32-bit register.
* The bit resut is "0" or "1" is controlled by compare_result_bit. Use RXTC.
* @param obj: SGPIO object define in application software.
* @param sampling_en: To enable or disable.
* @param capture_en: Select the trigger edge for starting the rxtc timer.
* @param input_capture_edge: Select the capture edge for capturing the time.
* @arg 0 : Inactive.
* @arg 1 : Capture on the rising edge.
* @arg 2 : Capture on the falling edge.
* @arg 3 : Capture on the both edge.
* @param max_capture_range_us: Set the maximum possible measurement value for making the prescale of the timer automatically.
* This setting will affect the accuracy.
* @param time_unit: Select the time unit.
* @arg 0 : The unit is us.
* @arg 1 : The unit is ns.
* @param capture_compare_value_time: Set the compare time.
* @param compare_result_bit: Deciding the value of the result bit is "0" or "1" when the capture time is bigger than the compare time.
* @param compare_bit_length: Set the bit length generated the interrupt. Value: 1 ~ 32, 0: Inactive.
* @param first_msb_or_lsb: Putting in the register is LSB or MSB.
* @param sampling_finish_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param psampling_finish_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_capture_compare_rxdata (sgpio_t *obj, BOOL capture_en, sgpio_rxtc_input_start start_timer_edge, sgpio_capture_type input_capture_edge,
u32 max_capture_range_us, sgpio_time_unit time_unit, u32 capture_compare_value_time, sgpio_cmp_result_bit compare_result_bit,
u8 compare_bit_length, sgpio_first_msb_or_lsb first_msb_or_lsb, sgpio_irq_handler compare_finish_cb, void *pcompare_finish_arg);
/**
* @brief Get the register of the RX data by sample or capture.
* @param obj: SGPIO object define in application software.
* @retval The result register.
*/
u32 sgpio_get_input_rxdata (sgpio_t *obj);
/**
* @brief Configure the waveforms of the bit 0 and bit 1 for the output.
* @param obj: SGPIO object define in application software.
* @param initial_output_value: Set the initial output value.
* @param time_unit: Select the time unit.
* @arg 0 : The unit is us.
* @arg 1 : The unit is ns.
* @param bit0_middle_change_time: The time is to change the output value for the bit 0.
* @param bit0_duration_time: The duration of the bit 0.
* @param bit1_middle_change_time: The time is to change the output value for the bit 1.
* @param bit1_duration_time: The duration of the bit 1.
* @retval none
*/
void sgpio_set_bit_symbol_of_txdata (sgpio_t *obj, sgpio_output_value_t initial_output_value, sgpio_time_unit time_unit,
u32 bit0_middle_change_time, u32 bit0_duration_time,
u32 bit1_middle_change_time, u32 bit1_duration_time);
/**
* @brief Set the output data according to the waveforms of the bit 0 and bit 1. Use MULTC.
* @param obj: SGPIO object define in application software.
* @param txdata_en: To enable or disable.
* @param rx_output_en: Control the output behavior of the bidirectional Rx.
* @param output_bit_counts: Set the output bit number.
* @param ptxdata_pointer: Set the output data pointer.
* @param txdata_finish_cb: When finish the TX output, generate the interrupt.
* User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param ptxdata_finish_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_set_txdata (sgpio_t *obj, BOOL txdata_en, BOOL rx_output_en, u16 output_bit_counts, u32 *ptxdata_pointer,
sgpio_irq_handler txdata_finish_cb, void *ptxdata_finish_arg);
/**
* @brief Start to output the TX data. Use MULTC.
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_start_send_txdata (sgpio_t *obj);
/**
* @brief Monitor the register of the sample or capture data. When the register value is equal to the monitor data, generate the interrupt.
* @param obj: SGPIO object define in application software.
* @param monitor_en: To enable or disable.
* @param monitor_data: Set the monitor data.
* @param monitor_input_data_mask: Set the bit mask of the monitor data.
* @param monitor_rxdata_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param pmonitor_rxdata_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_set_rxdata_monitor (sgpio_t *obj, BOOL monitor_en, u32 monitor_data, u32 monitor_input_data_mask,
sgpio_irq_handler monitor_rxdata_cb, void *pmonitor_rxdata_arg);
/**
* @brief Disable the monitor mode.
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_disable_rxdata_monitor (sgpio_t *obj);
/**
* @brief Reset the register of the RX data.
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_reset_receive_rxdata(sgpio_t *obj);
/**
* @brief Initializes the GDMA of SGPIO. Schedule the output to make the waveform by GDMA. Use MULTC.
* @param obj: SGPIO object define in application software.
* @param pmatch_value_ptr: The pointer is the memory address of setting the match time.
* Memory allocation: reset time(a), match time1(a), match time2(a), match time3(a)
* reset time(b), match time1(b), match time2(b), match time3(b)
* reset time(c), ...
* @param reset_time_num: Set the number of reset times. An interrupt will be generated when the number of times is reached.
* @param time_unit: Select the time unit.
* @arg 0 : The unit is us.
* @arg 1 : The unit is ns.
* @param match_time1_output: Set the output value when match the time 1.
* @arg 0 : Inactive.
* @arg 1 : The output is low.
* @arg 2 : The output is high.
* @arg 3 : Toggle.
* @param match_time2_output: Set the output value when match the time 2.
* @param match_time3_output: Set the output value when match the time 3.
* @param counter_finish_cb: User defined IRQ callback function. Using "NULL" will not generate this interrupt.
* @param pcounter_finish_arg: User defined IRQ callback parameter.
* @retval none
*/
void sgpio_init_dma_match_output (sgpio_t *obj, u16 *pmatch_value_ptr, u8 reset_time_num, sgpio_time_unit time_unit,
sgpio_external_output match_time1_output, sgpio_external_output match_time2_output, sgpio_external_output match_time3_output,
sgpio_irq_handler counter_finish_cb, void *pcounter_finish_arg);
/**
* @brief Deinitializes the GDMA of SGPIO.
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_deinit_dma_match_output (sgpio_t *obj);
/**
* @brief Start the GDMA to send the TX waveform.
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_start_dma (sgpio_t *obj);
/**
* @brief Set the TX output value.
* @param obj: SGPIO object define in application software.
* @param value: Set the output value.
* @arg 1 : The output is low.
* @arg 2 : The output is high.
* @retval none
*/
void sgpio_set_output_value (sgpio_t *obj, sgpio_output_value value);
/**
* @brief Make the inverse output
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_set_inverse_output (sgpio_t *obj);
/**
* @brief Get the register value of the rxtc timer.
* @param obj: SGPIO object define in application software.
* @retval The register value of the rxtc timer.
*/
u16 sgpio_get_rxtc_value (sgpio_t *obj);
/**
* @brief Reset the rxtc timer.
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_reset_rxtc (sgpio_t *obj);
/**
* @brief Get the register value of the multc timer.
* @param obj: SGPIO object define in application software.
* @retval The register value of the multc timer.
*/
u16 sgpio_get_multc_value (sgpio_t *obj);
/**
* @brief Reset the multc timer.
* @param obj: SGPIO object define in application software.
* @retval none
*/
void sgpio_reset_multc (sgpio_t *obj);
/**
* @brief Control the rx to become the bi-direction.
* @param obj: SGPIO object define in application software.
* @param rx_in_out: Select the input or bi-direction.
* @arg 0 : Only input.
* @arg 1 : Bi-direction.
* @retval none
*/
void sgpio_set_rx_in_out_ctrl (sgpio_t *obj, sgpio_rx_inoutput rx_in_out);
/*\@}*/
#ifdef __cplusplus
}
#endif
///@}
#endif // end of "#if defined(CONFIG_PLATFORM_8195BHP) || defined(CONFIG_PLATFORM_8195BLP)"
#endif
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/common/mbed/hal_ext/sgpio_api.h
|
C
|
apache-2.0
| 26,889
|