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/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_init_q7.c
* Description: Q7 FIR filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR
* @{
*/
/**
* @param[in,out] *S points to an instance of the Q7 FIR filter structure.
* @param[in] numTaps Number of filter coefficients in the filter.
* @param[in] *pCoeffs points to the filter coefficients buffer.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of samples that are processed per call.
* @return none
*
* <b>Description:</b>
* \par
* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
* <pre>
* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
* </pre>
* \par
* <code>pState</code> points to the array of state variables.
* <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q7()</code>.
*/
void arm_fir_init_q7(
arm_fir_instance_q7 * S,
uint16_t numTaps,
q7_t * pCoeffs,
q7_t * pState,
uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of FIR group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_init_q7.c
|
C
|
apache-2.0
| 2,457
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_interpolate_f32.c
* Description: Floating-point FIR interpolation sequences
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator
*
* These functions combine an upsampler (zero stuffer) and an FIR filter.
* They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.
* Conceptually, the functions are equivalent to the block diagram below:
* \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"
* After upsampling by a factor of <code>L</code>, the signal should be filtered by a lowpass filter with a normalized
* cutoff frequency of <code>1/L</code> in order to eliminate high frequency copies of the spectrum.
* The user of the function is responsible for providing the filter coefficients.
*
* The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.
* The upsampler inserts <code>L-1</code> zeros between each sample.
* Instead of multiplying by these zero values, the FIR filter is designed to skip them.
* This leads to an efficient implementation without any wasted effort.
* The functions operate on blocks of input and output data.
* <code>pSrc</code> points to an array of <code>blockSize</code> input values and
* <code>pDst</code> points to an array of <code>blockSize*L</code> output values.
*
* The library provides separate functions for Q15, Q31, and floating-point data types.
*
* \par Algorithm:
* The functions use a polyphase filter structure:
* <pre>
* y[n] = b[0] * x[n] + b[L] * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
* y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
* ...
* y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
* </pre>
* This approach is more efficient than straightforward upsample-then-filter algorithms.
* With this method the computation is reduced by a factor of <code>1/L</code> when compared to using a standard FIR filter.
* \par
* <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
* <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code> and this is checked by the
* initialization functions.
* Internally, the function divides the FIR filter's impulse response into shorter filters of length
* <code>phaseLength=numTaps/L</code>.
* Coefficients are stored in time reversed order.
* \par
* <pre>
* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
* </pre>
* \par
* <code>pState</code> points to a state array of size <code>blockSize + phaseLength - 1</code>.
* Samples in the state buffer are stored in the order:
* \par
* <pre>
* {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
* </pre>
* The state variables are updated after each block of data is processed, the coefficients are untouched.
*
* \par Instance Structure
* The coefficients and state variables for a filter are stored together in an instance data structure.
* A separate instance structure must be defined for each filter.
* Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
* There are separate instance structure declarations for each of the 3 supported data types.
*
* \par Initialization Functions
* There is also an associated initialization function for each data type.
* The initialization function performs the following operations:
* - Sets the values of the internal structure fields.
* - Zeros out the values in the state buffer.
* - Checks to make sure that the length of the filter is a multiple of the interpolation factor.
* To do this manually without calling the init function, assign the follow subfields of the instance structure:
* L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero.
*
* \par
* Use of the initialization function is optional.
* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
* To place an instance structure into a const data section, the instance structure must be manually initialized.
* The code below statically initializes each of the 3 different data type filter instance structures
* <pre>
* arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
* arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
* arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
* </pre>
* where <code>L</code> is the interpolation factor; <code>phaseLength=numTaps/L</code> is the
* length of each of the shorter FIR filters used internally,
* <code>pCoeffs</code> is the address of the coefficient buffer;
* <code>pState</code> is the address of the state buffer.
* Be sure to set the values in the state buffer to zeros when doing static initialization.
*
* \par Fixed-Point Behavior
* Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.
* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
* Refer to the function specific documentation below for usage guidelines.
*/
/**
* @addtogroup FIR_Interpolate
* @{
*/
/**
* @brief Processing function for the floating-point FIR interpolator.
* @param[in] *S points to an instance of the floating-point FIR interpolator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*/
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
void arm_fir_interpolate_f32(
const arm_fir_interpolate_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize)
{
float32_t *pState = S->pState; /* State pointer */
float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
float32_t *pStateCurnt; /* Points to the current sample of the state */
float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
float32_t sum0; /* Accumulators */
float32_t x0, c0; /* Temporary variables to hold state and coefficient values */
uint32_t i, blkCnt, j; /* Loop counters */
uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
float32_t acc0, acc1, acc2, acc3;
float32_t x1, x2, x3;
uint32_t blkCntN4;
float32_t c1, c2, c3;
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = S->pState + (phaseLen - 1u);
/* Initialise blkCnt */
blkCnt = blockSize / 4;
blkCntN4 = blockSize - (4 * blkCnt);
/* Samples loop unrolled by 4 */
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1u;
/* Loop over the Interpolation factor. */
i = (S->L);
while (i > 0u)
{
/* Set accumulator to zero */
acc0 = 0.0f;
acc1 = 0.0f;
acc2 = 0.0f;
acc3 = 0.0f;
/* Initialize state pointer */
ptr1 = pState;
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (S->L - j);
/* Loop over the polyPhase length. Unroll by a factor of 4.
** Repeat until we've computed numTaps-(4*S->L) coefficients. */
tapCnt = phaseLen >> 2u;
x0 = *(ptr1++);
x1 = *(ptr1++);
x2 = *(ptr1++);
while (tapCnt > 0u)
{
/* Read the input sample */
x3 = *(ptr1++);
/* Read the coefficient */
c0 = *(ptr2);
/* Perform the multiply-accumulate */
acc0 += x0 * c0;
acc1 += x1 * c0;
acc2 += x2 * c0;
acc3 += x3 * c0;
/* Read the coefficient */
c1 = *(ptr2 + S->L);
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
acc0 += x1 * c1;
acc1 += x2 * c1;
acc2 += x3 * c1;
acc3 += x0 * c1;
/* Read the coefficient */
c2 = *(ptr2 + S->L * 2);
/* Read the input sample */
x1 = *(ptr1++);
/* Perform the multiply-accumulate */
acc0 += x2 * c2;
acc1 += x3 * c2;
acc2 += x0 * c2;
acc3 += x1 * c2;
/* Read the coefficient */
c3 = *(ptr2 + S->L * 3);
/* Read the input sample */
x2 = *(ptr1++);
/* Perform the multiply-accumulate */
acc0 += x3 * c3;
acc1 += x0 * c3;
acc2 += x1 * c3;
acc3 += x2 * c3;
/* Upsampling is done by stuffing L-1 zeros between each sample.
* So instead of multiplying zeros with coefficients,
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += 4 * S->L;
/* Decrement the loop counter */
tapCnt--;
}
/* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
tapCnt = phaseLen % 0x4u;
while (tapCnt > 0u)
{
/* Read the input sample */
x3 = *(ptr1++);
/* Read the coefficient */
c0 = *(ptr2);
/* Perform the multiply-accumulate */
acc0 += x0 * c0;
acc1 += x1 * c0;
acc2 += x2 * c0;
acc3 += x3 * c0;
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* update states for next sample processing */
x0 = x1;
x1 = x2;
x2 = x3;
/* Decrement the loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
*pDst = acc0;
*(pDst + S->L) = acc1;
*(pDst + 2 * S->L) = acc2;
*(pDst + 3 * S->L) = acc3;
pDst++;
/* Increment the address modifier index of coefficient buffer */
j++;
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
pState = pState + 4;
pDst += S->L * 3;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
while (blkCntN4 > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1u;
/* Loop over the Interpolation factor. */
i = S->L;
while (i > 0u)
{
/* Set accumulator to zero */
sum0 = 0.0f;
/* Initialize state pointer */
ptr1 = pState;
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (S->L - j);
/* Loop over the polyPhase length. Unroll by a factor of 4.
** Repeat until we've computed numTaps-(4*S->L) coefficients. */
tapCnt = phaseLen >> 2u;
while (tapCnt > 0u)
{
/* Read the coefficient */
c0 = *(ptr2);
/* Upsampling is done by stuffing L-1 zeros between each sample.
* So instead of multiplying zeros with coefficients,
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += x0 * c0;
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += x0 * c0;
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += x0 * c0;
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += x0 * c0;
/* Decrement the loop counter */
tapCnt--;
}
/* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
tapCnt = phaseLen % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
sum0 += *(ptr1++) * (*ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Decrement the loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
*pDst++ = sum0;
/* Increment the address modifier index of coefficient buffer */
j++;
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
pState = pState + 1;
/* Decrement the loop counter */
blkCntN4--;
}
/* Processing is complete.
** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
tapCnt = (phaseLen - 1u) >> 2u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
tapCnt = (phaseLen - 1u) % 0x04u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
}
#else
/* Run the below code for Cortex-M0 */
void arm_fir_interpolate_f32(
const arm_fir_interpolate_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize)
{
float32_t *pState = S->pState; /* State pointer */
float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
float32_t *pStateCurnt; /* Points to the current sample of the state */
float32_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
float32_t sum; /* Accumulator */
uint32_t i, blkCnt; /* Loop counters */
uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = S->pState + (phaseLen - 1u);
/* Total number of intput samples */
blkCnt = blockSize;
/* Loop over the blockSize. */
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Loop over the Interpolation factor. */
i = S->L;
while (i > 0u)
{
/* Set accumulator to zero */
sum = 0.0f;
/* Initialize state pointer */
ptr1 = pState;
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (i - 1u);
/* Loop over the polyPhase length */
tapCnt = phaseLen;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
sum += *ptr1++ * *ptr2;
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Decrement the loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
*pDst++ = sum;
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last phaseLen - 1 samples to the start of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
tapCnt = phaseLen - 1u;
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
}
#endif /* #if defined (ARM_MATH_DSP) */
/**
* @} end of FIR_Interpolate group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_interpolate_f32.c
|
C
|
apache-2.0
| 18,121
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_interpolate_init_f32.c
* Description: Floating-point FIR interpolator initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Interpolate
* @{
*/
/**
* @brief Initialization function for the floating-point FIR interpolator.
* @param[in,out] *S points to an instance of the floating-point FIR interpolator structure.
* @param[in] L upsample factor.
* @param[in] numTaps number of filter coefficients in the filter.
* @param[in] *pCoeffs points to the filter coefficient buffer.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of input samples to process per call.
* @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
* the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
*
* <b>Description:</b>
* \par
* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
* <pre>
* {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
* </pre>
* The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
* \par
* <code>pState</code> points to the array of state variables.
* <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
* where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_f32()</code>.
*/
arm_status arm_fir_interpolate_init_f32(
arm_fir_interpolate_instance_f32 * S,
uint8_t L,
uint16_t numTaps,
float32_t * pCoeffs,
float32_t * pState,
uint32_t blockSize)
{
arm_status status;
/* The filter length must be a multiple of the interpolation factor */
if ((numTaps % L) != 0u)
{
/* Set status as ARM_MATH_LENGTH_ERROR */
status = ARM_MATH_LENGTH_ERROR;
}
else
{
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Assign Interpolation factor */
S->L = L;
/* Assign polyPhaseLength */
S->phaseLength = numTaps / L;
/* Clear state buffer and size of state array is always phaseLength + blockSize - 1 */
memset(pState, 0,
(blockSize +
((uint32_t) S->phaseLength - 1u)) * sizeof(float32_t));
/* Assign state pointer */
S->pState = pState;
status = ARM_MATH_SUCCESS;
}
return (status);
}
/**
* @} end of FIR_Interpolate group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
|
C
|
apache-2.0
| 3,470
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_interpolate_init_q15.c
* Description: Q15 FIR interpolator initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Interpolate
* @{
*/
/**
* @brief Initialization function for the Q15 FIR interpolator.
* @param[in,out] *S points to an instance of the Q15 FIR interpolator structure.
* @param[in] L upsample factor.
* @param[in] numTaps number of filter coefficients in the filter.
* @param[in] *pCoeffs points to the filter coefficient buffer.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of input samples to process per call.
* @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
* the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
*
* <b>Description:</b>
* \par
* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
* <pre>
* {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
* </pre>
* The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
* \par
* <code>pState</code> points to the array of state variables.
* <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
* where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q15()</code>.
*/
arm_status arm_fir_interpolate_init_q15(
arm_fir_interpolate_instance_q15 * S,
uint8_t L,
uint16_t numTaps,
q15_t * pCoeffs,
q15_t * pState,
uint32_t blockSize)
{
arm_status status;
/* The filter length must be a multiple of the interpolation factor */
if ((numTaps % L) != 0u)
{
/* Set status as ARM_MATH_LENGTH_ERROR */
status = ARM_MATH_LENGTH_ERROR;
}
else
{
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Assign Interpolation factor */
S->L = L;
/* Assign polyPhaseLength */
S->phaseLength = numTaps / L;
/* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
memset(pState, 0,
(blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q15_t));
/* Assign state pointer */
S->pState = pState;
status = ARM_MATH_SUCCESS;
}
return (status);
}
/**
* @} end of FIR_Interpolate group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
|
C
|
apache-2.0
| 3,408
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_interpolate_init_q31.c
* Description: Q31 FIR interpolator initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Interpolate
* @{
*/
/**
* @brief Initialization function for the Q31 FIR interpolator.
* @param[in,out] *S points to an instance of the Q31 FIR interpolator structure.
* @param[in] L upsample factor.
* @param[in] numTaps number of filter coefficients in the filter.
* @param[in] *pCoeffs points to the filter coefficient buffer.
* @param[in] *pState points to the state buffer.
* @param[in] blockSize number of input samples to process per call.
* @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if
* the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
*
* <b>Description:</b>
* \par
* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
* <pre>
* {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
* </pre>
* The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
* \par
* <code>pState</code> points to the array of state variables.
* <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
* where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q31()</code>.
*/
arm_status arm_fir_interpolate_init_q31(
arm_fir_interpolate_instance_q31 * S,
uint8_t L,
uint16_t numTaps,
q31_t * pCoeffs,
q31_t * pState,
uint32_t blockSize)
{
arm_status status;
/* The filter length must be a multiple of the interpolation factor */
if ((numTaps % L) != 0u)
{
/* Set status as ARM_MATH_LENGTH_ERROR */
status = ARM_MATH_LENGTH_ERROR;
}
else
{
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Assign Interpolation factor */
S->L = L;
/* Assign polyPhaseLength */
S->phaseLength = numTaps / L;
/* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
memset(pState, 0,
(blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q31_t));
/* Assign state pointer */
S->pState = pState;
status = ARM_MATH_SUCCESS;
}
return (status);
}
/**
* @} end of FIR_Interpolate group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
|
C
|
apache-2.0
| 3,409
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_interpolate_q15.c
* Description: Q15 FIR interpolation
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Interpolate
* @{
*/
/**
* @brief Processing function for the Q15 FIR interpolator.
* @param[in] *S points to an instance of the Q15 FIR interpolator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using a 64-bit internal accumulator.
* Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
* The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
* There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
* After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
* Lastly, the accumulator is saturated to yield a result in 1.15 format.
*/
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
void arm_fir_interpolate_q15(
const arm_fir_interpolate_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
q15_t *pState = S->pState; /* State pointer */
q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q15_t *pStateCurnt; /* Points to the current sample of the state */
q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
q63_t sum0; /* Accumulators */
q15_t x0, c0; /* Temporary variables to hold state and coefficient values */
uint32_t i, blkCnt, j, tapCnt; /* Loop counters */
uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
uint32_t blkCntN2;
q63_t acc0, acc1;
q15_t x1;
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
/* Initialise blkCnt */
blkCnt = blockSize / 2;
blkCntN2 = blockSize - (2 * blkCnt);
/* Samples loop unrolled by 2 */
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1u;
/* Loop over the Interpolation factor. */
i = (S->L);
while (i > 0u)
{
/* Set accumulator to zero */
acc0 = 0;
acc1 = 0;
/* Initialize state pointer */
ptr1 = pState;
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (S->L - j);
/* Loop over the polyPhase length. Unroll by a factor of 4.
** Repeat until we've computed numTaps-(4*S->L) coefficients. */
tapCnt = phaseLen >> 2u;
x0 = *(ptr1++);
while (tapCnt > 0u)
{
/* Read the input sample */
x1 = *(ptr1++);
/* Read the coefficient */
c0 = *(ptr2);
/* Perform the multiply-accumulate */
acc0 += (q63_t) x0 *c0;
acc1 += (q63_t) x1 *c0;
/* Read the coefficient */
c0 = *(ptr2 + S->L);
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
acc0 += (q63_t) x1 *c0;
acc1 += (q63_t) x0 *c0;
/* Read the coefficient */
c0 = *(ptr2 + S->L * 2);
/* Read the input sample */
x1 = *(ptr1++);
/* Perform the multiply-accumulate */
acc0 += (q63_t) x0 *c0;
acc1 += (q63_t) x1 *c0;
/* Read the coefficient */
c0 = *(ptr2 + S->L * 3);
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
acc0 += (q63_t) x1 *c0;
acc1 += (q63_t) x0 *c0;
/* Upsampling is done by stuffing L-1 zeros between each sample.
* So instead of multiplying zeros with coefficients,
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += 4 * S->L;
/* Decrement the loop counter */
tapCnt--;
}
/* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
tapCnt = phaseLen % 0x4u;
while (tapCnt > 0u)
{
/* Read the input sample */
x1 = *(ptr1++);
/* Read the coefficient */
c0 = *(ptr2);
/* Perform the multiply-accumulate */
acc0 += (q63_t) x0 *c0;
acc1 += (q63_t) x1 *c0;
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* update states for next sample processing */
x0 = x1;
/* Decrement the loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
*pDst = (q15_t) (__SSAT((acc0 >> 15), 16));
*(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
pDst++;
/* Increment the address modifier index of coefficient buffer */
j++;
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
pState = pState + 2;
pDst += S->L;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 2, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blkCntN2;
/* Loop over the blockSize. */
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1u;
/* Loop over the Interpolation factor. */
i = S->L;
while (i > 0u)
{
/* Set accumulator to zero */
sum0 = 0;
/* Initialize state pointer */
ptr1 = pState;
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (S->L - j);
/* Loop over the polyPhase length. Unroll by a factor of 4.
** Repeat until we've computed numTaps-(4*S->L) coefficients. */
tapCnt = phaseLen >> 2;
while (tapCnt > 0u)
{
/* Read the coefficient */
c0 = *(ptr2);
/* Upsampling is done by stuffing L-1 zeros between each sample.
* So instead of multiplying zeros with coefficients,
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += (q63_t) x0 *c0;
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += (q63_t) x0 *c0;
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += (q63_t) x0 *c0;
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += (q63_t) x0 *c0;
/* Decrement the loop counter */
tapCnt--;
}
/* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
tapCnt = phaseLen & 0x3u;
while (tapCnt > 0u)
{
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += (q63_t) x0 *c0;
/* Decrement the loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
*pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
j++;
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
i = ((uint32_t) phaseLen - 1u) >> 2u;
/* copy data */
while (i > 0u)
{
#ifndef UNALIGNED_SUPPORT_DISABLE
*__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
*__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
#else
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Decrement the loop counter */
i--;
}
i = ((uint32_t) phaseLen - 1u) % 0x04u;
while (i > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
i--;
}
}
#else
/* Run the below code for Cortex-M0 */
void arm_fir_interpolate_q15(
const arm_fir_interpolate_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
q15_t *pState = S->pState; /* State pointer */
q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q15_t *pStateCurnt; /* Points to the current sample of the state */
q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
q63_t sum; /* Accumulator */
q15_t x0, c0; /* Temporary variables to hold state and coefficient values */
uint32_t i, blkCnt, tapCnt; /* Loop counters */
uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = S->pState + (phaseLen - 1u);
/* Total number of intput samples */
blkCnt = blockSize;
/* Loop over the blockSize. */
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Loop over the Interpolation factor. */
i = S->L;
while (i > 0u)
{
/* Set accumulator to zero */
sum = 0;
/* Initialize state pointer */
ptr1 = pState;
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (i - 1u);
/* Loop over the polyPhase length */
tapCnt = (uint32_t) phaseLen;
while (tapCnt > 0u)
{
/* Read the coefficient */
c0 = *ptr2;
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *ptr1++;
/* Perform the multiply-accumulate */
sum += ((q31_t) x0 * c0);
/* Decrement the loop counter */
tapCnt--;
}
/* Store the result after converting to 1.15 format in the destination buffer */
*pDst++ = (q15_t) (__SSAT((sum >> 15), 16));
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last phaseLen - 1 samples to the start of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
i = (uint32_t) phaseLen - 1u;
while (i > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
i--;
}
}
#endif /* #if defined (ARM_MATH_DSP) */
/**
* @} end of FIR_Interpolate group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_interpolate_q15.c
|
C
|
apache-2.0
| 13,890
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_interpolate_q31.c
* Description: Q31 FIR interpolation
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Interpolate
* @{
*/
/**
* @brief Processing function for the Q31 FIR interpolator.
* @param[in] *S points to an instance of the Q31 FIR interpolator structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 64-bit accumulator.
* The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
* Thus, if the accumulator result overflows it wraps around rather than clip.
* In order to avoid overflows completely the input signal must be scaled down by <code>1/(numTaps/L)</code>.
* since <code>numTaps/L</code> additions occur per output sample.
* After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
*/
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
void arm_fir_interpolate_q31(
const arm_fir_interpolate_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize)
{
q31_t *pState = S->pState; /* State pointer */
q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q31_t *pStateCurnt; /* Points to the current sample of the state */
q31_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
q63_t sum0; /* Accumulators */
q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
uint32_t i, blkCnt, j; /* Loop counters */
uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
uint32_t blkCntN2;
q63_t acc0, acc1;
q31_t x1;
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
/* Initialise blkCnt */
blkCnt = blockSize / 2;
blkCntN2 = blockSize - (2 * blkCnt);
/* Samples loop unrolled by 2 */
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1u;
/* Loop over the Interpolation factor. */
i = (S->L);
while (i > 0u)
{
/* Set accumulator to zero */
acc0 = 0;
acc1 = 0;
/* Initialize state pointer */
ptr1 = pState;
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (S->L - j);
/* Loop over the polyPhase length. Unroll by a factor of 4.
** Repeat until we've computed numTaps-(4*S->L) coefficients. */
tapCnt = phaseLen >> 2u;
x0 = *(ptr1++);
while (tapCnt > 0u)
{
/* Read the input sample */
x1 = *(ptr1++);
/* Read the coefficient */
c0 = *(ptr2);
/* Perform the multiply-accumulate */
acc0 += (q63_t) x0 *c0;
acc1 += (q63_t) x1 *c0;
/* Read the coefficient */
c0 = *(ptr2 + S->L);
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
acc0 += (q63_t) x1 *c0;
acc1 += (q63_t) x0 *c0;
/* Read the coefficient */
c0 = *(ptr2 + S->L * 2);
/* Read the input sample */
x1 = *(ptr1++);
/* Perform the multiply-accumulate */
acc0 += (q63_t) x0 *c0;
acc1 += (q63_t) x1 *c0;
/* Read the coefficient */
c0 = *(ptr2 + S->L * 3);
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
acc0 += (q63_t) x1 *c0;
acc1 += (q63_t) x0 *c0;
/* Upsampling is done by stuffing L-1 zeros between each sample.
* So instead of multiplying zeros with coefficients,
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += 4 * S->L;
/* Decrement the loop counter */
tapCnt--;
}
/* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
tapCnt = phaseLen % 0x4u;
while (tapCnt > 0u)
{
/* Read the input sample */
x1 = *(ptr1++);
/* Read the coefficient */
c0 = *(ptr2);
/* Perform the multiply-accumulate */
acc0 += (q63_t) x0 *c0;
acc1 += (q63_t) x1 *c0;
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* update states for next sample processing */
x0 = x1;
/* Decrement the loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
*pDst = (q31_t) (acc0 >> 31);
*(pDst + S->L) = (q31_t) (acc1 >> 31);
pDst++;
/* Increment the address modifier index of coefficient buffer */
j++;
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
pState = pState + 2;
pDst += S->L;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 2, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blkCntN2;
/* Loop over the blockSize. */
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Address modifier index of coefficient buffer */
j = 1u;
/* Loop over the Interpolation factor. */
i = S->L;
while (i > 0u)
{
/* Set accumulator to zero */
sum0 = 0;
/* Initialize state pointer */
ptr1 = pState;
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (S->L - j);
/* Loop over the polyPhase length. Unroll by a factor of 4.
** Repeat until we've computed numTaps-(4*S->L) coefficients. */
tapCnt = phaseLen >> 2;
while (tapCnt > 0u)
{
/* Read the coefficient */
c0 = *(ptr2);
/* Upsampling is done by stuffing L-1 zeros between each sample.
* So instead of multiplying zeros with coefficients,
* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += (q63_t) x0 *c0;
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += (q63_t) x0 *c0;
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += (q63_t) x0 *c0;
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += (q63_t) x0 *c0;
/* Decrement the loop counter */
tapCnt--;
}
/* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
tapCnt = phaseLen & 0x3u;
while (tapCnt > 0u)
{
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *(ptr1++);
/* Perform the multiply-accumulate */
sum0 += (q63_t) x0 *c0;
/* Decrement the loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
*pDst++ = (q31_t) (sum0 >> 31);
/* Increment the address modifier index of coefficient buffer */
j++;
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
tapCnt = (phaseLen - 1u) >> 2u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
tapCnt = (phaseLen - 1u) % 0x04u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
}
#else
void arm_fir_interpolate_q31(
const arm_fir_interpolate_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize)
{
q31_t *pState = S->pState; /* State pointer */
q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q31_t *pStateCurnt; /* Points to the current sample of the state */
q31_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
/* Run the below code for Cortex-M0 */
q63_t sum; /* Accumulator */
q31_t x0, c0; /* Temporary variables to hold state and coefficient values */
uint32_t i, blkCnt; /* Loop counters */
uint16_t phaseLen = S->phaseLength, tapCnt; /* Length of each polyphase filter component */
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
/* Total number of intput samples */
blkCnt = blockSize;
/* Loop over the blockSize. */
while (blkCnt > 0u)
{
/* Copy new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Loop over the Interpolation factor. */
i = S->L;
while (i > 0u)
{
/* Set accumulator to zero */
sum = 0;
/* Initialize state pointer */
ptr1 = pState;
/* Initialize coefficient pointer */
ptr2 = pCoeffs + (i - 1u);
tapCnt = phaseLen;
while (tapCnt > 0u)
{
/* Read the coefficient */
c0 = *(ptr2);
/* Increment the coefficient pointer by interpolation factor times. */
ptr2 += S->L;
/* Read the input sample */
x0 = *ptr1++;
/* Perform the multiply-accumulate */
sum += (q63_t) x0 *c0;
/* Decrement the loop counter */
tapCnt--;
}
/* The result is in the accumulator, store in the destination buffer. */
*pDst++ = (q31_t) (sum >> 31);
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 1
* to process the next group of interpolation factor number samples */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
tapCnt = phaseLen - 1u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
}
#endif /* #if defined (ARM_MATH_DSP) */
/**
* @} end of FIR_Interpolate group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_interpolate_q31.c
|
C
|
apache-2.0
| 13,404
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_lattice_f32.c
* Description: Processing function for the floating-point FIR Lattice filter
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters
*
* This set of functions implements Finite Impulse Response (FIR) lattice filters
* for Q15, Q31 and floating-point data types. Lattice filters are used in a
* variety of adaptive filter applications. The filter structure is feedforward and
* the net impulse response is finite length.
* The functions operate on blocks
* of input and output data and each call to the function processes
* <code>blockSize</code> samples through the filter. <code>pSrc</code> and
* <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
*
* \par Algorithm:
* \image html FIRLattice.gif "Finite Impulse Response Lattice filter"
* The following difference equation is implemented:
* <pre>
* f0[n] = g0[n] = x[n]
* fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
* gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
* y[n] = fM[n]
* </pre>
* \par
* <code>pCoeffs</code> points to tha array of reflection coefficients of size <code>numStages</code>.
* Reflection Coefficients are stored in the following order.
* \par
* <pre>
* {k1, k2, ..., kM}
* </pre>
* where M is number of stages
* \par
* <code>pState</code> points to a state array of size <code>numStages</code>.
* The state variables (g values) hold previous inputs and are stored in the following order.
* <pre>
* {g0[n], g1[n], g2[n] ...gM-1[n]}
* </pre>
* The state variables are updated after each block of data is processed; the coefficients are untouched.
* \par Instance Structure
* The coefficients and state variables for a filter are stored together in an instance data structure.
* A separate instance structure must be defined for each filter.
* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
* There are separate instance structure declarations for each of the 3 supported data types.
*
* \par Initialization Functions
* There is also an associated initialization function for each data type.
* The initialization function performs the following operations:
* - Sets the values of the internal structure fields.
* - Zeros out the values in the state buffer.
* To do this manually without calling the init function, assign the follow subfields of the instance structure:
* numStages, pCoeffs, pState. Also set all of the values in pState to zero.
*
* \par
* Use of the initialization function is optional.
* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
* To place an instance structure into a const data section, the instance structure must be manually initialized.
* Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
* <pre>
*arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
*arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
*arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
* </pre>
* \par
* where <code>numStages</code> is the number of stages in the filter; <code>pState</code> is the address of the state buffer;
* <code>pCoeffs</code> is the address of the coefficient buffer.
* \par Fixed-Point Behavior
* Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.
* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
* Refer to the function specific documentation below for usage guidelines.
*/
/**
* @addtogroup FIR_Lattice
* @{
*/
/**
* @brief Processing function for the floating-point FIR lattice filter.
* @param[in] *S points to an instance of the floating-point FIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_lattice_f32(
const arm_fir_lattice_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize)
{
float32_t *pState; /* State pointer */
float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
float32_t *px; /* temporary state pointer */
float32_t *pk; /* temporary coefficient pointer */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t fcurr1, fnext1, gcurr1, gnext1; /* temporary variables for first sample in loop unrolling */
float32_t fcurr2, fnext2, gnext2; /* temporary variables for second sample in loop unrolling */
float32_t fcurr3, fnext3, gnext3; /* temporary variables for third sample in loop unrolling */
float32_t fcurr4, fnext4, gnext4; /* temporary variables for fourth sample in loop unrolling */
uint32_t numStages = S->numStages; /* Number of stages in the filter */
uint32_t blkCnt, stageCnt; /* temporary variables for counts */
gcurr1 = 0.0f;
pState = &S->pState[0];
blkCnt = blockSize >> 2;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* Read two samples from input buffer */
/* f0(n) = x(n) */
fcurr1 = *pSrc++;
fcurr2 = *pSrc++;
/* Initialize coeff pointer */
pk = (pCoeffs);
/* Initialize state pointer */
px = pState;
/* Read g0(n-1) from state */
gcurr1 = *px;
/* Process first sample for first tap */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext1 = fcurr1 + ((*pk) * gcurr1);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext1 = (fcurr1 * (*pk)) + gcurr1;
/* Process second sample for first tap */
/* for sample 2 processing */
fnext2 = fcurr2 + ((*pk) * fcurr1);
gnext2 = (fcurr2 * (*pk)) + fcurr1;
/* Read next two samples from input buffer */
/* f0(n+2) = x(n+2) */
fcurr3 = *pSrc++;
fcurr4 = *pSrc++;
/* Copy only last input samples into the state buffer
which will be used for next four samples processing */
*px++ = fcurr4;
/* Process third sample for first tap */
fnext3 = fcurr3 + ((*pk) * fcurr2);
gnext3 = (fcurr3 * (*pk)) + fcurr2;
/* Process fourth sample for first tap */
fnext4 = fcurr4 + ((*pk) * fcurr3);
gnext4 = (fcurr4 * (*pk++)) + fcurr3;
/* Update of f values for next coefficient set processing */
fcurr1 = fnext1;
fcurr2 = fnext2;
fcurr3 = fnext3;
fcurr4 = fnext4;
/* Loop unrolling. Process 4 taps at a time . */
stageCnt = (numStages - 1u) >> 2u;
/* Loop over the number of taps. Unroll by a factor of 4.
** Repeat until we've computed numStages-3 coefficients. */
/* Process 2nd, 3rd, 4th and 5th taps ... here */
while (stageCnt > 0u)
{
/* Read g1(n-1), g3(n-1) .... from state */
gcurr1 = *px;
/* save g1(n) in state buffer */
*px++ = gnext4;
/* Process first sample for 2nd, 6th .. tap */
/* Sample processing for K2, K6.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
fnext1 = fcurr1 + ((*pk) * gcurr1);
/* Process second sample for 2nd, 6th .. tap */
/* for sample 2 processing */
fnext2 = fcurr2 + ((*pk) * gnext1);
/* Process third sample for 2nd, 6th .. tap */
fnext3 = fcurr3 + ((*pk) * gnext2);
/* Process fourth sample for 2nd, 6th .. tap */
fnext4 = fcurr4 + ((*pk) * gnext3);
/* g2(n) = f1(n) * K2 + g1(n-1) */
/* Calculation of state values for next stage */
gnext4 = (fcurr4 * (*pk)) + gnext3;
gnext3 = (fcurr3 * (*pk)) + gnext2;
gnext2 = (fcurr2 * (*pk)) + gnext1;
gnext1 = (fcurr1 * (*pk++)) + gcurr1;
/* Read g2(n-1), g4(n-1) .... from state */
gcurr1 = *px;
/* save g2(n) in state buffer */
*px++ = gnext4;
/* Sample processing for K3, K7.... */
/* Process first sample for 3rd, 7th .. tap */
/* f3(n) = f2(n) + K3 * g2(n-1) */
fcurr1 = fnext1 + ((*pk) * gcurr1);
/* Process second sample for 3rd, 7th .. tap */
fcurr2 = fnext2 + ((*pk) * gnext1);
/* Process third sample for 3rd, 7th .. tap */
fcurr3 = fnext3 + ((*pk) * gnext2);
/* Process fourth sample for 3rd, 7th .. tap */
fcurr4 = fnext4 + ((*pk) * gnext3);
/* Calculation of state values for next stage */
/* g3(n) = f2(n) * K3 + g2(n-1) */
gnext4 = (fnext4 * (*pk)) + gnext3;
gnext3 = (fnext3 * (*pk)) + gnext2;
gnext2 = (fnext2 * (*pk)) + gnext1;
gnext1 = (fnext1 * (*pk++)) + gcurr1;
/* Read g1(n-1), g3(n-1) .... from state */
gcurr1 = *px;
/* save g3(n) in state buffer */
*px++ = gnext4;
/* Sample processing for K4, K8.... */
/* Process first sample for 4th, 8th .. tap */
/* f4(n) = f3(n) + K4 * g3(n-1) */
fnext1 = fcurr1 + ((*pk) * gcurr1);
/* Process second sample for 4th, 8th .. tap */
/* for sample 2 processing */
fnext2 = fcurr2 + ((*pk) * gnext1);
/* Process third sample for 4th, 8th .. tap */
fnext3 = fcurr3 + ((*pk) * gnext2);
/* Process fourth sample for 4th, 8th .. tap */
fnext4 = fcurr4 + ((*pk) * gnext3);
/* g4(n) = f3(n) * K4 + g3(n-1) */
/* Calculation of state values for next stage */
gnext4 = (fcurr4 * (*pk)) + gnext3;
gnext3 = (fcurr3 * (*pk)) + gnext2;
gnext2 = (fcurr2 * (*pk)) + gnext1;
gnext1 = (fcurr1 * (*pk++)) + gcurr1;
/* Read g2(n-1), g4(n-1) .... from state */
gcurr1 = *px;
/* save g4(n) in state buffer */
*px++ = gnext4;
/* Sample processing for K5, K9.... */
/* Process first sample for 5th, 9th .. tap */
/* f5(n) = f4(n) + K5 * g4(n-1) */
fcurr1 = fnext1 + ((*pk) * gcurr1);
/* Process second sample for 5th, 9th .. tap */
fcurr2 = fnext2 + ((*pk) * gnext1);
/* Process third sample for 5th, 9th .. tap */
fcurr3 = fnext3 + ((*pk) * gnext2);
/* Process fourth sample for 5th, 9th .. tap */
fcurr4 = fnext4 + ((*pk) * gnext3);
/* Calculation of state values for next stage */
/* g5(n) = f4(n) * K5 + g4(n-1) */
gnext4 = (fnext4 * (*pk)) + gnext3;
gnext3 = (fnext3 * (*pk)) + gnext2;
gnext2 = (fnext2 * (*pk)) + gnext1;
gnext1 = (fnext1 * (*pk++)) + gcurr1;
stageCnt--;
}
/* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
stageCnt = (numStages - 1u) % 0x4u;
while (stageCnt > 0u)
{
gcurr1 = *px;
/* save g value in state buffer */
*px++ = gnext4;
/* Process four samples for last three taps here */
fnext1 = fcurr1 + ((*pk) * gcurr1);
fnext2 = fcurr2 + ((*pk) * gnext1);
fnext3 = fcurr3 + ((*pk) * gnext2);
fnext4 = fcurr4 + ((*pk) * gnext3);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext4 = (fcurr4 * (*pk)) + gnext3;
gnext3 = (fcurr3 * (*pk)) + gnext2;
gnext2 = (fcurr2 * (*pk)) + gnext1;
gnext1 = (fcurr1 * (*pk++)) + gcurr1;
/* Update of f values for next coefficient set processing */
fcurr1 = fnext1;
fcurr2 = fnext2;
fcurr3 = fnext3;
fcurr4 = fnext4;
stageCnt--;
}
/* The results in the 4 accumulators, store in the destination buffer. */
/* y(n) = fN(n) */
*pDst++ = fcurr1;
*pDst++ = fcurr2;
*pDst++ = fcurr3;
*pDst++ = fcurr4;
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* f0(n) = x(n) */
fcurr1 = *pSrc++;
/* Initialize coeff pointer */
pk = (pCoeffs);
/* Initialize state pointer */
px = pState;
/* read g2(n) from state buffer */
gcurr1 = *px;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext1 = fcurr1 + ((*pk) * gcurr1);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext1 = (fcurr1 * (*pk++)) + gcurr1;
/* save g1(n) in state buffer */
*px++ = fcurr1;
/* f1(n) is saved in fcurr1
for next stage processing */
fcurr1 = fnext1;
stageCnt = (numStages - 1u);
/* stage loop */
while (stageCnt > 0u)
{
/* read g2(n) from state buffer */
gcurr1 = *px;
/* save g1(n) in state buffer */
*px++ = gnext1;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
fnext1 = fcurr1 + ((*pk) * gcurr1);
/* g2(n) = f1(n) * K2 + g1(n-1) */
gnext1 = (fcurr1 * (*pk++)) + gcurr1;
/* f1(n) is saved in fcurr1
for next stage processing */
fcurr1 = fnext1;
stageCnt--;
}
/* y(n) = fN(n) */
*pDst++ = fcurr1;
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
float32_t fcurr, fnext, gcurr, gnext; /* temporary variables */
uint32_t numStages = S->numStages; /* Length of the filter */
uint32_t blkCnt, stageCnt; /* temporary variables for counts */
pState = &S->pState[0];
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* f0(n) = x(n) */
fcurr = *pSrc++;
/* Initialize coeff pointer */
pk = pCoeffs;
/* Initialize state pointer */
px = pState;
/* read g0(n-1) from state buffer */
gcurr = *px;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext = fcurr + ((*pk) * gcurr);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext = (fcurr * (*pk++)) + gcurr;
/* save f0(n) in state buffer */
*px++ = fcurr;
/* f1(n) is saved in fcurr
for next stage processing */
fcurr = fnext;
stageCnt = (numStages - 1u);
/* stage loop */
while (stageCnt > 0u)
{
/* read g2(n) from state buffer */
gcurr = *px;
/* save g1(n) in state buffer */
*px++ = gnext;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
fnext = fcurr + ((*pk) * gcurr);
/* g2(n) = f1(n) * K2 + g1(n-1) */
gnext = (fcurr * (*pk++)) + gcurr;
/* f1(n) is saved in fcurr1
for next stage processing */
fcurr = fnext;
stageCnt--;
}
/* y(n) = fN(n) */
*pDst++ = fcurr;
blkCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of FIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_lattice_f32.c
|
C
|
apache-2.0
| 15,785
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_lattice_init_f32.c
* Description: Floating-point FIR Lattice filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Lattice
* @{
*/
/**
* @brief Initialization function for the floating-point FIR lattice filter.
* @param[in] *S points to an instance of the floating-point FIR lattice structure.
* @param[in] numStages number of filter stages.
* @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
* @param[in] *pState points to the state buffer. The array is of length numStages.
* @return none.
*/
void arm_fir_lattice_init_f32(
arm_fir_lattice_instance_f32 * S,
uint16_t numStages,
float32_t * pCoeffs,
float32_t * pState)
{
/* Assign filter taps */
S->numStages = numStages;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always numStages */
memset(pState, 0, (numStages) * sizeof(float32_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of FIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
|
C
|
apache-2.0
| 2,046
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_lattice_init_q15.c
* Description: Q15 FIR Lattice filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Lattice
* @{
*/
/**
* @brief Initialization function for the Q15 FIR lattice filter.
* @param[in] *S points to an instance of the Q15 FIR lattice structure.
* @param[in] numStages number of filter stages.
* @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
* @param[in] *pState points to the state buffer. The array is of length numStages.
* @return none.
*/
void arm_fir_lattice_init_q15(
arm_fir_lattice_instance_q15 * S,
uint16_t numStages,
q15_t * pCoeffs,
q15_t * pState)
{
/* Assign filter taps */
S->numStages = numStages;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always numStages */
memset(pState, 0, (numStages) * sizeof(q15_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of FIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
|
C
|
apache-2.0
| 2,017
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_lattice_init_q31.c
* Description: Q31 FIR lattice filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Lattice
* @{
*/
/**
* @brief Initialization function for the Q31 FIR lattice filter.
* @param[in] *S points to an instance of the Q31 FIR lattice structure.
* @param[in] numStages number of filter stages.
* @param[in] *pCoeffs points to the coefficient buffer. The array is of length numStages.
* @param[in] *pState points to the state buffer. The array is of length numStages.
* @return none.
*/
void arm_fir_lattice_init_q31(
arm_fir_lattice_instance_q31 * S,
uint16_t numStages,
q31_t * pCoeffs,
q31_t * pState)
{
/* Assign filter taps */
S->numStages = numStages;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always numStages */
memset(pState, 0, (numStages) * sizeof(q31_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of FIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
|
C
|
apache-2.0
| 2,018
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_lattice_q15.c
* Description: Q15 FIR lattice filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Lattice
* @{
*/
/**
* @brief Processing function for the Q15 FIR lattice filter.
* @param[in] *S points to an instance of the Q15 FIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_fir_lattice_q15(
const arm_fir_lattice_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
q15_t *pState; /* State pointer */
q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q15_t *px; /* temporary state pointer */
q15_t *pk; /* temporary coefficient pointer */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t fcurnt1, fnext1, gcurnt1 = 0, gnext1; /* temporary variables for first sample in loop unrolling */
q31_t fcurnt2, fnext2, gnext2; /* temporary variables for second sample in loop unrolling */
q31_t fcurnt3, fnext3, gnext3; /* temporary variables for third sample in loop unrolling */
q31_t fcurnt4, fnext4, gnext4; /* temporary variables for fourth sample in loop unrolling */
uint32_t numStages = S->numStages; /* Number of stages in the filter */
uint32_t blkCnt, stageCnt; /* temporary variables for counts */
pState = &S->pState[0];
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* Read two samples from input buffer */
/* f0(n) = x(n) */
fcurnt1 = *pSrc++;
fcurnt2 = *pSrc++;
/* Initialize coeff pointer */
pk = (pCoeffs);
/* Initialize state pointer */
px = pState;
/* Read g0(n-1) from state */
gcurnt1 = *px;
/* Process first sample for first tap */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
fnext1 = __SSAT(fnext1, 16);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext1 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + gcurnt1;
gnext1 = __SSAT(gnext1, 16);
/* Process second sample for first tap */
/* for sample 2 processing */
fnext2 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + fcurnt2;
fnext2 = __SSAT(fnext2, 16);
gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt1;
gnext2 = __SSAT(gnext2, 16);
/* Read next two samples from input buffer */
/* f0(n+2) = x(n+2) */
fcurnt3 = *pSrc++;
fcurnt4 = *pSrc++;
/* Copy only last input samples into the state buffer
which is used for next four samples processing */
*px++ = (q15_t) fcurnt4;
/* Process third sample for first tap */
fnext3 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt3;
fnext3 = __SSAT(fnext3, 16);
gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt2;
gnext3 = __SSAT(gnext3, 16);
/* Process fourth sample for first tap */
fnext4 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt4;
fnext4 = __SSAT(fnext4, 16);
gnext4 = (q31_t) ((fcurnt4 * (*pk++)) >> 15u) + fcurnt3;
gnext4 = __SSAT(gnext4, 16);
/* Update of f values for next coefficient set processing */
fcurnt1 = fnext1;
fcurnt2 = fnext2;
fcurnt3 = fnext3;
fcurnt4 = fnext4;
/* Loop unrolling. Process 4 taps at a time . */
stageCnt = (numStages - 1u) >> 2;
/* Loop over the number of taps. Unroll by a factor of 4.
** Repeat until we've computed numStages-3 coefficients. */
/* Process 2nd, 3rd, 4th and 5th taps ... here */
while (stageCnt > 0u)
{
/* Read g1(n-1), g3(n-1) .... from state */
gcurnt1 = *px;
/* save g1(n) in state buffer */
*px++ = (q15_t) gnext4;
/* Process first sample for 2nd, 6th .. tap */
/* Sample processing for K2, K6.... */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
fnext1 = __SSAT(fnext1, 16);
/* Process second sample for 2nd, 6th .. tap */
/* for sample 2 processing */
fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
fnext2 = __SSAT(fnext2, 16);
/* Process third sample for 2nd, 6th .. tap */
fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
fnext3 = __SSAT(fnext3, 16);
/* Process fourth sample for 2nd, 6th .. tap */
/* fnext4 = fcurnt4 + (*pk) * gnext3; */
fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
fnext4 = __SSAT(fnext4, 16);
/* g1(n) = f0(n) * K1 + g0(n-1) */
/* Calculation of state values for next stage */
gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
gnext4 = __SSAT(gnext4, 16);
gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
gnext3 = __SSAT(gnext3, 16);
gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
gnext2 = __SSAT(gnext2, 16);
gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
gnext1 = __SSAT(gnext1, 16);
/* Read g2(n-1), g4(n-1) .... from state */
gcurnt1 = *px;
/* save g1(n) in state buffer */
*px++ = (q15_t) gnext4;
/* Sample processing for K3, K7.... */
/* Process first sample for 3rd, 7th .. tap */
/* f3(n) = f2(n) + K3 * g2(n-1) */
fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
fcurnt1 = __SSAT(fcurnt1, 16);
/* Process second sample for 3rd, 7th .. tap */
fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
fcurnt2 = __SSAT(fcurnt2, 16);
/* Process third sample for 3rd, 7th .. tap */
fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
fcurnt3 = __SSAT(fcurnt3, 16);
/* Process fourth sample for 3rd, 7th .. tap */
fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
fcurnt4 = __SSAT(fcurnt4, 16);
/* Calculation of state values for next stage */
/* g3(n) = f2(n) * K3 + g2(n-1) */
gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
gnext4 = __SSAT(gnext4, 16);
gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
gnext3 = __SSAT(gnext3, 16);
gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
gnext2 = __SSAT(gnext2, 16);
gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
gnext1 = __SSAT(gnext1, 16);
/* Read g1(n-1), g3(n-1) .... from state */
gcurnt1 = *px;
/* save g1(n) in state buffer */
*px++ = (q15_t) gnext4;
/* Sample processing for K4, K8.... */
/* Process first sample for 4th, 8th .. tap */
/* f4(n) = f3(n) + K4 * g3(n-1) */
fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
fnext1 = __SSAT(fnext1, 16);
/* Process second sample for 4th, 8th .. tap */
/* for sample 2 processing */
fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
fnext2 = __SSAT(fnext2, 16);
/* Process third sample for 4th, 8th .. tap */
fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
fnext3 = __SSAT(fnext3, 16);
/* Process fourth sample for 4th, 8th .. tap */
fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
fnext4 = __SSAT(fnext4, 16);
/* g4(n) = f3(n) * K4 + g3(n-1) */
/* Calculation of state values for next stage */
gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
gnext4 = __SSAT(gnext4, 16);
gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
gnext3 = __SSAT(gnext3, 16);
gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
gnext2 = __SSAT(gnext2, 16);
gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
gnext1 = __SSAT(gnext1, 16);
/* Read g2(n-1), g4(n-1) .... from state */
gcurnt1 = *px;
/* save g4(n) in state buffer */
*px++ = (q15_t) gnext4;
/* Sample processing for K5, K9.... */
/* Process first sample for 5th, 9th .. tap */
/* f5(n) = f4(n) + K5 * g4(n-1) */
fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
fcurnt1 = __SSAT(fcurnt1, 16);
/* Process second sample for 5th, 9th .. tap */
fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
fcurnt2 = __SSAT(fcurnt2, 16);
/* Process third sample for 5th, 9th .. tap */
fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
fcurnt3 = __SSAT(fcurnt3, 16);
/* Process fourth sample for 5th, 9th .. tap */
fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
fcurnt4 = __SSAT(fcurnt4, 16);
/* Calculation of state values for next stage */
/* g5(n) = f4(n) * K5 + g4(n-1) */
gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
gnext4 = __SSAT(gnext4, 16);
gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
gnext3 = __SSAT(gnext3, 16);
gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
gnext2 = __SSAT(gnext2, 16);
gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
gnext1 = __SSAT(gnext1, 16);
stageCnt--;
}
/* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
stageCnt = (numStages - 1u) % 0x4u;
while (stageCnt > 0u)
{
gcurnt1 = *px;
/* save g value in state buffer */
*px++ = (q15_t) gnext4;
/* Process four samples for last three taps here */
fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
fnext1 = __SSAT(fnext1, 16);
fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
fnext2 = __SSAT(fnext2, 16);
fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
fnext3 = __SSAT(fnext3, 16);
fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
fnext4 = __SSAT(fnext4, 16);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
gnext4 = __SSAT(gnext4, 16);
gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
gnext3 = __SSAT(gnext3, 16);
gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
gnext2 = __SSAT(gnext2, 16);
gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
gnext1 = __SSAT(gnext1, 16);
/* Update of f values for next coefficient set processing */
fcurnt1 = fnext1;
fcurnt2 = fnext2;
fcurnt3 = fnext3;
fcurnt4 = fnext4;
stageCnt--;
}
/* The results in the 4 accumulators, store in the destination buffer. */
/* y(n) = fN(n) */
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ = __PKHBT(fcurnt1, fcurnt2, 16);
*__SIMD32(pDst)++ = __PKHBT(fcurnt3, fcurnt4, 16);
#else
*__SIMD32(pDst)++ = __PKHBT(fcurnt2, fcurnt1, 16);
*__SIMD32(pDst)++ = __PKHBT(fcurnt4, fcurnt3, 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* f0(n) = x(n) */
fcurnt1 = *pSrc++;
/* Initialize coeff pointer */
pk = (pCoeffs);
/* Initialize state pointer */
px = pState;
/* read g2(n) from state buffer */
gcurnt1 = *px;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
fnext1 = __SSAT(fnext1, 16);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
gnext1 = __SSAT(gnext1, 16);
/* save g1(n) in state buffer */
*px++ = (q15_t) fcurnt1;
/* f1(n) is saved in fcurnt1
for next stage processing */
fcurnt1 = fnext1;
stageCnt = (numStages - 1u);
/* stage loop */
while (stageCnt > 0u)
{
/* read g2(n) from state buffer */
gcurnt1 = *px;
/* save g1(n) in state buffer */
*px++ = (q15_t) gnext1;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
fnext1 = __SSAT(fnext1, 16);
/* g2(n) = f1(n) * K2 + g1(n-1) */
gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
gnext1 = __SSAT(gnext1, 16);
/* f1(n) is saved in fcurnt1
for next stage processing */
fcurnt1 = fnext1;
stageCnt--;
}
/* y(n) = fN(n) */
*pDst++ = __SSAT(fcurnt1, 16);
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
q31_t fcurnt, fnext, gcurnt, gnext; /* temporary variables */
uint32_t numStages = S->numStages; /* Length of the filter */
uint32_t blkCnt, stageCnt; /* temporary variables for counts */
pState = &S->pState[0];
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* f0(n) = x(n) */
fcurnt = *pSrc++;
/* Initialize coeff pointer */
pk = (pCoeffs);
/* Initialize state pointer */
px = pState;
/* read g0(n-1) from state buffer */
gcurnt = *px;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
fnext = __SSAT(fnext, 16);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
gnext = __SSAT(gnext, 16);
/* save f0(n) in state buffer */
*px++ = (q15_t) fcurnt;
/* f1(n) is saved in fcurnt
for next stage processing */
fcurnt = fnext;
stageCnt = (numStages - 1u);
/* stage loop */
while (stageCnt > 0u)
{
/* read g1(n-1) from state buffer */
gcurnt = *px;
/* save g0(n-1) in state buffer */
*px++ = (q15_t) gnext;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
fnext = __SSAT(fnext, 16);
/* g2(n) = f1(n) * K2 + g1(n-1) */
gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
gnext = __SSAT(gnext, 16);
/* f1(n) is saved in fcurnt
for next stage processing */
fcurnt = fnext;
stageCnt--;
}
/* y(n) = fN(n) */
*pDst++ = __SSAT(fcurnt, 16);
blkCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of FIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_lattice_q15.c
|
C
|
apache-2.0
| 15,502
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_lattice_q31.c
* Description: Q31 FIR lattice filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Lattice
* @{
*/
/**
* @brief Processing function for the Q31 FIR lattice filter.
* @param[in] *S points to an instance of the Q31 FIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] blockSize number of samples to process.
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
* In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.
*/
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
void arm_fir_lattice_q31(
const arm_fir_lattice_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize)
{
q31_t *pState; /* State pointer */
q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q31_t *px; /* temporary state pointer */
q31_t *pk; /* temporary coefficient pointer */
q31_t fcurr1, fnext1, gcurr1 = 0, gnext1; /* temporary variables for first sample in loop unrolling */
q31_t fcurr2, fnext2, gnext2; /* temporary variables for second sample in loop unrolling */
uint32_t numStages = S->numStages; /* Length of the filter */
uint32_t blkCnt, stageCnt; /* temporary variables for counts */
q31_t k;
pState = &S->pState[0];
blkCnt = blockSize >> 1u;
/* First part of the processing with loop unrolling. Compute 2 outputs at a time.
a second loop below computes the remaining 1 sample. */
while (blkCnt > 0u)
{
/* f0(n) = x(n) */
fcurr1 = *pSrc++;
/* f0(n) = x(n) */
fcurr2 = *pSrc++;
/* Initialize coeff pointer */
pk = (pCoeffs);
/* Initialize state pointer */
px = pState;
/* read g0(n - 1) from state buffer */
gcurr1 = *px;
/* Read the reflection coefficient */
k = *pk++;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
fnext1 = fcurr1 + (fnext1 << 1u);
gnext1 = gcurr1 + (gnext1 << 1u);
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext2 = (q31_t) (((q63_t) fcurr1 * k) >> 32);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
fnext2 = fcurr2 + (fnext2 << 1u);
gnext2 = fcurr1 + (gnext2 << 1u);
/* save g1(n) in state buffer */
*px++ = fcurr2;
/* f1(n) is saved in fcurr1
for next stage processing */
fcurr1 = fnext1;
fcurr2 = fnext2;
stageCnt = (numStages - 1u);
/* stage loop */
while (stageCnt > 0u)
{
/* Read the reflection coefficient */
k = *pk++;
/* read g2(n) from state buffer */
gcurr1 = *px;
/* save g1(n) in state buffer */
*px++ = gnext2;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
fnext2 = (q31_t) (((q63_t) gnext1 * k) >> 32);
fnext1 = fcurr1 + (fnext1 << 1u);
fnext2 = fcurr2 + (fnext2 << 1u);
/* g2(n) = f1(n) * K2 + g1(n-1) */
gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
gnext2 = gnext1 + (gnext2 << 1u);
/* g2(n) = f1(n) * K2 + g1(n-1) */
gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
gnext1 = gcurr1 + (gnext1 << 1u);
/* f1(n) is saved in fcurr1
for next stage processing */
fcurr1 = fnext1;
fcurr2 = fnext2;
stageCnt--;
}
/* y(n) = fN(n) */
*pDst++ = fcurr1;
*pDst++ = fcurr2;
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x2u;
while (blkCnt > 0u)
{
/* f0(n) = x(n) */
fcurr1 = *pSrc++;
/* Initialize coeff pointer */
pk = (pCoeffs);
/* Initialize state pointer */
px = pState;
/* read g0(n - 1) from state buffer */
gcurr1 = *px;
/* Read the reflection coefficient */
k = *pk++;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
fnext1 = fcurr1 + (fnext1 << 1u);
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
gnext1 = gcurr1 + (gnext1 << 1u);
/* save g1(n) in state buffer */
*px++ = fcurr1;
/* f1(n) is saved in fcurr1
for next stage processing */
fcurr1 = fnext1;
stageCnt = (numStages - 1u);
/* stage loop */
while (stageCnt > 0u)
{
/* Read the reflection coefficient */
k = *pk++;
/* read g2(n) from state buffer */
gcurr1 = *px;
/* save g1(n) in state buffer */
*px++ = gnext1;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
fnext1 = fcurr1 + (fnext1 << 1u);
/* g2(n) = f1(n) * K2 + g1(n-1) */
gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
gnext1 = gcurr1 + (gnext1 << 1u);
/* f1(n) is saved in fcurr1
for next stage processing */
fcurr1 = fnext1;
stageCnt--;
}
/* y(n) = fN(n) */
*pDst++ = fcurr1;
blkCnt--;
}
}
#else
/* Run the below code for Cortex-M0 */
void arm_fir_lattice_q31(
const arm_fir_lattice_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize)
{
q31_t *pState; /* State pointer */
q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q31_t *px; /* temporary state pointer */
q31_t *pk; /* temporary coefficient pointer */
q31_t fcurr, fnext, gcurr, gnext; /* temporary variables */
uint32_t numStages = S->numStages; /* Length of the filter */
uint32_t blkCnt, stageCnt; /* temporary variables for counts */
pState = &S->pState[0];
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* f0(n) = x(n) */
fcurr = *pSrc++;
/* Initialize coeff pointer */
pk = (pCoeffs);
/* Initialize state pointer */
px = pState;
/* read g0(n-1) from state buffer */
gcurr = *px;
/* for sample 1 processing */
/* f1(n) = f0(n) + K1 * g0(n-1) */
fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
/* g1(n) = f0(n) * K1 + g0(n-1) */
gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
/* save g1(n) in state buffer */
*px++ = fcurr;
/* f1(n) is saved in fcurr1
for next stage processing */
fcurr = fnext;
stageCnt = (numStages - 1u);
/* stage loop */
while (stageCnt > 0u)
{
/* read g2(n) from state buffer */
gcurr = *px;
/* save g1(n) in state buffer */
*px++ = gnext;
/* Sample processing for K2, K3.... */
/* f2(n) = f1(n) + K2 * g1(n-1) */
fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
/* g2(n) = f1(n) * K2 + g1(n-1) */
gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
/* f1(n) is saved in fcurr1
for next stage processing */
fcurr = fnext;
stageCnt--;
}
/* y(n) = fN(n) */
*pDst++ = fcurr;
blkCnt--;
}
}
#endif /* #if defined (ARM_MATH_DSP) */
/**
* @} end of FIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_lattice_q31.c
|
C
|
apache-2.0
| 8,751
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_q15.c
* Description: Q15 FIR filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR
* @{
*/
/**
* @brief Processing function for the Q15 FIR filter.
* @param[in] *S points to an instance of the Q15 FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process per call.
* @return none.
*
*
* \par Restrictions
* If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
* In this case input, output, state buffers should be aligned by 32-bit
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using a 64-bit internal accumulator.
* Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
* The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
* There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
* After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
* Lastly, the accumulator is saturated to yield a result in 1.15 format.
*
* \par
* Refer to the function <code>arm_fir_fast_q15()</code> for a faster but less precise implementation of this function.
*/
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
#ifndef UNALIGNED_SUPPORT_DISABLE
void arm_fir_q15(
const arm_fir_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
q15_t *pState = S->pState; /* State pointer */
q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q15_t *pStateCurnt; /* Points to the current sample of the state */
q15_t *px1; /* Temporary q15 pointer for state buffer */
q15_t *pb; /* Temporary pointer for coefficient buffer */
q31_t x0, x1, x2, x3, c0; /* Temporary variables to hold SIMD state and coefficient values */
q63_t acc0, acc1, acc2, acc3; /* Accumulators */
uint32_t numTaps = S->numTaps; /* Number of taps in the filter */
uint32_t tapCnt, blkCnt; /* Loop counters */
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Apply loop unrolling and compute 4 output values simultaneously.
* The variables acc0 ... acc3 hold output values that are being computed:
*
* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
* acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
* acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
*/
blkCnt = blockSize >> 2;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* Copy four new input samples into the state buffer.
** Use 32-bit SIMD to move the 16-bit data. Only requires two copies. */
*__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
*__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
/* Set all accumulators to zero */
acc0 = 0;
acc1 = 0;
acc2 = 0;
acc3 = 0;
/* Initialize state pointer of type q15 */
px1 = pState;
/* Initialize coeff pointer of type q31 */
pb = pCoeffs;
/* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */
x0 = _SIMD32_OFFSET(px1);
/* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */
x1 = _SIMD32_OFFSET(px1 + 1u);
px1 += 2u;
/* Loop over the number of taps. Unroll by a factor of 4.
** Repeat until we've computed numTaps-4 coefficients. */
tapCnt = numTaps >> 2;
while (tapCnt > 0u)
{
/* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */
c0 = *__SIMD32(pb)++;
/* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
acc0 = __SMLALD(x0, c0, acc0);
/* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
acc1 = __SMLALD(x1, c0, acc1);
/* Read state x[n-N-2], x[n-N-3] */
x2 = _SIMD32_OFFSET(px1);
/* Read state x[n-N-3], x[n-N-4] */
x3 = _SIMD32_OFFSET(px1 + 1u);
/* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
acc2 = __SMLALD(x2, c0, acc2);
/* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
acc3 = __SMLALD(x3, c0, acc3);
/* Read coefficients b[N-2], b[N-3] */
c0 = *__SIMD32(pb)++;
/* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
acc0 = __SMLALD(x2, c0, acc0);
/* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
acc1 = __SMLALD(x3, c0, acc1);
/* Read state x[n-N-4], x[n-N-5] */
x0 = _SIMD32_OFFSET(px1 + 2u);
/* Read state x[n-N-5], x[n-N-6] */
x1 = _SIMD32_OFFSET(px1 + 3u);
/* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
acc2 = __SMLALD(x0, c0, acc2);
/* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
acc3 = __SMLALD(x1, c0, acc3);
px1 += 4u;
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps.
** This is always be 2 taps since the filter length is even. */
if ((numTaps & 0x3u) != 0u)
{
/* Read 2 coefficients */
c0 = *__SIMD32(pb)++;
/* Fetch 4 state variables */
x2 = _SIMD32_OFFSET(px1);
x3 = _SIMD32_OFFSET(px1 + 1u);
/* Perform the multiply-accumulates */
acc0 = __SMLALD(x0, c0, acc0);
px1 += 2u;
acc1 = __SMLALD(x1, c0, acc1);
acc2 = __SMLALD(x2, c0, acc2);
acc3 = __SMLALD(x3, c0, acc3);
}
/* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
** Then store the 4 outputs in the destination buffer. */
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
#else
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Advance the state pointer by 4 to process the next group of 4 samples */
pState = pState + 4;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Copy two samples into state buffer */
*pStateCurnt++ = *pSrc++;
/* Set the accumulator to zero */
acc0 = 0;
/* Initialize state pointer of type q15 */
px1 = pState;
/* Initialize coeff pointer of type q31 */
pb = pCoeffs;
tapCnt = numTaps >> 1;
do
{
c0 = *__SIMD32(pb)++;
x0 = *__SIMD32(px1)++;
acc0 = __SMLALD(x0, c0, acc0);
tapCnt--;
}
while (tapCnt > 0u);
/* The result is in 2.30 format. Convert to 1.15 with saturation.
** Then store the output in the destination buffer. */
*pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
/* Calculation of count for copying integer writes */
tapCnt = (numTaps - 1u) >> 2;
while (tapCnt > 0u)
{
/* Copy state values to start of state buffer */
*__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
*__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
tapCnt--;
}
/* Calculation of count for remaining q15_t data */
tapCnt = (numTaps - 1u) % 0x4u;
/* copy remaining data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
}
#else /* UNALIGNED_SUPPORT_DISABLE */
void arm_fir_q15(
const arm_fir_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
q15_t *pState = S->pState; /* State pointer */
q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q15_t *pStateCurnt; /* Points to the current sample of the state */
q63_t acc0, acc1, acc2, acc3; /* Accumulators */
q15_t *pb; /* Temporary pointer for coefficient buffer */
q15_t *px; /* Temporary q31 pointer for SIMD state buffer accesses */
q31_t x0, x1, x2, c0; /* Temporary variables to hold SIMD state and coefficient values */
uint32_t numTaps = S->numTaps; /* Number of taps in the filter */
uint32_t tapCnt, blkCnt; /* Loop counters */
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Apply loop unrolling and compute 4 output values simultaneously.
* The variables acc0 ... acc3 hold output values that are being computed:
*
* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
* acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
* acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
*/
blkCnt = blockSize >> 2;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* Copy four new input samples into the state buffer.
** Use 32-bit SIMD to move the 16-bit data. Only requires two copies. */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
/* Set all accumulators to zero */
acc0 = 0;
acc1 = 0;
acc2 = 0;
acc3 = 0;
/* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
px = pState;
/* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
pb = pCoeffs;
/* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */
x0 = *__SIMD32(px)++;
/* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
x2 = *__SIMD32(px)++;
/* Loop over the number of taps. Unroll by a factor of 4.
** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
tapCnt = numTaps >> 2;
while (tapCnt > 0)
{
/* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */
c0 = *__SIMD32(pb)++;
/* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
acc0 = __SMLALD(x0, c0, acc0);
/* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
acc2 = __SMLALD(x2, c0, acc2);
/* pack x[n-N-1] and x[n-N-2] */
#ifndef ARM_MATH_BIG_ENDIAN
x1 = __PKHBT(x2, x0, 0);
#else
x1 = __PKHBT(x0, x2, 0);
#endif
/* Read state x[n-N-4], x[n-N-5] */
x0 = _SIMD32_OFFSET(px);
/* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
acc1 = __SMLALDX(x1, c0, acc1);
/* pack x[n-N-3] and x[n-N-4] */
#ifndef ARM_MATH_BIG_ENDIAN
x1 = __PKHBT(x0, x2, 0);
#else
x1 = __PKHBT(x2, x0, 0);
#endif
/* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
acc3 = __SMLALDX(x1, c0, acc3);
/* Read coefficients b[N-2], b[N-3] */
c0 = *__SIMD32(pb)++;
/* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
acc0 = __SMLALD(x2, c0, acc0);
/* Read state x[n-N-6], x[n-N-7] with offset */
x2 = _SIMD32_OFFSET(px + 2u);
/* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
acc2 = __SMLALD(x0, c0, acc2);
/* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
acc1 = __SMLALDX(x1, c0, acc1);
/* pack x[n-N-5] and x[n-N-6] */
#ifndef ARM_MATH_BIG_ENDIAN
x1 = __PKHBT(x2, x0, 0);
#else
x1 = __PKHBT(x0, x2, 0);
#endif
/* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
acc3 = __SMLALDX(x1, c0, acc3);
/* Update state pointer for next state reading */
px += 4u;
/* Decrement tap count */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps.
** This is always be 2 taps since the filter length is even. */
if ((numTaps & 0x3u) != 0u)
{
/* Read last two coefficients */
c0 = *__SIMD32(pb)++;
/* Perform the multiply-accumulates */
acc0 = __SMLALD(x0, c0, acc0);
acc2 = __SMLALD(x2, c0, acc2);
/* pack state variables */
#ifndef ARM_MATH_BIG_ENDIAN
x1 = __PKHBT(x2, x0, 0);
#else
x1 = __PKHBT(x0, x2, 0);
#endif
/* Read last state variables */
x0 = *__SIMD32(px);
/* Perform the multiply-accumulates */
acc1 = __SMLALDX(x1, c0, acc1);
/* pack state variables */
#ifndef ARM_MATH_BIG_ENDIAN
x1 = __PKHBT(x0, x2, 0);
#else
x1 = __PKHBT(x2, x0, 0);
#endif
/* Perform the multiply-accumulates */
acc3 = __SMLALDX(x1, c0, acc3);
}
/* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
** Then store the 4 outputs in the destination buffer. */
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
#else
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
*__SIMD32(pDst)++ =
__PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Advance the state pointer by 4 to process the next group of 4 samples */
pState = pState + 4;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Copy two samples into state buffer */
*pStateCurnt++ = *pSrc++;
/* Set the accumulator to zero */
acc0 = 0;
/* Use SIMD to hold states and coefficients */
px = pState;
pb = pCoeffs;
tapCnt = numTaps >> 1u;
do
{
acc0 += (q31_t) * px++ * *pb++;
acc0 += (q31_t) * px++ * *pb++;
tapCnt--;
}
while (tapCnt > 0u);
/* The result is in 2.30 format. Convert to 1.15 with saturation.
** Then store the output in the destination buffer. */
*pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
/* Advance state pointer by 1 for the next sample */
pState = pState + 1u;
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
/* Calculation of count for copying integer writes */
tapCnt = (numTaps - 1u) >> 2;
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
tapCnt--;
}
/* Calculation of count for remaining q15_t data */
tapCnt = (numTaps - 1u) % 0x4u;
/* copy remaining data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
}
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
#else /* ARM_MATH_CM0_FAMILY */
/* Run the below code for Cortex-M0 */
void arm_fir_q15(
const arm_fir_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
q15_t *pState = S->pState; /* State pointer */
q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q15_t *pStateCurnt; /* Points to the current sample of the state */
q15_t *px; /* Temporary pointer for state buffer */
q15_t *pb; /* Temporary pointer for coefficient buffer */
q63_t acc; /* Accumulator */
uint32_t numTaps = S->numTaps; /* Number of nTaps in the filter */
uint32_t tapCnt, blkCnt; /* Loop counters */
/* S->pState buffer contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Initialize blkCnt with blockSize */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
/* Set the accumulator to zero */
acc = 0;
/* Initialize state pointer */
px = pState;
/* Initialize Coefficient pointer */
pb = pCoeffs;
tapCnt = numTaps;
/* Perform the multiply-accumulates */
do
{
/* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
acc += (q31_t) * px++ * *pb++;
tapCnt--;
} while (tapCnt > 0u);
/* The result is in 2.30 format. Convert to 1.15
** Then store the output in the destination buffer. */
*pDst++ = (q15_t) __SSAT((acc >> 15u), 16);
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the samples loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
/* Copy numTaps number of values */
tapCnt = (numTaps - 1u);
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
}
#endif /* #if defined (ARM_MATH_DSP) */
/**
* @} end of FIR group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_q15.c
|
C
|
apache-2.0
| 20,399
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_q31.c
* Description: Q31 FIR filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR
* @{
*/
/**
* @param[in] *S points to an instance of the Q31 FIR filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process per call.
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 64-bit accumulator.
* The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
* Thus, if the accumulator result overflows it wraps around rather than clip.
* In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
* After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
*
* \par
* Refer to the function <code>arm_fir_fast_q31()</code> for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.
*/
void arm_fir_q31(
const arm_fir_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize)
{
q31_t *pState = S->pState; /* State pointer */
q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q31_t *pStateCurnt; /* Points to the current sample of the state */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t x0, x1, x2; /* Temporary variables to hold state */
q31_t c0; /* Temporary variable to hold coefficient value */
q31_t *px; /* Temporary pointer for state */
q31_t *pb; /* Temporary pointer for coefficient buffer */
q63_t acc0, acc1, acc2; /* Accumulators */
uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
uint32_t i, tapCnt, blkCnt, tapCntN3; /* Loop counters */
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Apply loop unrolling and compute 4 output values simultaneously.
* The variables acc0 ... acc3 hold output values that are being computed:
*
* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
* acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
* acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
*/
blkCnt = blockSize / 3;
blockSize = blockSize - (3 * blkCnt);
tapCnt = numTaps / 3;
tapCntN3 = numTaps - (3 * tapCnt);
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* Copy three new input samples into the state buffer */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
/* Set all accumulators to zero */
acc0 = 0;
acc1 = 0;
acc2 = 0;
/* Initialize state pointer */
px = pState;
/* Initialize coefficient pointer */
pb = pCoeffs;
/* Read the first two samples from the state buffer:
* x[n-numTaps], x[n-numTaps-1] */
x0 = *(px++);
x1 = *(px++);
/* Loop unrolling. Process 3 taps at a time. */
i = tapCnt;
while (i > 0u)
{
/* Read the b[numTaps] coefficient */
c0 = *pb;
/* Read x[n-numTaps-2] sample */
x2 = *(px++);
/* Perform the multiply-accumulates */
acc0 += ((q63_t) x0 * c0);
acc1 += ((q63_t) x1 * c0);
acc2 += ((q63_t) x2 * c0);
/* Read the coefficient and state */
c0 = *(pb + 1u);
x0 = *(px++);
/* Perform the multiply-accumulates */
acc0 += ((q63_t) x1 * c0);
acc1 += ((q63_t) x2 * c0);
acc2 += ((q63_t) x0 * c0);
/* Read the coefficient and state */
c0 = *(pb + 2u);
x1 = *(px++);
/* update coefficient pointer */
pb += 3u;
/* Perform the multiply-accumulates */
acc0 += ((q63_t) x2 * c0);
acc1 += ((q63_t) x0 * c0);
acc2 += ((q63_t) x1 * c0);
/* Decrement the loop counter */
i--;
}
/* If the filter length is not a multiple of 3, compute the remaining filter taps */
i = tapCntN3;
while (i > 0u)
{
/* Read coefficients */
c0 = *(pb++);
/* Fetch 1 state variable */
x2 = *(px++);
/* Perform the multiply-accumulates */
acc0 += ((q63_t) x0 * c0);
acc1 += ((q63_t) x1 * c0);
acc2 += ((q63_t) x2 * c0);
/* Reuse the present sample states for next sample */
x0 = x1;
x1 = x2;
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 3 to process the next group of 3 samples */
pState = pState + 3;
/* The results in the 3 accumulators are in 2.30 format. Convert to 1.31
** Then store the 3 outputs in the destination buffer. */
*pDst++ = (q31_t) (acc0 >> 31u);
*pDst++ = (q31_t) (acc1 >> 31u);
*pDst++ = (q31_t) (acc2 >> 31u);
/* Decrement the samples loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 3, compute any remaining output samples here.
** No loop unrolling is used. */
while (blockSize > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
/* Set the accumulator to zero */
acc0 = 0;
/* Initialize state pointer */
px = pState;
/* Initialize Coefficient pointer */
pb = (pCoeffs);
i = numTaps;
/* Perform the multiply-accumulates */
do
{
acc0 += (q63_t) * (px++) * (*(pb++));
i--;
} while (i > 0u);
/* The result is in 2.62 format. Convert to 1.31
** Then store the output in the destination buffer. */
*pDst++ = (q31_t) (acc0 >> 31u);
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the samples loop counter */
blockSize--;
}
/* Processing is complete.
** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
tapCnt = (numTaps - 1u) >> 2u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
/* Calculate remaining number of copies */
tapCnt = (numTaps - 1u) % 0x4u;
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#else
/* Run the below code for Cortex-M0 */
q31_t *px; /* Temporary pointer for state */
q31_t *pb; /* Temporary pointer for coefficient buffer */
q63_t acc; /* Accumulator */
uint32_t numTaps = S->numTaps; /* Length of the filter */
uint32_t i, tapCnt, blkCnt; /* Loop counters */
/* S->pState buffer contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Initialize blkCnt with blockSize */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
/* Set the accumulator to zero */
acc = 0;
/* Initialize state pointer */
px = pState;
/* Initialize Coefficient pointer */
pb = pCoeffs;
i = numTaps;
/* Perform the multiply-accumulates */
do
{
/* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
acc += (q63_t) * px++ * *pb++;
i--;
} while (i > 0u);
/* The result is in 2.62 format. Convert to 1.31
** Then store the output in the destination buffer. */
*pDst++ = (q31_t) (acc >> 31u);
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the samples loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last numTaps - 1 samples to the starting of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
/* Copy numTaps number of values */
tapCnt = numTaps - 1u;
/* Copy the data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of FIR group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_q31.c
|
C
|
apache-2.0
| 10,495
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_q7.c
* Description: Q7 FIR filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR
* @{
*/
/**
* @param[in] *S points to an instance of the Q7 FIR filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process per call.
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using a 32-bit internal accumulator.
* Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
* The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
* There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
* The accumulator is converted to 18.7 format by discarding the low 7 bits.
* Finally, the result is truncated to 1.7 format.
*/
void arm_fir_q7(
const arm_fir_instance_q7 * S,
q7_t * pSrc,
q7_t * pDst,
uint32_t blockSize)
{
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t *pState = S->pState; /* State pointer */
q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q7_t *pStateCurnt; /* Points to the current sample of the state */
q7_t x0, x1, x2, x3; /* Temporary variables to hold state */
q7_t c0; /* Temporary variable to hold coefficient value */
q7_t *px; /* Temporary pointer for state */
q7_t *pb; /* Temporary pointer for coefficient buffer */
q31_t acc0, acc1, acc2, acc3; /* Accumulators */
uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
uint32_t i, tapCnt, blkCnt; /* Loop counters */
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Apply loop unrolling and compute 4 output values simultaneously.
* The variables acc0 ... acc3 hold output values that are being computed:
*
* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
* acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
* acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
*/
blkCnt = blockSize >> 2;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* Copy four new input samples into the state buffer */
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
*pStateCurnt++ = *pSrc++;
/* Set all accumulators to zero */
acc0 = 0;
acc1 = 0;
acc2 = 0;
acc3 = 0;
/* Initialize state pointer */
px = pState;
/* Initialize coefficient pointer */
pb = pCoeffs;
/* Read the first three samples from the state buffer:
* x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
x0 = *(px++);
x1 = *(px++);
x2 = *(px++);
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
i = tapCnt;
while (i > 0u)
{
/* Read the b[numTaps] coefficient */
c0 = *pb;
/* Read x[n-numTaps-3] sample */
x3 = *px;
/* acc0 += b[numTaps] * x[n-numTaps] */
acc0 += ((q15_t) x0 * c0);
/* acc1 += b[numTaps] * x[n-numTaps-1] */
acc1 += ((q15_t) x1 * c0);
/* acc2 += b[numTaps] * x[n-numTaps-2] */
acc2 += ((q15_t) x2 * c0);
/* acc3 += b[numTaps] * x[n-numTaps-3] */
acc3 += ((q15_t) x3 * c0);
/* Read the b[numTaps-1] coefficient */
c0 = *(pb + 1u);
/* Read x[n-numTaps-4] sample */
x0 = *(px + 1u);
/* Perform the multiply-accumulates */
acc0 += ((q15_t) x1 * c0);
acc1 += ((q15_t) x2 * c0);
acc2 += ((q15_t) x3 * c0);
acc3 += ((q15_t) x0 * c0);
/* Read the b[numTaps-2] coefficient */
c0 = *(pb + 2u);
/* Read x[n-numTaps-5] sample */
x1 = *(px + 2u);
/* Perform the multiply-accumulates */
acc0 += ((q15_t) x2 * c0);
acc1 += ((q15_t) x3 * c0);
acc2 += ((q15_t) x0 * c0);
acc3 += ((q15_t) x1 * c0);
/* Read the b[numTaps-3] coefficients */
c0 = *(pb + 3u);
/* Read x[n-numTaps-6] sample */
x2 = *(px + 3u);
/* Perform the multiply-accumulates */
acc0 += ((q15_t) x3 * c0);
acc1 += ((q15_t) x0 * c0);
acc2 += ((q15_t) x1 * c0);
acc3 += ((q15_t) x2 * c0);
/* update coefficient pointer */
pb += 4u;
px += 4u;
/* Decrement the loop counter */
i--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
i = numTaps - (tapCnt * 4u);
while (i > 0u)
{
/* Read coefficients */
c0 = *(pb++);
/* Fetch 1 state variable */
x3 = *(px++);
/* Perform the multiply-accumulates */
acc0 += ((q15_t) x0 * c0);
acc1 += ((q15_t) x1 * c0);
acc2 += ((q15_t) x2 * c0);
acc3 += ((q15_t) x3 * c0);
/* Reuse the present sample states for next sample */
x0 = x1;
x1 = x2;
x2 = x3;
/* Decrement the loop counter */
i--;
}
/* Advance the state pointer by 4 to process the next group of 4 samples */
pState = pState + 4;
/* The results in the 4 accumulators are in 2.62 format. Convert to 1.31
** Then store the 4 outputs in the destination buffer. */
acc0 = __SSAT((acc0 >> 7u), 8);
*pDst++ = acc0;
acc1 = __SSAT((acc1 >> 7u), 8);
*pDst++ = acc1;
acc2 = __SSAT((acc2 >> 7u), 8);
*pDst++ = acc2;
acc3 = __SSAT((acc3 >> 7u), 8);
*pDst++ = acc3;
/* Decrement the samples loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 4u;
while (blkCnt > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
/* Set the accumulator to zero */
acc0 = 0;
/* Initialize state pointer */
px = pState;
/* Initialize Coefficient pointer */
pb = (pCoeffs);
i = numTaps;
/* Perform the multiply-accumulates */
do
{
acc0 += (q15_t) * (px++) * (*(pb++));
i--;
} while (i > 0u);
/* The result is in 2.14 format. Convert to 1.7
** Then store the output in the destination buffer. */
*pDst++ = __SSAT((acc0 >> 7u), 8);
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the samples loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
tapCnt = (numTaps - 1u) >> 2u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
/* Calculate remaining number of copies */
tapCnt = (numTaps - 1u) % 0x4u;
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#else
/* Run the below code for Cortex-M0 */
uint32_t numTaps = S->numTaps; /* Number of taps in the filter */
uint32_t i, blkCnt; /* Loop counters */
q7_t *pState = S->pState; /* State pointer */
q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q7_t *px, *pb; /* Temporary pointers to state and coeff */
q31_t acc = 0; /* Accumlator */
q7_t *pStateCurnt; /* Points to the current sample of the state */
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = S->pState + (numTaps - 1u);
/* Initialize blkCnt with blockSize */
blkCnt = blockSize;
/* Perform filtering upto BlockSize - BlockSize%4 */
while (blkCnt > 0u)
{
/* Copy one sample at a time into state buffer */
*pStateCurnt++ = *pSrc++;
/* Set accumulator to zero */
acc = 0;
/* Initialize state pointer of type q7 */
px = pState;
/* Initialize coeff pointer of type q7 */
pb = pCoeffs;
i = numTaps;
while (i > 0u)
{
/* acc = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
acc += (q15_t) * px++ * *pb++;
i--;
}
/* Store the 1.7 format filter output in destination buffer */
*pDst++ = (q7_t) __SSAT((acc >> 7), 8);
/* Advance the state pointer by 1 to process the next sample */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete.
** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
** This prepares the state buffer for the next function call. */
/* Points to the start of the state buffer */
pStateCurnt = S->pState;
/* Copy numTaps number of values */
i = (numTaps - 1u);
/* Copy q7_t data */
while (i > 0u)
{
*pStateCurnt++ = *pState++;
i--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of FIR group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_q7.c
|
C
|
apache-2.0
| 11,289
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_sparse_f32.c
* Description: Floating-point sparse FIR filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters
*
* This group of functions implements sparse FIR filters.
* Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.
* Sparse filters are used for simulating reflections in communications and audio applications.
*
* There are separate functions for Q7, Q15, Q31, and floating-point data types.
* The functions operate on blocks of input and output data and each call to the function processes
* <code>blockSize</code> samples through the filter. <code>pSrc</code> and
* <code>pDst</code> points to input and output arrays respectively containing <code>blockSize</code> values.
*
* \par Algorithm:
* The sparse filter instant structure contains an array of tap indices <code>pTapDelay</code> which specifies the locations of the non-zero coefficients.
* This is in addition to the coefficient array <code>b</code>.
* The implementation essentially skips the multiplications by zero and leads to an efficient realization.
* <pre>
* y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
* </pre>
* \par
* \image html FIRSparse.gif "Sparse FIR filter. b[n] represents the filter coefficients"
* \par
* <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>;
* <code>pTapDelay</code> points to an array of nonzero indices and is also of size <code>numTaps</code>;
* <code>pState</code> points to a state array of size <code>maxDelay + blockSize</code>, where
* <code>maxDelay</code> is the largest offset value that is ever used in the <code>pTapDelay</code> array.
* Some of the processing functions also require temporary working buffers.
*
* \par Instance Structure
* The coefficients and state variables for a filter are stored together in an instance data structure.
* A separate instance structure must be defined for each filter.
* Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.
* There are separate instance structure declarations for each of the 4 supported data types.
*
* \par Initialization Functions
* There is also an associated initialization function for each data type.
* The initialization function performs the following operations:
* - Sets the values of the internal structure fields.
* - Zeros out the values in the state buffer.
* To do this manually without calling the init function, assign the follow subfields of the instance structure:
* numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero.
*
* \par
* Use of the initialization function is optional.
* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
* To place an instance structure into a const data section, the instance structure must be manually initialized.
* Set the values in the state buffer to zeros before static initialization.
* The code below statically initializes each of the 4 different data type filter instance structures
* <pre>
*arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
*arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
*arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
*arm_fir_sparse_instance_q7 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
* </pre>
* \par
*
* \par Fixed-Point Behavior
* Care must be taken when using the fixed-point versions of the sparse FIR filter functions.
* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
* Refer to the function specific documentation below for usage guidelines.
*/
/**
* @addtogroup FIR_Sparse
* @{
*/
/**
* @brief Processing function for the floating-point sparse FIR filter.
* @param[in] *S points to an instance of the floating-point sparse FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] *pScratchIn points to a temporary buffer of size blockSize.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*/
void arm_fir_sparse_f32(
arm_fir_sparse_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
float32_t * pScratchIn,
uint32_t blockSize)
{
float32_t *pState = S->pState; /* State pointer */
float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
float32_t *px; /* Scratch buffer pointer */
float32_t *py = pState; /* Temporary pointers for state buffer */
float32_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
float32_t *pOut; /* Destination pointer */
int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
uint32_t delaySize = S->maxDelay + blockSize; /* state length */
uint16_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
int32_t readIndex; /* Read index of the state buffer */
uint32_t tapCnt, blkCnt; /* loop counters */
float32_t coeff = *pCoeffs++; /* Read the first coefficient value */
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
(int32_t *) pSrc, 1, blockSize);
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
(int32_t *) pb, (int32_t *) pb, blockSize, 1,
blockSize);
/* Working pointer for the scratch buffer */
px = pb;
/* Working pointer for destination buffer */
pOut = pDst;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 Multiplications at a time. */
blkCnt = blockSize >> 2u;
while (blkCnt > 0u)
{
/* Perform Multiplications and store in destination buffer */
*pOut++ = *px++ * coeff;
*pOut++ = *px++ * coeff;
*pOut++ = *px++ * coeff;
*pOut++ = *px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform Multiplications and store in destination buffer */
*pOut++ = *px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 2u;
while (tapCnt > 0u)
{
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
(int32_t *) pb, (int32_t *) pb, blockSize, 1,
blockSize);
/* Working pointer for the scratch buffer */
px = pb;
/* Working pointer for destination buffer */
pOut = pDst;
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 MACS at a time. */
blkCnt = blockSize >> 2u;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pOut++ += *px++ * coeff;
*pOut++ += *px++ * coeff;
*pOut++ += *px++ * coeff;
*pOut++ += *px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pOut++ += *px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = ((int32_t) S->stateIndex -
(int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Decrement the tap loop counter */
tapCnt--;
}
/* Compute last tap without the final read of pTapDelay */
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
(int32_t *) pb, (int32_t *) pb, blockSize, 1,
blockSize);
/* Working pointer for the scratch buffer */
px = pb;
/* Working pointer for destination buffer */
pOut = pDst;
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 MACS at a time. */
blkCnt = blockSize >> 2u;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pOut++ += *px++ * coeff;
*pOut++ += *px++ * coeff;
*pOut++ += *px++ * coeff;
*pOut++ += *px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pOut++ += *px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform Multiplications and store in destination buffer */
*pOut++ = *px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 2u;
while (tapCnt > 0u)
{
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
(int32_t *) pb, (int32_t *) pb, blockSize, 1,
blockSize);
/* Working pointer for the scratch buffer */
px = pb;
/* Working pointer for destination buffer */
pOut = pDst;
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pOut++ += *px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex =
((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Decrement the tap loop counter */
tapCnt--;
}
/* Compute last tap without the final read of pTapDelay */
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
(int32_t *) pb, (int32_t *) pb, blockSize, 1,
blockSize);
/* Working pointer for the scratch buffer */
px = pb;
/* Working pointer for destination buffer */
pOut = pDst;
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pOut++ += *px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of FIR_Sparse group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_sparse_f32.c
|
C
|
apache-2.0
| 14,076
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_sparse_init_f32.c
* Description: Floating-point sparse FIR filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Sparse
* @{
*/
/**
* @brief Initialization function for the floating-point sparse FIR filter.
* @param[in,out] *S points to an instance of the floating-point sparse FIR structure.
* @param[in] numTaps number of nonzero coefficients in the filter.
* @param[in] *pCoeffs points to the array of filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] *pTapDelay points to the array of offset times.
* @param[in] maxDelay maximum offset time supported.
* @param[in] blockSize number of samples that will be processed per block.
* @return none
*
* <b>Description:</b>
* \par
* <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
* <code>pState</code> holds the filter's state variables and must be of length
* <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
* is the maximum number of delay line values.
* <code>blockSize</code> is the
* number of samples processed by the <code>arm_fir_sparse_f32()</code> function.
*/
void arm_fir_sparse_init_f32(
arm_fir_sparse_instance_f32 * S,
uint16_t numTaps,
float32_t * pCoeffs,
float32_t * pState,
int32_t * pTapDelay,
uint16_t maxDelay,
uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Assign TapDelay pointer */
S->pTapDelay = pTapDelay;
/* Assign MaxDelay */
S->maxDelay = maxDelay;
/* reset the stateIndex to 0 */
S->stateIndex = 0u;
/* Clear state buffer and size is always maxDelay + blockSize */
memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of FIR_Sparse group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
|
C
|
apache-2.0
| 2,919
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_sparse_init_q15.c
* Description: Q15 sparse FIR filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Sparse
* @{
*/
/**
* @brief Initialization function for the Q15 sparse FIR filter.
* @param[in,out] *S points to an instance of the Q15 sparse FIR structure.
* @param[in] numTaps number of nonzero coefficients in the filter.
* @param[in] *pCoeffs points to the array of filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] *pTapDelay points to the array of offset times.
* @param[in] maxDelay maximum offset time supported.
* @param[in] blockSize number of samples that will be processed per block.
* @return none
*
* <b>Description:</b>
* \par
* <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
* <code>pState</code> holds the filter's state variables and must be of length
* <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
* is the maximum number of delay line values.
* <code>blockSize</code> is the
* number of words processed by <code>arm_fir_sparse_q15()</code> function.
*/
void arm_fir_sparse_init_q15(
arm_fir_sparse_instance_q15 * S,
uint16_t numTaps,
q15_t * pCoeffs,
q15_t * pState,
int32_t * pTapDelay,
uint16_t maxDelay,
uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Assign TapDelay pointer */
S->pTapDelay = pTapDelay;
/* Assign MaxDelay */
S->maxDelay = maxDelay;
/* reset the stateIndex to 0 */
S->stateIndex = 0u;
/* Clear state buffer and size is always maxDelay + blockSize */
memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of FIR_Sparse group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
|
C
|
apache-2.0
| 2,868
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_sparse_init_q31.c
* Description: Q31 sparse FIR filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Sparse
* @{
*/
/**
* @brief Initialization function for the Q31 sparse FIR filter.
* @param[in,out] *S points to an instance of the Q31 sparse FIR structure.
* @param[in] numTaps number of nonzero coefficients in the filter.
* @param[in] *pCoeffs points to the array of filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] *pTapDelay points to the array of offset times.
* @param[in] maxDelay maximum offset time supported.
* @param[in] blockSize number of samples that will be processed per block.
* @return none
*
* <b>Description:</b>
* \par
* <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
* <code>pState</code> holds the filter's state variables and must be of length
* <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
* is the maximum number of delay line values.
* <code>blockSize</code> is the number of words processed by <code>arm_fir_sparse_q31()</code> function.
*/
void arm_fir_sparse_init_q31(
arm_fir_sparse_instance_q31 * S,
uint16_t numTaps,
q31_t * pCoeffs,
q31_t * pState,
int32_t * pTapDelay,
uint16_t maxDelay,
uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Assign TapDelay pointer */
S->pTapDelay = pTapDelay;
/* Assign MaxDelay */
S->maxDelay = maxDelay;
/* reset the stateIndex to 0 */
S->stateIndex = 0u;
/* Clear state buffer and size is always maxDelay + blockSize */
memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of FIR_Sparse group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
|
C
|
apache-2.0
| 2,865
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_sparse_init_q7.c
* Description: Q7 sparse FIR filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Sparse
* @{
*/
/**
* @brief Initialization function for the Q7 sparse FIR filter.
* @param[in,out] *S points to an instance of the Q7 sparse FIR structure.
* @param[in] numTaps number of nonzero coefficients in the filter.
* @param[in] *pCoeffs points to the array of filter coefficients.
* @param[in] *pState points to the state buffer.
* @param[in] *pTapDelay points to the array of offset times.
* @param[in] maxDelay maximum offset time supported.
* @param[in] blockSize number of samples that will be processed per block.
* @return none
*
* <b>Description:</b>
* \par
* <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
* <code>pState</code> holds the filter's state variables and must be of length
* <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
* is the maximum number of delay line values.
* <code>blockSize</code> is the
* number of samples processed by the <code>arm_fir_sparse_q7()</code> function.
*/
void arm_fir_sparse_init_q7(
arm_fir_sparse_instance_q7 * S,
uint16_t numTaps,
q7_t * pCoeffs,
q7_t * pState,
int32_t * pTapDelay,
uint16_t maxDelay,
uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Assign TapDelay pointer */
S->pTapDelay = pTapDelay;
/* Assign MaxDelay */
S->maxDelay = maxDelay;
/* reset the stateIndex to 0 */
S->stateIndex = 0u;
/* Clear state buffer and size is always maxDelay + blockSize */
memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of FIR_Sparse group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
|
C
|
apache-2.0
| 2,864
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_sparse_q15.c
* Description: Q15 sparse FIR filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @addtogroup FIR_Sparse
* @{
*/
/**
* @brief Processing function for the Q15 sparse FIR filter.
* @param[in] *S points to an instance of the Q15 sparse FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] *pScratchIn points to a temporary buffer of size blockSize.
* @param[in] *pScratchOut points to a temporary buffer of size blockSize.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 32-bit accumulator.
* The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.
* Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.
* If the accumulator result overflows it will wrap around rather than saturate.
* After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.
* In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
*/
void arm_fir_sparse_q15(
arm_fir_sparse_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
q15_t * pScratchIn,
q31_t * pScratchOut,
uint32_t blockSize)
{
q15_t *pState = S->pState; /* State pointer */
q15_t *pIn = pSrc; /* Working pointer for input */
q15_t *pOut = pDst; /* Working pointer for output */
q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q15_t *px; /* Temporary pointers for scratch buffer */
q15_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
q15_t *py = pState; /* Temporary pointers for state buffer */
int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
uint32_t delaySize = S->maxDelay + blockSize; /* state length */
uint16_t numTaps = S->numTaps; /* Filter order */
int32_t readIndex; /* Read index of the state buffer */
uint32_t tapCnt, blkCnt; /* loop counters */
q15_t coeff = *pCoeffs++; /* Read the first coefficient value */
q31_t *pScr2 = pScratchOut; /* Working pointer for pScratchOut */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2; /* Temporary variables */
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
/* Loop over the number of taps. */
tapCnt = numTaps;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q15(py, delaySize, &readIndex, 1,
pb, pb, blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 multiplications at a time. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
/* Perform multiplication and store in the scratch buffer */
*pScratchOut++ = ((q31_t) * px++ * coeff);
*pScratchOut++ = ((q31_t) * px++ * coeff);
*pScratchOut++ = ((q31_t) * px++ * coeff);
*pScratchOut++ = ((q31_t) * px++ * coeff);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform multiplication and store in the scratch buffer */
*pScratchOut++ = ((q31_t) * px++ * coeff);
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 2u;
while (tapCnt > 0u)
{
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q15(py, delaySize, &readIndex, 1,
pb, pb, blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 MACS at a time. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pScratchOut++ += (q31_t) * px++ * coeff;
*pScratchOut++ += (q31_t) * px++ * coeff;
*pScratchOut++ += (q31_t) * px++ * coeff;
*pScratchOut++ += (q31_t) * px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pScratchOut++ += (q31_t) * px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Decrement the tap loop counter */
tapCnt--;
}
/* Compute last tap without the final read of pTapDelay */
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q15(py, delaySize, &readIndex, 1,
pb, pb, blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 MACS at a time. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pScratchOut++ += (q31_t) * px++ * coeff;
*pScratchOut++ += (q31_t) * px++ * coeff;
*pScratchOut++ += (q31_t) * px++ * coeff;
*pScratchOut++ += (q31_t) * px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pScratchOut++ += (q31_t) * px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* All the output values are in pScratchOut buffer.
Convert them into 1.15 format, saturate and store in the destination buffer. */
/* Loop over the blockSize. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
in1 = *pScr2++;
in2 = *pScr2++;
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pOut)++ =
__PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
16);
#else
*__SIMD32(pOut)++ =
__PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
in1 = *pScr2++;
in2 = *pScr2++;
#ifndef ARM_MATH_BIG_ENDIAN
*__SIMD32(pOut)++ =
__PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
16);
#else
*__SIMD32(pOut)++ =
__PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
remaining samples are processed in the below loop */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
*pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
/* Loop over the number of taps. */
tapCnt = numTaps;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q15(py, delaySize, &readIndex, 1,
pb, pb, blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform multiplication and store in the scratch buffer */
*pScratchOut++ = ((q31_t) * px++ * coeff);
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 2u;
while (tapCnt > 0u)
{
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q15(py, delaySize, &readIndex, 1,
pb, pb, blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pScratchOut++ += (q31_t) * px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Decrement the tap loop counter */
tapCnt--;
}
/* Compute last tap without the final read of pTapDelay */
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q15(py, delaySize, &readIndex, 1,
pb, pb, blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
*pScratchOut++ += (q31_t) * px++ * coeff;
/* Decrement the loop counter */
blkCnt--;
}
/* All the output values are in pScratchOut buffer.
Convert them into 1.15 format, saturate and store in the destination buffer. */
/* Loop over the blockSize. */
blkCnt = blockSize;
while (blkCnt > 0u)
{
*pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
blkCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of FIR_Sparse group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_sparse_q15.c
|
C
|
apache-2.0
| 13,612
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_sparse_q31.c
* Description: Q31 sparse FIR filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @addtogroup FIR_Sparse
* @{
*/
/**
* @brief Processing function for the Q31 sparse FIR filter.
* @param[in] *S points to an instance of the Q31 sparse FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] *pScratchIn points to a temporary buffer of size blockSize.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 32-bit accumulator.
* The 1.31 x 1.31 multiplications are truncated to 2.30 format.
* This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.
* If the accumulator result overflows, it wraps around rather than saturate.
* In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
*/
void arm_fir_sparse_q31(
arm_fir_sparse_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
q31_t * pScratchIn,
uint32_t blockSize)
{
q31_t *pState = S->pState; /* State pointer */
q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q31_t *px; /* Scratch buffer pointer */
q31_t *py = pState; /* Temporary pointers for state buffer */
q31_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
q31_t *pOut; /* Destination pointer */
q63_t out; /* Temporary output variable */
int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
uint32_t delaySize = S->maxDelay + blockSize; /* state length */
uint16_t numTaps = S->numTaps; /* Filter order */
int32_t readIndex; /* Read index of the state buffer */
uint32_t tapCnt, blkCnt; /* loop counters */
q31_t coeff = *pCoeffs++; /* Read the first coefficient value */
q31_t in;
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
(int32_t *) pSrc, 1, blockSize);
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
(int32_t *) pb, (int32_t *) pb, blockSize, 1,
blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pOut = pDst;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 Multiplications at a time. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
/* Perform Multiplications and store in the destination buffer */
*pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
*pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
*pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
*pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform Multiplications and store in the destination buffer */
*pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 2u;
while (tapCnt > 0u)
{
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
(int32_t *) pb, (int32_t *) pb, blockSize, 1,
blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pOut = pDst;
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 MACS at a time. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Decrement the tap loop counter */
tapCnt--;
}
/* Compute last tap without the final read of pTapDelay */
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
(int32_t *) pb, (int32_t *) pb, blockSize, 1,
blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pOut = pDst;
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 MACS at a time. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
/* Decrement the loop counter */
blkCnt--;
}
/* Working output pointer is updated */
pOut = pDst;
/* Output is converted into 1.31 format. */
/* Loop over the blockSize. Unroll by a factor of 4.
* process 4 output samples at a time. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
in = *pOut << 1;
*pOut++ = in;
in = *pOut << 1;
*pOut++ = in;
in = *pOut << 1;
*pOut++ = in;
in = *pOut << 1;
*pOut++ = in;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* process the remaining output samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
in = *pOut << 1;
*pOut++ = in;
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform Multiplications and store in the destination buffer */
*pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 2u;
while (tapCnt > 0u)
{
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
(int32_t *) pb, (int32_t *) pb, blockSize, 1,
blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pOut = pDst;
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Decrement the tap loop counter */
tapCnt--;
}
/* Compute last tap without the final read of pTapDelay */
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
(int32_t *) pb, (int32_t *) pb, blockSize, 1,
blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pOut = pDst;
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
out = *pOut;
out += ((q63_t) * px++ * coeff) >> 32;
*pOut++ = (q31_t) (out);
/* Decrement the loop counter */
blkCnt--;
}
/* Working output pointer is updated */
pOut = pDst;
/* Output is converted into 1.31 format. */
blkCnt = blockSize;
while (blkCnt > 0u)
{
in = *pOut << 1;
*pOut++ = in;
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of FIR_Sparse group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_sparse_q31.c
|
C
|
apache-2.0
| 12,484
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fir_sparse_q7.c
* Description: Q7 sparse FIR filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup FIR_Sparse
* @{
*/
/**
* @brief Processing function for the Q7 sparse FIR filter.
* @param[in] *S points to an instance of the Q7 sparse FIR structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data
* @param[in] *pScratchIn points to a temporary buffer of size blockSize.
* @param[in] *pScratchOut points to a temporary buffer of size blockSize.
* @param[in] blockSize number of input samples to process per call.
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using a 32-bit internal accumulator.
* Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
* The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
* There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
* The accumulator is then converted to 18.7 format by discarding the low 7 bits.
* Finally, the result is truncated to 1.7 format.
*/
void arm_fir_sparse_q7(
arm_fir_sparse_instance_q7 * S,
q7_t * pSrc,
q7_t * pDst,
q7_t * pScratchIn,
q31_t * pScratchOut,
uint32_t blockSize)
{
q7_t *pState = S->pState; /* State pointer */
q7_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q7_t *px; /* Scratch buffer pointer */
q7_t *py = pState; /* Temporary pointers for state buffer */
q7_t *pb = pScratchIn; /* Temporary pointers for scratch buffer */
q7_t *pOut = pDst; /* Destination pointer */
int32_t *pTapDelay = S->pTapDelay; /* Pointer to the array containing offset of the non-zero tap values. */
uint32_t delaySize = S->maxDelay + blockSize; /* state length */
uint16_t numTaps = S->numTaps; /* Filter order */
int32_t readIndex; /* Read index of the state buffer */
uint32_t tapCnt, blkCnt; /* loop counters */
q7_t coeff = *pCoeffs++; /* Read the coefficient value */
q31_t *pScr2 = pScratchOut; /* Working pointer for scratch buffer of output values */
q31_t in;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t in1, in2, in3, in4;
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
blockSize);
/* Loop over the number of taps. */
tapCnt = numTaps;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
(int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 multiplications at a time. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
/* Perform multiplication and store in the scratch buffer */
*pScratchOut++ = ((q31_t) * px++ * coeff);
*pScratchOut++ = ((q31_t) * px++ * coeff);
*pScratchOut++ = ((q31_t) * px++ * coeff);
*pScratchOut++ = ((q31_t) * px++ * coeff);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform multiplication and store in the scratch buffer */
*pScratchOut++ = ((q31_t) * px++ * coeff);
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 2u;
while (tapCnt > 0u)
{
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
(int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 MACS at a time. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = ((int32_t) S->stateIndex -
(int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Decrement the tap loop counter */
tapCnt--;
}
/* Compute last tap without the final read of pTapDelay */
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
(int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
/* Loop over the blockSize. Unroll by a factor of 4.
* Compute 4 MACS at a time. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
* compute the remaining samples */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
/* Decrement the loop counter */
blkCnt--;
}
/* All the output values are in pScratchOut buffer.
Convert them into 1.15 format, saturate and store in the destination buffer. */
/* Loop over the blockSize. */
blkCnt = blockSize >> 2;
while (blkCnt > 0u)
{
in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
*__SIMD32(pOut)++ = __PACKq7(in1, in2, in3, in4);
/* Decrement the blockSize loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4,
remaining samples are processed in the below loop */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
*pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
/* Decrement the blockSize loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* BlockSize of Input samples are copied into the state buffer */
/* StateIndex points to the starting position to write in the state buffer */
arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
blockSize);
/* Loop over the number of taps. */
tapCnt = numTaps;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
(int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
/* Loop over the blockSize */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform multiplication and store in the scratch buffer */
*pScratchOut++ = ((q31_t) * px++ * coeff);
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Loop over the number of taps. */
tapCnt = (uint32_t) numTaps - 2u;
while (tapCnt > 0u)
{
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
(int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
/* Loop over the blockSize */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
/* Decrement the loop counter */
blkCnt--;
}
/* Load the coefficient value and
* increment the coefficient buffer for the next set of state values */
coeff = *pCoeffs++;
/* Read Index, from where the state buffer should be read, is calculated. */
readIndex =
((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
/* Wraparound of readIndex */
if (readIndex < 0)
{
readIndex += (int32_t) delaySize;
}
/* Decrement the tap loop counter */
tapCnt--;
}
/* Compute last tap without the final read of pTapDelay */
/* Working pointer for state buffer is updated */
py = pState;
/* blockSize samples are read from the state buffer */
arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
(int32_t) blockSize, 1, blockSize);
/* Working pointer for the scratch buffer of state values */
px = pb;
/* Working pointer for scratch buffer of output values */
pScratchOut = pScr2;
/* Loop over the blockSize */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Perform Multiply-Accumulate */
in = *pScratchOut + ((q31_t) * px++ * coeff);
*pScratchOut++ = in;
/* Decrement the loop counter */
blkCnt--;
}
/* All the output values are in pScratchOut buffer.
Convert them into 1.15 format, saturate and store in the destination buffer. */
/* Loop over the blockSize. */
blkCnt = blockSize;
while (blkCnt > 0u)
{
*pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
/* Decrement the blockSize loop counter */
blkCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of FIR_Sparse group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_fir_sparse_q7.c
|
C
|
apache-2.0
| 13,822
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_iir_lattice_f32.c
* Description: Floating-point IIR Lattice filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters
*
* This set of functions implements lattice filters
* for Q15, Q31 and floating-point data types. Lattice filters are used in a
* variety of adaptive filter applications. The filter structure has feedforward and
* feedback components and the net impulse response is infinite length.
* The functions operate on blocks
* of input and output data and each call to the function processes
* <code>blockSize</code> samples through the filter. <code>pSrc</code> and
* <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
* \par Algorithm:
* \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"
* <pre>
* fN(n) = x(n)
* fm-1(n) = fm(n) - km * gm-1(n-1) for m = N, N-1, ...1
* gm(n) = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1
* y(n) = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
* </pre>
* \par
* <code>pkCoeffs</code> points to array of reflection coefficients of size <code>numStages</code>.
* Reflection coefficients are stored in time-reversed order.
* \par
* <pre>
* {kN, kN-1, ....k1}
* </pre>
* <code>pvCoeffs</code> points to the array of ladder coefficients of size <code>(numStages+1)</code>.
* Ladder coefficients are stored in time-reversed order.
* \par
* <pre>
* {vN, vN-1, ...v0}
* </pre>
* <code>pState</code> points to a state array of size <code>numStages + blockSize</code>.
* The state variables shown in the figure above (the g values) are stored in the <code>pState</code> array.
* The state variables are updated after each block of data is processed; the coefficients are untouched.
* \par Instance Structure
* The coefficients and state variables for a filter are stored together in an instance data structure.
* A separate instance structure must be defined for each filter.
* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
* There are separate instance structure declarations for each of the 3 supported data types.
*
* \par Initialization Functions
* There is also an associated initialization function for each data type.
* The initialization function performs the following operations:
* - Sets the values of the internal structure fields.
* - Zeros out the values in the state buffer.
* To do this manually without calling the init function, assign the follow subfields of the instance structure:
* numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.
*
* \par
* Use of the initialization function is optional.
* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
* To place an instance structure into a const data section, the instance structure must be manually initialized.
* Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
* <pre>
*arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
*arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
*arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
* </pre>
* \par
* where <code>numStages</code> is the number of stages in the filter; <code>pState</code> points to the state buffer array;
* <code>pkCoeffs</code> points to array of the reflection coefficients; <code>pvCoeffs</code> points to the array of ladder coefficients.
* \par Fixed-Point Behavior
* Care must be taken when using the fixed-point versions of the IIR lattice filter functions.
* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
* Refer to the function specific documentation below for usage guidelines.
*/
/**
* @addtogroup IIR_Lattice
* @{
*/
/**
* @brief Processing function for the floating-point IIR lattice filter.
* @param[in] *S points to an instance of the floating-point IIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
void arm_iir_lattice_f32(
const arm_iir_lattice_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize)
{
float32_t fnext1, gcurr1, gnext; /* Temporary variables for lattice stages */
float32_t acc; /* Accumlator */
uint32_t blkCnt, tapCnt; /* temporary variables for counts */
float32_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
uint32_t numStages = S->numStages; /* number of stages */
float32_t *pState; /* State pointer */
float32_t *pStateCurnt; /* State current pointer */
float32_t k1, k2;
float32_t v1, v2, v3, v4;
float32_t gcurr2;
float32_t fnext2;
/* initialise loop count */
blkCnt = blockSize;
/* initialise state pointer */
pState = &S->pState[0];
/* Sample processing */
while (blkCnt > 0u)
{
/* Read Sample from input buffer */
/* fN(n) = x(n) */
fnext2 = *pSrc++;
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
/* Initialize state read pointer */
px1 = pState;
/* Initialize state write pointer */
px2 = pState;
/* Set accumulator to zero */
acc = 0.0;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = (numStages) >> 2;
while (tapCnt > 0u)
{
/* Read gN-1(n-1) from state buffer */
gcurr1 = *px1;
/* read reflection coefficient kN */
k1 = *pk;
/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
fnext1 = fnext2 - (k1 * gcurr1);
/* read ladder coefficient vN */
v1 = *pv;
/* read next reflection coefficient kN-1 */
k2 = *(pk + 1u);
/* Read gN-2(n-1) from state buffer */
gcurr2 = *(px1 + 1u);
/* read next ladder coefficient vN-1 */
v2 = *(pv + 1u);
/* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
fnext2 = fnext1 - (k2 * gcurr2);
/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
gnext = gcurr1 + (k1 * fnext1);
/* read reflection coefficient kN-2 */
k1 = *(pk + 2u);
/* write gN(n) into state for next sample processing */
*px2++ = gnext;
/* Read gN-3(n-1) from state buffer */
gcurr1 = *(px1 + 2u);
/* y(n) += gN(n) * vN */
acc += (gnext * v1);
/* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
fnext1 = fnext2 - (k1 * gcurr1);
/* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
gnext = gcurr2 + (k2 * fnext2);
/* Read gN-4(n-1) from state buffer */
gcurr2 = *(px1 + 3u);
/* y(n) += gN-1(n) * vN-1 */
acc += (gnext * v2);
/* read reflection coefficient kN-3 */
k2 = *(pk + 3u);
/* write gN-1(n) into state for next sample processing */
*px2++ = gnext;
/* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
fnext2 = fnext1 - (k2 * gcurr2);
/* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
gnext = gcurr1 + (k1 * fnext1);
/* read ladder coefficient vN-2 */
v3 = *(pv + 2u);
/* y(n) += gN-2(n) * vN-2 */
acc += (gnext * v3);
/* write gN-2(n) into state for next sample processing */
*px2++ = gnext;
/* update pointer */
pk += 4u;
/* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
gnext = (fnext2 * k2) + gcurr2;
/* read next ladder coefficient vN-3 */
v4 = *(pv + 3u);
/* y(n) += gN-4(n) * vN-4 */
acc += (gnext * v4);
/* write gN-3(n) into state for next sample processing */
*px2++ = gnext;
/* update pointers */
px1 += 4u;
pv += 4u;
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = (numStages) % 0x4u;
while (tapCnt > 0u)
{
gcurr1 = *px1++;
/* Process sample for last taps */
fnext1 = fnext2 - ((*pk) * gcurr1);
gnext = (fnext1 * (*pk++)) + gcurr1;
/* Output samples for last taps */
acc += (gnext * (*pv++));
*px2++ = gnext;
fnext2 = fnext1;
tapCnt--;
}
/* y(n) += g0(n) * v0 */
acc += (fnext2 * (*pv));
*px2++ = fnext2;
/* write out into pDst */
*pDst++ = acc;
/* Advance the state pointer by 4 to process the next group of 4 samples */
pState = pState + 1u;
blkCnt--;
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
/* Points to the start of the state buffer */
pStateCurnt = &S->pState[0];
pState = &S->pState[blockSize];
tapCnt = numStages >> 2u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
/* Calculate remaining number of copies */
tapCnt = (numStages) % 0x4u;
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
}
#else
void arm_iir_lattice_f32(
const arm_iir_lattice_instance_f32 * S,
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize)
{
float32_t fcurr, fnext = 0, gcurr, gnext; /* Temporary variables for lattice stages */
float32_t acc; /* Accumlator */
uint32_t blkCnt, tapCnt; /* temporary variables for counts */
float32_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
uint32_t numStages = S->numStages; /* number of stages */
float32_t *pState; /* State pointer */
float32_t *pStateCurnt; /* State current pointer */
/* Run the below code for Cortex-M0 */
blkCnt = blockSize;
pState = &S->pState[0];
/* Sample processing */
while (blkCnt > 0u)
{
/* Read Sample from input buffer */
/* fN(n) = x(n) */
fcurr = *pSrc++;
/* Initialize state read pointer */
px1 = pState;
/* Initialize state write pointer */
px2 = pState;
/* Set accumulator to zero */
acc = 0.0f;
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
/* Process sample for numStages */
tapCnt = numStages;
while (tapCnt > 0u)
{
gcurr = *px1++;
/* Process sample for last taps */
fnext = fcurr - ((*pk) * gcurr);
gnext = (fnext * (*pk++)) + gcurr;
/* Output samples for last taps */
acc += (gnext * (*pv++));
*px2++ = gnext;
fcurr = fnext;
/* Decrementing loop counter */
tapCnt--;
}
/* y(n) += g0(n) * v0 */
acc += (fnext * (*pv));
*px2++ = fnext;
/* write out into pDst */
*pDst++ = acc;
/* Advance the state pointer by 1 to process the next group of samples */
pState = pState + 1u;
blkCnt--;
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
/* Points to the start of the state buffer */
pStateCurnt = &S->pState[0];
pState = &S->pState[blockSize];
tapCnt = numStages;
/* Copy the data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
}
#endif /* #if defined (ARM_MATH_DSP) */
/**
* @} end of IIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_iir_lattice_f32.c
|
C
|
apache-2.0
| 12,990
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_iir_lattice_init_f32.c
* Description: Floating-point IIR lattice filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup IIR_Lattice
* @{
*/
/**
* @brief Initialization function for the floating-point IIR lattice filter.
* @param[in] *S points to an instance of the floating-point IIR lattice structure.
* @param[in] numStages number of stages in the filter.
* @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
* @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
* @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_iir_lattice_init_f32(
arm_iir_lattice_instance_f32 * S,
uint16_t numStages,
float32_t * pkCoeffs,
float32_t * pvCoeffs,
float32_t * pState,
uint32_t blockSize)
{
/* Assign filter taps */
S->numStages = numStages;
/* Assign reflection coefficient pointer */
S->pkCoeffs = pkCoeffs;
/* Assign ladder coefficient pointer */
S->pvCoeffs = pvCoeffs;
/* Clear state buffer and size is always blockSize + numStages */
memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of IIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
|
C
|
apache-2.0
| 2,390
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_iir_lattice_init_q15.c
* Description: Q15 IIR lattice filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup IIR_Lattice
* @{
*/
/**
* @brief Initialization function for the Q15 IIR lattice filter.
* @param[in] *S points to an instance of the Q15 IIR lattice structure.
* @param[in] numStages number of stages in the filter.
* @param[in] *pkCoeffs points to reflection coefficient buffer. The array is of length numStages.
* @param[in] *pvCoeffs points to ladder coefficient buffer. The array is of length numStages+1.
* @param[in] *pState points to state buffer. The array is of length numStages+blockSize.
* @param[in] blockSize number of samples to process per call.
* @return none.
*/
void arm_iir_lattice_init_q15(
arm_iir_lattice_instance_q15 * S,
uint16_t numStages,
q15_t * pkCoeffs,
q15_t * pvCoeffs,
q15_t * pState,
uint32_t blockSize)
{
/* Assign filter taps */
S->numStages = numStages;
/* Assign reflection coefficient pointer */
S->pkCoeffs = pkCoeffs;
/* Assign ladder coefficient pointer */
S->pvCoeffs = pvCoeffs;
/* Clear state buffer and size is always blockSize + numStages */
memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of IIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
|
C
|
apache-2.0
| 2,353
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_iir_lattice_init_q31.c
* Description: Initialization function for the Q31 IIR lattice filter
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup IIR_Lattice
* @{
*/
/**
* @brief Initialization function for the Q31 IIR lattice filter.
* @param[in] *S points to an instance of the Q31 IIR lattice structure.
* @param[in] numStages number of stages in the filter.
* @param[in] *pkCoeffs points to the reflection coefficient buffer. The array is of length numStages.
* @param[in] *pvCoeffs points to the ladder coefficient buffer. The array is of length numStages+1.
* @param[in] *pState points to the state buffer. The array is of length numStages+blockSize.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_iir_lattice_init_q31(
arm_iir_lattice_instance_q31 * S,
uint16_t numStages,
q31_t * pkCoeffs,
q31_t * pvCoeffs,
q31_t * pState,
uint32_t blockSize)
{
/* Assign filter taps */
S->numStages = numStages;
/* Assign reflection coefficient pointer */
S->pkCoeffs = pkCoeffs;
/* Assign ladder coefficient pointer */
S->pvCoeffs = pvCoeffs;
/* Clear state buffer and size is always blockSize + numStages */
memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
/* Assign state pointer */
S->pState = pState;
}
/**
* @} end of IIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
|
C
|
apache-2.0
| 2,363
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_iir_lattice_q15.c
* Description: Q15 IIR lattice filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup IIR_Lattice
* @{
*/
/**
* @brief Processing function for the Q15 IIR lattice filter.
* @param[in] *S points to an instance of the Q15 IIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using a 64-bit internal accumulator.
* Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
* The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
* There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
* After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
* Lastly, the accumulator is saturated to yield a result in 1.15 format.
*/
void arm_iir_lattice_q15(
const arm_iir_lattice_instance_q15 * S,
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t fcurr, fnext, gcurr = 0, gnext; /* Temporary variables for lattice stages */
q15_t gnext1, gnext2; /* Temporary variables for lattice stages */
uint32_t stgCnt; /* Temporary variables for counts */
q63_t acc; /* Accumlator */
uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
q15_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
uint32_t numStages = S->numStages; /* number of stages */
q15_t *pState; /* State pointer */
q15_t *pStateCurnt; /* State current pointer */
q15_t out; /* Temporary variable for output */
q31_t v; /* Temporary variable for ladder coefficient */
#ifdef UNALIGNED_SUPPORT_DISABLE
q15_t v1, v2;
#endif
blkCnt = blockSize;
pState = &S->pState[0];
/* Sample processing */
while (blkCnt > 0u)
{
/* Read Sample from input buffer */
/* fN(n) = x(n) */
fcurr = *pSrc++;
/* Initialize state read pointer */
px1 = pState;
/* Initialize state write pointer */
px2 = pState;
/* Set accumulator to zero */
acc = 0;
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
/* Process sample for first tap */
gcurr = *px1++;
/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
fnext = __SSAT(fnext, 16);
/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
gnext = __SSAT(gnext, 16);
/* write gN(n) into state for next sample processing */
*px2++ = (q15_t) gnext;
/* y(n) += gN(n) * vN */
acc += (q31_t) ((gnext * (*pv++)));
/* Update f values for next coefficient processing */
fcurr = fnext;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = (numStages - 1u) >> 2;
while (tapCnt > 0u)
{
/* Process sample for 2nd, 6th ...taps */
/* Read gN-2(n-1) from state buffer */
gcurr = *px1++;
/* Process sample for 2nd, 6th .. taps */
/* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
fnext = __SSAT(fnext, 16);
/* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
gnext1 = (q15_t) __SSAT(gnext, 16);
/* write gN-1(n) into state */
*px2++ = (q15_t) gnext1;
/* Process sample for 3nd, 7th ...taps */
/* Read gN-3(n-1) from state */
gcurr = *px1++;
/* Process sample for 3rd, 7th .. taps */
/* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
fcurr = __SSAT(fcurr, 16);
/* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
gnext2 = (q15_t) __SSAT(gnext, 16);
/* write gN-2(n) into state */
*px2++ = (q15_t) gnext2;
/* Read vN-1 and vN-2 at a time */
#ifndef UNALIGNED_SUPPORT_DISABLE
v = *__SIMD32(pv)++;
#else
v1 = *pv++;
v2 = *pv++;
#ifndef ARM_MATH_BIG_ENDIAN
v = __PKHBT(v1, v2, 16);
#else
v = __PKHBT(v2, v1, 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Pack gN-1(n) and gN-2(n) */
#ifndef ARM_MATH_BIG_ENDIAN
gnext = __PKHBT(gnext1, gnext2, 16);
#else
gnext = __PKHBT(gnext2, gnext1, 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* y(n) += gN-1(n) * vN-1 */
/* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
/* y(n) += gN-2(n) * vN-2 */
/* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
acc = __SMLALD(gnext, v, acc);
/* Process sample for 4th, 8th ...taps */
/* Read gN-4(n-1) from state */
gcurr = *px1++;
/* Process sample for 4th, 8th .. taps */
/* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
fnext = __SSAT(fnext, 16);
/* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */
gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
gnext1 = (q15_t) __SSAT(gnext, 16);
/* write gN-3(n) for the next sample process */
*px2++ = (q15_t) gnext1;
/* Process sample for 5th, 9th ...taps */
/* Read gN-5(n-1) from state */
gcurr = *px1++;
/* Process sample for 5th, 9th .. taps */
/* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
fcurr = __SSAT(fcurr, 16);
/* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
gnext2 = (q15_t) __SSAT(gnext, 16);
/* write gN-4(n) for the next sample process */
*px2++ = (q15_t) gnext2;
/* Read vN-3 and vN-4 at a time */
#ifndef UNALIGNED_SUPPORT_DISABLE
v = *__SIMD32(pv)++;
#else
v1 = *pv++;
v2 = *pv++;
#ifndef ARM_MATH_BIG_ENDIAN
v = __PKHBT(v1, v2, 16);
#else
v = __PKHBT(v2, v1, 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Pack gN-3(n) and gN-4(n) */
#ifndef ARM_MATH_BIG_ENDIAN
gnext = __PKHBT(gnext1, gnext2, 16);
#else
gnext = __PKHBT(gnext2, gnext1, 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* y(n) += gN-4(n) * vN-4 */
/* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
/* y(n) += gN-3(n) * vN-3 */
/* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
acc = __SMLALD(gnext, v, acc);
tapCnt--;
}
fnext = fcurr;
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = (numStages - 1u) % 0x4u;
while (tapCnt > 0u)
{
gcurr = *px1++;
/* Process sample for last taps */
fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
fnext = __SSAT(fnext, 16);
gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
gnext = __SSAT(gnext, 16);
/* Output samples for last taps */
acc += (q31_t) (((q31_t) gnext * (*pv++)));
*px2++ = (q15_t) gnext;
fcurr = fnext;
tapCnt--;
}
/* y(n) += g0(n) * v0 */
acc += (q31_t) (((q31_t) fnext * (*pv++)));
out = (q15_t) __SSAT(acc >> 15, 16);
*px2++ = (q15_t) fnext;
/* write out into pDst */
*pDst++ = out;
/* Advance the state pointer by 4 to process the next group of 4 samples */
pState = pState + 1u;
blkCnt--;
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
/* Points to the start of the state buffer */
pStateCurnt = &S->pState[0];
pState = &S->pState[blockSize];
stgCnt = (numStages >> 2u);
/* copy data */
while (stgCnt > 0u)
{
#ifndef UNALIGNED_SUPPORT_DISABLE
*__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
*__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
#else
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Decrement the loop counter */
stgCnt--;
}
/* Calculation of count for remaining q15_t data */
stgCnt = (numStages) % 0x4u;
/* copy data */
while (stgCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
stgCnt--;
}
#else
/* Run the below code for Cortex-M0 */
q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */
uint32_t stgCnt; /* Temporary variables for counts */
q63_t acc; /* Accumlator */
uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
q15_t *px1, *px2, *pk, *pv; /* temporary pointers for state and coef */
uint32_t numStages = S->numStages; /* number of stages */
q15_t *pState; /* State pointer */
q15_t *pStateCurnt; /* State current pointer */
q15_t out; /* Temporary variable for output */
blkCnt = blockSize;
pState = &S->pState[0];
/* Sample processing */
while (blkCnt > 0u)
{
/* Read Sample from input buffer */
/* fN(n) = x(n) */
fcurr = *pSrc++;
/* Initialize state read pointer */
px1 = pState;
/* Initialize state write pointer */
px2 = pState;
/* Set accumulator to zero */
acc = 0;
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
tapCnt = numStages;
while (tapCnt > 0u)
{
gcurr = *px1++;
/* Process sample */
/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
fnext = fcurr - ((gcurr * (*pk)) >> 15);
fnext = __SSAT(fnext, 16);
/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
gnext = ((fnext * (*pk++)) >> 15) + gcurr;
gnext = __SSAT(gnext, 16);
/* Output samples */
/* y(n) += gN(n) * vN */
acc += (q31_t) ((gnext * (*pv++)));
/* write gN(n) into state for next sample processing */
*px2++ = (q15_t) gnext;
/* Update f values for next coefficient processing */
fcurr = fnext;
tapCnt--;
}
/* y(n) += g0(n) * v0 */
acc += (q31_t) ((fnext * (*pv++)));
out = (q15_t) __SSAT(acc >> 15, 16);
*px2++ = (q15_t) fnext;
/* write out into pDst */
*pDst++ = out;
/* Advance the state pointer by 1 to process the next group of samples */
pState = pState + 1u;
blkCnt--;
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
/* Points to the start of the state buffer */
pStateCurnt = &S->pState[0];
pState = &S->pState[blockSize];
stgCnt = numStages;
/* copy data */
while (stgCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
stgCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of IIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_iir_lattice_q15.c
|
C
|
apache-2.0
| 12,714
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_iir_lattice_q31.c
* Description: Q31 IIR lattice filter processing function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup IIR_Lattice
* @{
*/
/**
* @brief Processing function for the Q31 IIR lattice filter.
* @param[in] *S points to an instance of the Q31 IIR lattice structure.
* @param[in] *pSrc points to the block of input data.
* @param[out] *pDst points to the block of output data.
* @param[in] blockSize number of samples to process.
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 64-bit accumulator.
* The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
* Thus, if the accumulator result overflows it wraps around rather than clip.
* In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.
* After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
*/
void arm_iir_lattice_q31(
const arm_iir_lattice_instance_q31 * S,
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize)
{
q31_t fcurr, fnext = 0, gcurr = 0, gnext; /* Temporary variables for lattice stages */
q63_t acc; /* Accumlator */
uint32_t blkCnt, tapCnt; /* Temporary variables for counts */
q31_t *px1, *px2, *pk, *pv; /* Temporary pointers for state and coef */
uint32_t numStages = S->numStages; /* number of stages */
q31_t *pState; /* State pointer */
q31_t *pStateCurnt; /* State current pointer */
blkCnt = blockSize;
pState = &S->pState[0];
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Sample processing */
while (blkCnt > 0u)
{
/* Read Sample from input buffer */
/* fN(n) = x(n) */
fcurr = *pSrc++;
/* Initialize state read pointer */
px1 = pState;
/* Initialize state write pointer */
px2 = pState;
/* Set accumulator to zero */
acc = 0;
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
/* Process sample for first tap */
gcurr = *px1++;
/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
/* write gN-1(n-1) into state for next sample processing */
*px2++ = gnext;
/* y(n) += gN(n) * vN */
acc += ((q63_t) gnext * *pv++);
/* Update f values for next coefficient processing */
fcurr = fnext;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = (numStages - 1u) >> 2;
while (tapCnt > 0u)
{
/* Process sample for 2nd, 6th .. taps */
/* Read gN-2(n-1) from state buffer */
gcurr = *px1++;
/* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
/* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
/* y(n) += gN-1(n) * vN-1 */
/* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
acc += ((q63_t) gnext * *pv++);
/* write gN-1(n) into state for next sample processing */
*px2++ = gnext;
/* Process sample for 3nd, 7th ...taps */
/* Read gN-3(n-1) from state buffer */
gcurr = *px1++;
/* Process sample for 3rd, 7th .. taps */
/* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
/* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
/* y(n) += gN-2(n) * vN-2 */
/* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
acc += ((q63_t) gnext * *pv++);
/* write gN-2(n) into state for next sample processing */
*px2++ = gnext;
/* Process sample for 4th, 8th ...taps */
/* Read gN-4(n-1) from state buffer */
gcurr = *px1++;
/* Process sample for 4th, 8th .. taps */
/* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
/* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
/* y(n) += gN-3(n) * vN-3 */
/* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
acc += ((q63_t) gnext * *pv++);
/* write gN-3(n) into state for next sample processing */
*px2++ = gnext;
/* Process sample for 5th, 9th ...taps */
/* Read gN-5(n-1) from state buffer */
gcurr = *px1++;
/* Process sample for 5th, 9th .. taps */
/* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
/* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
/* y(n) += gN-4(n) * vN-4 */
/* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
acc += ((q63_t) gnext * *pv++);
/* write gN-4(n) into state for next sample processing */
*px2++ = gnext;
tapCnt--;
}
fnext = fcurr;
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = (numStages - 1u) % 0x4u;
while (tapCnt > 0u)
{
gcurr = *px1++;
/* Process sample for last taps */
fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
/* Output samples for last taps */
acc += ((q63_t) gnext * *pv++);
*px2++ = gnext;
fcurr = fnext;
tapCnt--;
}
/* y(n) += g0(n) * v0 */
acc += (q63_t) fnext *(
*pv++);
*px2++ = fnext;
/* write out into pDst */
*pDst++ = (q31_t) (acc >> 31u);
/* Advance the state pointer by 4 to process the next group of 4 samples */
pState = pState + 1u;
blkCnt--;
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
/* Points to the start of the state buffer */
pStateCurnt = &S->pState[0];
pState = &S->pState[blockSize];
tapCnt = numStages >> 2u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
/* Calculate remaining number of copies */
tapCnt = (numStages) % 0x4u;
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
};
#else
/* Run the below code for Cortex-M0 */
/* Sample processing */
while (blkCnt > 0u)
{
/* Read Sample from input buffer */
/* fN(n) = x(n) */
fcurr = *pSrc++;
/* Initialize state read pointer */
px1 = pState;
/* Initialize state write pointer */
px2 = pState;
/* Set accumulator to zero */
acc = 0;
/* Initialize Ladder coeff pointer */
pv = &S->pvCoeffs[0];
/* Initialize Reflection coeff pointer */
pk = &S->pkCoeffs[0];
tapCnt = numStages;
while (tapCnt > 0u)
{
gcurr = *px1++;
/* Process sample */
/* fN-1(n) = fN(n) - kN * gN-1(n-1) */
fnext =
clip_q63_to_q31(((q63_t) fcurr -
((q31_t) (((q63_t) gcurr * (*pk)) >> 31))));
/* gN(n) = kN * fN-1(n) + gN-1(n-1) */
gnext =
clip_q63_to_q31(((q63_t) gcurr +
((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
/* Output samples */
/* y(n) += gN(n) * vN */
acc += ((q63_t) gnext * *pv++);
/* write gN-1(n-1) into state for next sample processing */
*px2++ = gnext;
/* Update f values for next coefficient processing */
fcurr = fnext;
tapCnt--;
}
/* y(n) += g0(n) * v0 */
acc += (q63_t) fnext *(
*pv++);
*px2++ = fnext;
/* write out into pDst */
*pDst++ = (q31_t) (acc >> 31u);
/* Advance the state pointer by 1 to process the next group of samples */
pState = pState + 1u;
blkCnt--;
}
/* Processing is complete. Now copy last S->numStages samples to start of the buffer
for the preperation of next frame process */
/* Points to the start of the state buffer */
pStateCurnt = &S->pState[0];
pState = &S->pState[blockSize];
tapCnt = numStages;
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of IIR_Lattice group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_iir_lattice_q31.c
|
C
|
apache-2.0
| 10,025
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_f32.c
* Description: Processing function for the floating-point LMS filter
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @defgroup LMS Least Mean Square (LMS) Filters
*
* LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.
* LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.
* Adaptive filters are often used in communication systems, equalizers, and noise removal.
* The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.
* The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.
*
* An LMS filter consists of two components as shown below.
* The first component is a standard transversal or FIR filter.
* The second component is a coefficient update mechanism.
* The LMS filter has two input signals.
* The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
* That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
* The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
* This "error signal" tends towards zero as the filter adapts.
* The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.
* \image html LMS.gif "Internal structure of the Least Mean Square filter"
*
* The functions operate on blocks of data and each call to the function processes
* <code>blockSize</code> samples through the filter.
* <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
* <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
* All arrays contain <code>blockSize</code> values.
*
* The functions operate on a block-by-block basis.
* Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
* The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
*
* \par Algorithm:
* The output signal <code>y[n]</code> is computed by a standard FIR filter:
* <pre>
* y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
* </pre>
*
* \par
* The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
* <pre>
* e[n] = d[n] - y[n].
* </pre>
*
* \par
* After each sample of the error signal is computed, the filter coefficients <code>b[k]</code> are updated on a sample-by-sample basis:
* <pre>
* b[k] = b[k] + e[n] * mu * x[n-k], for k=0, 1, ..., numTaps-1
* </pre>
* where <code>mu</code> is the step size and controls the rate of coefficient convergence.
*\par
* In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
* Coefficients are stored in time reversed order.
* \par
* <pre>
* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
* </pre>
* \par
* <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
* Samples in the state buffer are stored in the order:
* \par
* <pre>
* {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
* </pre>
* \par
* Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
* The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
* to be avoided and yields a significant speed improvement.
* The state variables are updated after each block of data is processed.
* \par Instance Structure
* The coefficients and state variables for a filter are stored together in an instance data structure.
* A separate instance structure must be defined for each filter and
* coefficient and state arrays cannot be shared among instances.
* There are separate instance structure declarations for each of the 3 supported data types.
*
* \par Initialization Functions
* There is also an associated initialization function for each data type.
* The initialization function performs the following operations:
* - Sets the values of the internal structure fields.
* - Zeros out the values in the state buffer.
* To do this manually without calling the init function, assign the follow subfields of the instance structure:
* numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero.
*
* \par
* Use of the initialization function is optional.
* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
* To place an instance structure into a const data section, the instance structure must be manually initialized.
* Set the values in the state buffer to zeros before static initialization.
* The code below statically initializes each of the 3 different data type filter instance structures
* <pre>
* arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
* arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
* arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
* </pre>
* where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
* <code>pCoeffs</code> is the address of the coefficient buffer; <code>mu</code> is the step size parameter; and <code>postShift</code> is the shift applied to coefficients.
*
* \par Fixed-Point Behavior:
* Care must be taken when using the Q15 and Q31 versions of the LMS filter.
* The following issues must be considered:
* - Scaling of coefficients
* - Overflow and saturation
*
* \par Scaling of Coefficients:
* Filter coefficients are represented as fractional values and
* coefficients are restricted to lie in the range <code>[-1 +1)</code>.
* The fixed-point functions have an additional scaling parameter <code>postShift</code>.
* At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
* This essentially scales the filter coefficients by <code>2^postShift</code> and
* allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
* The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
*
* \par Overflow and Saturation:
* Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
* described separately as part of the function specific documentation below.
*/
/**
* @addtogroup LMS
* @{
*/
/**
* @details
* This function operates on floating-point data types.
*
* @brief Processing function for floating-point LMS filter.
* @param[in] *S points to an instance of the floating-point LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_lms_f32(
const arm_lms_instance_f32 * S,
float32_t * pSrc,
float32_t * pRef,
float32_t * pOut,
float32_t * pErr,
uint32_t blockSize)
{
float32_t *pState = S->pState; /* State pointer */
float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
float32_t *pStateCurnt; /* Points to the current sample of the state */
float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
float32_t mu = S->mu; /* Adaptive factor */
uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
uint32_t tapCnt, blkCnt; /* Loop counters */
float32_t sum, e, d; /* accumulator, error, reference data sample */
float32_t w = 0.0f; /* weight factor */
e = 0.0f;
d = 0.0f;
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
blkCnt = blockSize;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Initialize pState pointer */
px = pState;
/* Initialize coeff pointer */
pb = (pCoeffs);
/* Set the accumulator to zero */
sum = 0.0f;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
sum += (*px++) * (*pb++);
sum += (*px++) * (*pb++);
sum += (*px++) * (*pb++);
sum += (*px++) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
sum += (*px++) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* The result in the accumulator, store in the destination buffer. */
*pOut++ = sum;
/* Compute and store error */
d = (float32_t) (*pRef++);
e = d - sum;
*pErr++ = e;
/* Calculation of Weighting factor for the updating filter coefficients */
w = e * mu;
/* Initialize pState pointer */
px = pState;
/* Initialize coeff pointer */
pb = (pCoeffs);
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
/* Update filter coefficients */
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
*pb = *pb + (w * (*px++));
pb++;
*pb = *pb + (w * (*px++));
pb++;
*pb = *pb + (w * (*px++));
pb++;
*pb = *pb + (w * (*px++));
pb++;
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
*pb = *pb + (w * (*px++));
pb++;
/* Decrement the loop counter */
tapCnt--;
}
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete. Now copy the last numTaps - 1 samples to the
satrt of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Loop unrolling for (numTaps - 1u) samples copy */
tapCnt = (numTaps - 1u) >> 2u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
/* Calculate remaining number of copies */
tapCnt = (numTaps - 1u) % 0x4u;
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Initialize pState pointer */
px = pState;
/* Initialize pCoeffs pointer */
pb = pCoeffs;
/* Set the accumulator to zero */
sum = 0.0f;
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
sum += (*px++) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* The result is stored in the destination buffer. */
*pOut++ = sum;
/* Compute and store error */
d = (float32_t) (*pRef++);
e = d - sum;
*pErr++ = e;
/* Weighting factor for the LMS version */
w = e * mu;
/* Initialize pState pointer */
px = pState;
/* Initialize pCoeffs pointer */
pb = pCoeffs;
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
*pb = *pb + (w * (*px++));
pb++;
/* Decrement the loop counter */
tapCnt--;
}
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete. Now copy the last numTaps - 1 samples to the
* start of the state buffer. This prepares the state buffer for the
* next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Copy (numTaps - 1u) samples */
tapCnt = (numTaps - 1u);
/* Copy the data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of LMS group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_f32.c
|
C
|
apache-2.0
| 14,462
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_init_f32.c
* Description: Floating-point LMS filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @addtogroup LMS
* @{
*/
/**
* @brief Initialization function for floating-point LMS filter.
* @param[in] *S points to an instance of the floating-point LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to the coefficient buffer.
* @param[in] *pState points to state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @return none.
*/
/**
* \par Description:
* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
* <pre>
* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
* </pre>
* The initial filter coefficients serve as a starting point for the adaptive filter.
* <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_f32()</code>.
*/
void arm_lms_init_f32(
arm_lms_instance_f32 * S,
uint16_t numTaps,
float32_t * pCoeffs,
float32_t * pState,
float32_t mu,
uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always blockSize + numTaps */
memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
/* Assign state pointer */
S->pState = pState;
/* Assign Step size value */
S->mu = mu;
}
/**
* @} end of LMS group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_init_f32.c
|
C
|
apache-2.0
| 2,628
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_init_q15.c
* Description: Q15 LMS filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup LMS
* @{
*/
/**
* @brief Initialization function for the Q15 LMS filter.
* @param[in] *S points to an instance of the Q15 LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to the coefficient buffer.
* @param[in] *pState points to the state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @param[in] postShift bit shift applied to coefficients.
* @return none.
*
* \par Description:
* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
* <pre>
* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
* </pre>
* The initial filter coefficients serve as a starting point for the adaptive filter.
* <code>pState</code> points to the array of state variables and size of array is
* <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of
* input samples processed by each call to <code>arm_lms_q15()</code>.
*/
void arm_lms_init_q15(
arm_lms_instance_q15 * S,
uint16_t numTaps,
q15_t * pCoeffs,
q15_t * pState,
q15_t mu,
uint32_t blockSize,
uint32_t postShift)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always blockSize + numTaps - 1 */
memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
/* Assign state pointer */
S->pState = pState;
/* Assign Step size value */
S->mu = mu;
/* Assign postShift value to be applied */
S->postShift = postShift;
}
/**
* @} end of LMS group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_init_q15.c
|
C
|
apache-2.0
| 2,776
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_init_q31.c
* Description: Q31 LMS filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup LMS
* @{
*/
/**
* @brief Initialization function for Q31 LMS filter.
* @param[in] *S points to an instance of the Q31 LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to coefficient buffer.
* @param[in] *pState points to state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @param[in] postShift bit shift applied to coefficients.
* @return none.
*
* \par Description:
* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
* <pre>
* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
* </pre>
* The initial filter coefficients serve as a starting point for the adaptive filter.
* <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
* where <code>blockSize</code> is the number of input samples processed by each call to
* <code>arm_lms_q31()</code>.
*/
void arm_lms_init_q31(
arm_lms_instance_q31 * S,
uint16_t numTaps,
q31_t * pCoeffs,
q31_t * pState,
q31_t mu,
uint32_t blockSize,
uint32_t postShift)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always blockSize + numTaps - 1 */
memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t));
/* Assign state pointer */
S->pState = pState;
/* Assign Step size value */
S->mu = mu;
/* Assign postShift value to be applied */
S->postShift = postShift;
}
/**
* @} end of LMS group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_init_q31.c
|
C
|
apache-2.0
| 2,781
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_norm_f32.c
* Description: Processing function for the floating-point Normalised LMS
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @defgroup LMS_NORM Normalized LMS Filters
*
* This set of functions implements a commonly used adaptive filter.
* It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization
* factor which increases the adaptation rate of the filter.
* The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.
*
* A normalized least mean square (NLMS) filter consists of two components as shown below.
* The first component is a standard transversal or FIR filter.
* The second component is a coefficient update mechanism.
* The NLMS filter has two input signals.
* The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
* That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
* The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
* This "error signal" tends towards zero as the filter adapts.
* The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.
* \image html LMS.gif "Internal structure of the NLMS adaptive filter"
*
* The functions operate on blocks of data and each call to the function processes
* <code>blockSize</code> samples through the filter.
* <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
* <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
* All arrays contain <code>blockSize</code> values.
*
* The functions operate on a block-by-block basis.
* Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
* The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
*
* \par Algorithm:
* The output signal <code>y[n]</code> is computed by a standard FIR filter:
* <pre>
* y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
* </pre>
*
* \par
* The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
* <pre>
* e[n] = d[n] - y[n].
* </pre>
*
* \par
* After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:
* <pre>
* E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
* </pre>
* The filter coefficients <code>b[k]</code> are then updated on a sample-by-sample basis:
* <pre>
* b[k] = b[k] + e[n] * (mu/E) * x[n-k], for k=0, 1, ..., numTaps-1
* </pre>
* where <code>mu</code> is the step size and controls the rate of coefficient convergence.
*\par
* In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
* Coefficients are stored in time reversed order.
* \par
* <pre>
* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
* </pre>
* \par
* <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
* Samples in the state buffer are stored in the order:
* \par
* <pre>
* {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
* </pre>
* \par
* Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
* The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
* to be avoided and yields a significant speed improvement.
* The state variables are updated after each block of data is processed.
* \par Instance Structure
* The coefficients and state variables for a filter are stored together in an instance data structure.
* A separate instance structure must be defined for each filter and
* coefficient and state arrays cannot be shared among instances.
* There are separate instance structure declarations for each of the 3 supported data types.
*
* \par Initialization Functions
* There is also an associated initialization function for each data type.
* The initialization function performs the following operations:
* - Sets the values of the internal structure fields.
* - Zeros out the values in the state buffer.
* To do this manually without calling the init function, assign the follow subfields of the instance structure:
* numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero.
* For Q7, Q15, and Q31 the following fields must also be initialized;
* recipTable, postShift
*
* \par
* Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
* \par Fixed-Point Behavior:
* Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.
* The following issues must be considered:
* - Scaling of coefficients
* - Overflow and saturation
*
* \par Scaling of Coefficients:
* Filter coefficients are represented as fractional values and
* coefficients are restricted to lie in the range <code>[-1 +1)</code>.
* The fixed-point functions have an additional scaling parameter <code>postShift</code>.
* At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
* This essentially scales the filter coefficients by <code>2^postShift</code> and
* allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
* The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
*
* \par Overflow and Saturation:
* Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
* described separately as part of the function specific documentation below.
*/
/**
* @addtogroup LMS_NORM
* @{
*/
/**
* @brief Processing function for floating-point normalized LMS filter.
* @param[in] *S points to an instance of the floating-point normalized LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*/
void arm_lms_norm_f32(
arm_lms_norm_instance_f32 * S,
float32_t * pSrc,
float32_t * pRef,
float32_t * pOut,
float32_t * pErr,
uint32_t blockSize)
{
float32_t *pState = S->pState; /* State pointer */
float32_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
float32_t *pStateCurnt; /* Points to the current sample of the state */
float32_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
float32_t mu = S->mu; /* Adaptive factor */
uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
uint32_t tapCnt, blkCnt; /* Loop counters */
float32_t energy; /* Energy of the input */
float32_t sum, e, d; /* accumulator, error, reference data sample */
float32_t w, x0, in; /* weight factor, temporary variable to hold input sample and state */
/* Initializations of error, difference, Coefficient update */
e = 0.0f;
d = 0.0f;
w = 0.0f;
energy = S->energy;
x0 = S->x0;
/* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Loop over blockSize number of values */
blkCnt = blockSize;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc;
/* Initialize pState pointer */
px = pState;
/* Initialize coeff pointer */
pb = (pCoeffs);
/* Read the sample from input buffer */
in = *pSrc++;
/* Update the energy calculation */
energy -= x0 * x0;
energy += in * in;
/* Set the accumulator to zero */
sum = 0.0f;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
sum += (*px++) * (*pb++);
sum += (*px++) * (*pb++);
sum += (*px++) * (*pb++);
sum += (*px++) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
sum += (*px++) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* The result in the accumulator, store in the destination buffer. */
*pOut++ = sum;
/* Compute and store error */
d = (float32_t) (*pRef++);
e = d - sum;
*pErr++ = e;
/* Calculation of Weighting factor for updating filter coefficients */
/* epsilon value 0.000000119209289f */
w = (e * mu) / (energy + 0.000000119209289f);
/* Initialize pState pointer */
px = pState;
/* Initialize coeff pointer */
pb = (pCoeffs);
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
/* Update filter coefficients */
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
*pb += w * (*px++);
pb++;
*pb += w * (*px++);
pb++;
*pb += w * (*px++);
pb++;
*pb += w * (*px++);
pb++;
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
*pb += w * (*px++);
pb++;
/* Decrement the loop counter */
tapCnt--;
}
x0 = *pState;
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
S->energy = energy;
S->x0 = x0;
/* Processing is complete. Now copy the last numTaps - 1 samples to the
satrt of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Loop unrolling for (numTaps - 1u)/4 samples copy */
tapCnt = (numTaps - 1u) >> 2u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
/* Calculate remaining number of copies */
tapCnt = (numTaps - 1u) % 0x4u;
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc;
/* Initialize pState pointer */
px = pState;
/* Initialize pCoeffs pointer */
pb = pCoeffs;
/* Read the sample from input buffer */
in = *pSrc++;
/* Update the energy calculation */
energy -= x0 * x0;
energy += in * in;
/* Set the accumulator to zero */
sum = 0.0f;
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
sum += (*px++) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* The result in the accumulator is stored in the destination buffer. */
*pOut++ = sum;
/* Compute and store error */
d = (float32_t) (*pRef++);
e = d - sum;
*pErr++ = e;
/* Calculation of Weighting factor for updating filter coefficients */
/* epsilon value 0.000000119209289f */
w = (e * mu) / (energy + 0.000000119209289f);
/* Initialize pState pointer */
px = pState;
/* Initialize pCcoeffs pointer */
pb = pCoeffs;
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
*pb += w * (*px++);
pb++;
/* Decrement the loop counter */
tapCnt--;
}
x0 = *pState;
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
S->energy = energy;
S->x0 = x0;
/* Processing is complete. Now copy the last numTaps - 1 samples to the
satrt of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Copy (numTaps - 1u) samples */
tapCnt = (numTaps - 1u);
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of LMS_NORM group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_norm_f32.c
|
C
|
apache-2.0
| 14,468
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_norm_init_f32.c
* Description: Floating-point NLMS filter initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup LMS_NORM
* @{
*/
/**
* @brief Initialization function for floating-point normalized LMS filter.
* @param[in] *S points to an instance of the floating-point LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to coefficient buffer.
* @param[in] *pState points to state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @return none.
*
* \par Description:
* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
* <pre>
* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
* </pre>
* The initial filter coefficients serve as a starting point for the adaptive filter.
* <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
* where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_f32()</code>.
*/
void arm_lms_norm_init_f32(
arm_lms_norm_instance_f32 * S,
uint16_t numTaps,
float32_t * pCoeffs,
float32_t * pState,
float32_t mu,
uint32_t blockSize)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always blockSize + numTaps - 1 */
memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
/* Assign state pointer */
S->pState = pState;
/* Assign Step size value */
S->mu = mu;
/* Initialise Energy to zero */
S->energy = 0.0f;
/* Initialise x0 to zero */
S->x0 = 0.0f;
}
/**
* @} end of LMS_NORM group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_norm_init_f32.c
|
C
|
apache-2.0
| 2,805
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_norm_init_q15.c
* Description: Q15 NLMS initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
#include "arm_common_tables.h"
/**
* @addtogroup LMS_NORM
* @{
*/
/**
* @brief Initialization function for Q15 normalized LMS filter.
* @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to coefficient buffer.
* @param[in] *pState points to state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @param[in] postShift bit shift applied to coefficients.
* @return none.
*
* <b>Description:</b>
* \par
* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
* <pre>
* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
* </pre>
* The initial filter coefficients serve as a starting point for the adaptive filter.
* <code>pState</code> points to the array of state variables and size of array is
* <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed
* by each call to <code>arm_lms_norm_q15()</code>.
*/
void arm_lms_norm_init_q15(
arm_lms_norm_instance_q15 * S,
uint16_t numTaps,
q15_t * pCoeffs,
q15_t * pState,
q15_t mu,
uint32_t blockSize,
uint8_t postShift)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always blockSize + numTaps - 1 */
memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
/* Assign post Shift value applied to coefficients */
S->postShift = postShift;
/* Assign state pointer */
S->pState = pState;
/* Assign Step size value */
S->mu = mu;
/* Initialize reciprocal pointer table */
S->recipTable = (q15_t *) armRecipTableQ15;
/* Initialise Energy to zero */
S->energy = 0;
/* Initialise x0 to zero */
S->x0 = 0;
}
/**
* @} end of LMS_NORM group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_norm_init_q15.c
|
C
|
apache-2.0
| 3,051
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_norm_init_q31.c
* Description: Q31 NLMS initialization function
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
#include "arm_common_tables.h"
/**
* @addtogroup LMS_NORM
* @{
*/
/**
* @brief Initialization function for Q31 normalized LMS filter.
* @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
* @param[in] numTaps number of filter coefficients.
* @param[in] *pCoeffs points to coefficient buffer.
* @param[in] *pState points to state buffer.
* @param[in] mu step size that controls filter coefficient updates.
* @param[in] blockSize number of samples to process.
* @param[in] postShift bit shift applied to coefficients.
* @return none.
*
* <b>Description:</b>
* \par
* <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
* <pre>
* {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
* </pre>
* The initial filter coefficients serve as a starting point for the adaptive filter.
* <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
* where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.
*/
void arm_lms_norm_init_q31(
arm_lms_norm_instance_q31 * S,
uint16_t numTaps,
q31_t * pCoeffs,
q31_t * pState,
q31_t mu,
uint32_t blockSize,
uint8_t postShift)
{
/* Assign filter taps */
S->numTaps = numTaps;
/* Assign coefficient pointer */
S->pCoeffs = pCoeffs;
/* Clear state buffer and size is always blockSize + numTaps - 1 */
memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
/* Assign post Shift value applied to coefficients */
S->postShift = postShift;
/* Assign state pointer */
S->pState = pState;
/* Assign Step size value */
S->mu = mu;
/* Initialize reciprocal pointer table */
S->recipTable = (q31_t *) armRecipTableQ31;
/* Initialise Energy to zero */
S->energy = 0;
/* Initialise x0 to zero */
S->x0 = 0;
}
/**
* @} end of LMS_NORM group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_norm_init_q31.c
|
C
|
apache-2.0
| 3,018
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_norm_q15.c
* Description: Q15 NLMS filter
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup LMS_NORM
* @{
*/
/**
* @brief Processing function for Q15 normalized LMS filter.
* @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using a 64-bit internal accumulator.
* Both coefficients and state variables are represented in 1.15 format and
* multiplications yield a 2.30 result. The 2.30 intermediate results are
* accumulated in a 64-bit accumulator in 34.30 format.
* There is no risk of internal overflow with this approach and the full
* precision of intermediate multiplications is preserved. After all additions
* have been performed, the accumulator is truncated to 34.15 format by
* discarding low 15 bits. Lastly, the accumulator is saturated to yield a
* result in 1.15 format.
*
* \par
* In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
*
*/
void arm_lms_norm_q15(
arm_lms_norm_instance_q15 * S,
q15_t * pSrc,
q15_t * pRef,
q15_t * pOut,
q15_t * pErr,
uint32_t blockSize)
{
q15_t *pState = S->pState; /* State pointer */
q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q15_t *pStateCurnt; /* Points to the current sample of the state */
q15_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
q15_t mu = S->mu; /* Adaptive factor */
uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
uint32_t tapCnt, blkCnt; /* Loop counters */
q31_t energy; /* Energy of the input */
q63_t acc; /* Accumulator */
q15_t e = 0, d = 0; /* error, reference data sample */
q15_t w = 0, in; /* weight factor and state */
q15_t x0; /* temporary variable to hold input sample */
//uint32_t shift = (uint32_t) S->postShift + 1u; /* Shift to be applied to the output */
q15_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu product and reciprocal of energy */
q15_t postShift; /* Post shift to be applied to weight after reciprocal calculation */
q31_t coef; /* Teporary variable for coefficient */
q31_t acc_l, acc_h;
int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */
int32_t uShift = (32 - lShift);
energy = S->energy;
x0 = S->x0;
/* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Loop over blockSize number of values */
blkCnt = blockSize;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc;
/* Initialize pState pointer */
px = pState;
/* Initialize coeff pointer */
pb = (pCoeffs);
/* Read the sample from input buffer */
in = *pSrc++;
/* Update the energy calculation */
energy -= (((q31_t) x0 * (x0)) >> 15);
energy += (((q31_t) in * (in)) >> 15);
/* Set the accumulator to zero */
acc = 0;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
#ifndef UNALIGNED_SUPPORT_DISABLE
acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
#else
acc += (((q31_t) * px++ * (*pb++)));
acc += (((q31_t) * px++ * (*pb++)));
acc += (((q31_t) * px++ * (*pb++)));
acc += (((q31_t) * px++ * (*pb++)));
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += (((q31_t) * px++ * (*pb++)));
/* Decrement the loop counter */
tapCnt--;
}
/* Calc lower part of acc */
acc_l = acc & 0xffffffff;
/* Calc upper part of acc */
acc_h = (acc >> 32) & 0xffffffff;
/* Apply shift for lower part of acc and upper part of acc */
acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
/* Converting the result to 1.15 format and saturate the output */
acc = __SSAT(acc, 16u);
/* Store the result from accumulator into the destination buffer. */
*pOut++ = (q15_t) acc;
/* Compute and store error */
d = *pRef++;
e = d - (q15_t) acc;
*pErr++ = e;
/* Calculation of 1/energy */
postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
&oneByEnergy, S->recipTable);
/* Calculation of e * mu value */
errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
/* Calculation of (e * mu) * (1/energy) value */
acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
/* Weighting factor for the normalized version */
w = (q15_t) __SSAT((q31_t) acc, 16);
/* Initialize pState pointer */
px = pState;
/* Initialize coeff pointer */
pb = (pCoeffs);
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
/* Update filter coefficients */
while (tapCnt > 0u)
{
coef = *pb + (((q31_t) w * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
coef = *pb + (((q31_t) w * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
coef = *pb + (((q31_t) w * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
coef = *pb + (((q31_t) w * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
coef = *pb + (((q31_t) w * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
/* Decrement the loop counter */
tapCnt--;
}
/* Read the sample from state buffer */
x0 = *pState;
/* Advance state pointer by 1 for the next sample */
pState = pState + 1u;
/* Decrement the loop counter */
blkCnt--;
}
/* Save energy and x0 values for the next frame */
S->energy = (q15_t) energy;
S->x0 = x0;
/* Processing is complete. Now copy the last numTaps - 1 samples to the
satrt of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Calculation of count for copying integer writes */
tapCnt = (numTaps - 1u) >> 2;
while (tapCnt > 0u)
{
#ifndef UNALIGNED_SUPPORT_DISABLE
*__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
*__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
#else
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
#endif
tapCnt--;
}
/* Calculation of count for remaining q15_t data */
tapCnt = (numTaps - 1u) % 0x4u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc;
/* Initialize pState pointer */
px = pState;
/* Initialize pCoeffs pointer */
pb = pCoeffs;
/* Read the sample from input buffer */
in = *pSrc++;
/* Update the energy calculation */
energy -= (((q31_t) x0 * (x0)) >> 15);
energy += (((q31_t) in * (in)) >> 15);
/* Set the accumulator to zero */
acc = 0;
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += (((q31_t) * px++ * (*pb++)));
/* Decrement the loop counter */
tapCnt--;
}
/* Calc lower part of acc */
acc_l = acc & 0xffffffff;
/* Calc upper part of acc */
acc_h = (acc >> 32) & 0xffffffff;
/* Apply shift for lower part of acc and upper part of acc */
acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
/* Converting the result to 1.15 format and saturate the output */
acc = __SSAT(acc, 16u);
/* Converting the result to 1.15 format */
//acc = __SSAT((acc >> (16u - shift)), 16u);
/* Store the result from accumulator into the destination buffer. */
*pOut++ = (q15_t) acc;
/* Compute and store error */
d = *pRef++;
e = d - (q15_t) acc;
*pErr++ = e;
/* Calculation of 1/energy */
postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
&oneByEnergy, S->recipTable);
/* Calculation of e * mu value */
errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
/* Calculation of (e * mu) * (1/energy) value */
acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
/* Weighting factor for the normalized version */
w = (q15_t) __SSAT((q31_t) acc, 16);
/* Initialize pState pointer */
px = pState;
/* Initialize coeff pointer */
pb = (pCoeffs);
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
coef = *pb + (((q31_t) w * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
/* Decrement the loop counter */
tapCnt--;
}
/* Read the sample from state buffer */
x0 = *pState;
/* Advance state pointer by 1 for the next sample */
pState = pState + 1u;
/* Decrement the loop counter */
blkCnt--;
}
/* Save energy and x0 values for the next frame */
S->energy = (q15_t) energy;
S->x0 = x0;
/* Processing is complete. Now copy the last numTaps - 1 samples to the
satrt of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* copy (numTaps - 1u) data */
tapCnt = (numTaps - 1u);
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of LMS_NORM group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_norm_q15.c
|
C
|
apache-2.0
| 12,162
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_norm_q31.c
* Description: Processing function for the Q31 NLMS filter
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup LMS_NORM
* @{
*/
/**
* @brief Processing function for Q31 normalized LMS filter.
* @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using an internal 64-bit accumulator.
* The accumulator has a 2.62 format and maintains full precision of the intermediate
* multiplication results but provides only a single guard bit.
* Thus, if the accumulator result overflows it wraps around rather than clip.
* In order to avoid overflows completely the input signal must be scaled down by
* log2(numTaps) bits. The reference signal should not be scaled down.
* After all multiply-accumulates are performed, the 2.62 accumulator is shifted
* and saturated to 1.31 format to yield the final result.
* The output signal and error signal are in 1.31 format.
*
* \par
* In this filter, filter coefficients are updated for each sample and the
* updation of filter cofficients are saturted.
*
*/
void arm_lms_norm_q31(
arm_lms_norm_instance_q31 * S,
q31_t * pSrc,
q31_t * pRef,
q31_t * pOut,
q31_t * pErr,
uint32_t blockSize)
{
q31_t *pState = S->pState; /* State pointer */
q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q31_t *pStateCurnt; /* Points to the current sample of the state */
q31_t *px, *pb; /* Temporary pointers for state and coefficient buffers */
q31_t mu = S->mu; /* Adaptive factor */
uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
uint32_t tapCnt, blkCnt; /* Loop counters */
q63_t energy; /* Energy of the input */
q63_t acc; /* Accumulator */
q31_t e = 0, d = 0; /* error, reference data sample */
q31_t w = 0, in; /* weight factor and state */
q31_t x0; /* temporary variable to hold input sample */
// uint32_t shift = 32u - ((uint32_t) S->postShift + 1u); /* Shift to be applied to the output */
q31_t errorXmu, oneByEnergy; /* Temporary variables to store error and mu product and reciprocal of energy */
q31_t postShift; /* Post shift to be applied to weight after reciprocal calculation */
q31_t coef; /* Temporary variable for coef */
q31_t acc_l, acc_h; /* temporary input */
uint32_t uShift = ((uint32_t) S->postShift + 1u);
uint32_t lShift = 32u - uShift; /* Shift to be applied to the output */
energy = S->energy;
x0 = S->x0;
/* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Loop over blockSize number of values */
blkCnt = blockSize;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc;
/* Initialize pState pointer */
px = pState;
/* Initialize coeff pointer */
pb = (pCoeffs);
/* Read the sample from input buffer */
in = *pSrc++;
/* Update the energy calculation */
energy = (q31_t) ((((q63_t) energy << 32) -
(((q63_t) x0 * x0) << 1)) >> 32);
energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
/* Set the accumulator to zero */
acc = 0;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += ((q63_t) (*px++)) * (*pb++);
acc += ((q63_t) (*px++)) * (*pb++);
acc += ((q63_t) (*px++)) * (*pb++);
acc += ((q63_t) (*px++)) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += ((q63_t) (*px++)) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* Converting the result to 1.31 format */
/* Calc lower part of acc */
acc_l = acc & 0xffffffff;
/* Calc upper part of acc */
acc_h = (acc >> 32) & 0xffffffff;
acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
/* Store the result from accumulator into the destination buffer. */
*pOut++ = (q31_t) acc;
/* Compute and store error */
d = *pRef++;
e = d - (q31_t) acc;
*pErr++ = e;
/* Calculates the reciprocal of energy */
postShift = arm_recip_q31(energy + DELTA_Q31,
&oneByEnergy, &S->recipTable[0]);
/* Calculation of product of (e * mu) */
errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
/* Weighting factor for the normalized version */
w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
/* Initialize pState pointer */
px = pState;
/* Initialize coeff pointer */
pb = (pCoeffs);
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
/* Update filter coefficients */
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
/* coef is in 2.30 format */
coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
/* get coef in 1.31 format by left shifting */
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
/* update coefficient buffer to next coefficient */
pb++;
coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
pb++;
coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
pb++;
coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
pb++;
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
pb++;
/* Decrement the loop counter */
tapCnt--;
}
/* Read the sample from state buffer */
x0 = *pState;
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Save energy and x0 values for the next frame */
S->energy = (q31_t) energy;
S->x0 = x0;
/* Processing is complete. Now copy the last numTaps - 1 samples to the
satrt of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Loop unrolling for (numTaps - 1u) samples copy */
tapCnt = (numTaps - 1u) >> 2u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
/* Calculate remaining number of copies */
tapCnt = (numTaps - 1u) % 0x4u;
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc;
/* Initialize pState pointer */
px = pState;
/* Initialize pCoeffs pointer */
pb = pCoeffs;
/* Read the sample from input buffer */
in = *pSrc++;
/* Update the energy calculation */
energy =
(q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
/* Set the accumulator to zero */
acc = 0;
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += ((q63_t) (*px++)) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* Converting the result to 1.31 format */
/* Converting the result to 1.31 format */
/* Calc lower part of acc */
acc_l = acc & 0xffffffff;
/* Calc upper part of acc */
acc_h = (acc >> 32) & 0xffffffff;
acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
//acc = (q31_t) (acc >> shift);
/* Store the result from accumulator into the destination buffer. */
*pOut++ = (q31_t) acc;
/* Compute and store error */
d = *pRef++;
e = d - (q31_t) acc;
*pErr++ = e;
/* Calculates the reciprocal of energy */
postShift =
arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
/* Calculation of product of (e * mu) */
errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
/* Weighting factor for the normalized version */
w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
/* Initialize pState pointer */
px = pState;
/* Initialize coeff pointer */
pb = (pCoeffs);
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
/* coef is in 2.30 format */
coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
/* get coef in 1.31 format by left shifting */
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
/* update coefficient buffer to next coefficient */
pb++;
/* Decrement the loop counter */
tapCnt--;
}
/* Read the sample from state buffer */
x0 = *pState;
/* Advance state pointer by 1 for the next sample */
pState = pState + 1;
/* Decrement the loop counter */
blkCnt--;
}
/* Save energy and x0 values for the next frame */
S->energy = (q31_t) energy;
S->x0 = x0;
/* Processing is complete. Now copy the last numTaps - 1 samples to the
start of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Loop for (numTaps - 1u) samples copy */
tapCnt = (numTaps - 1u);
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of LMS_NORM group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_norm_q31.c
|
C
|
apache-2.0
| 12,338
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_q15.c
* Description: Processing function for the Q15 LMS filter
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup LMS
* @{
*/
/**
* @brief Processing function for Q15 LMS filter.
* @param[in] *S points to an instance of the Q15 LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*
* \par Scaling and Overflow Behavior:
* The function is implemented using a 64-bit internal accumulator.
* Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
* The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
* There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
* After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
* Lastly, the accumulator is saturated to yield a result in 1.15 format.
*
* \par
* In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
*
*/
void arm_lms_q15(
const arm_lms_instance_q15 * S,
q15_t * pSrc,
q15_t * pRef,
q15_t * pOut,
q15_t * pErr,
uint32_t blockSize)
{
q15_t *pState = S->pState; /* State pointer */
uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q15_t *pStateCurnt; /* Points to the current sample of the state */
q15_t mu = S->mu; /* Adaptive factor */
q15_t *px; /* Temporary pointer for state */
q15_t *pb; /* Temporary pointer for coefficient buffer */
uint32_t tapCnt, blkCnt; /* Loop counters */
q63_t acc; /* Accumulator */
q15_t e = 0; /* error of data sample */
q15_t alpha; /* Intermediate constant for taps update */
q31_t coef; /* Teporary variable for coefficient */
q31_t acc_l, acc_h;
int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */
int32_t uShift = (32 - lShift);
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Initializing blkCnt with blockSize */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Initialize state pointer */
px = pState;
/* Initialize coefficient pointer */
pb = pCoeffs;
/* Set the accumulator to zero */
acc = 0;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2u;
while (tapCnt > 0u)
{
/* acc += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
/* Perform the multiply-accumulate */
#ifndef UNALIGNED_SUPPORT_DISABLE
acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
#else
acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
/* Decrement the loop counter */
tapCnt--;
}
/* Calc lower part of acc */
acc_l = acc & 0xffffffff;
/* Calc upper part of acc */
acc_h = (acc >> 32) & 0xffffffff;
/* Apply shift for lower part of acc and upper part of acc */
acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
/* Converting the result to 1.15 format and saturate the output */
acc = __SSAT(acc, 16);
/* Store the result from accumulator into the destination buffer. */
*pOut++ = (q15_t) acc;
/* Compute and store error */
e = *pRef++ - (q15_t) acc;
*pErr++ = (q15_t) e;
/* Compute alpha i.e. intermediate constant for taps update */
alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
/* Initialize state pointer */
/* Advance state pointer by 1 for the next sample */
px = pState++;
/* Initialize coefficient pointer */
pb = pCoeffs;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2u;
/* Update filter coefficients */
while (tapCnt > 0u)
{
coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
/* Decrement the loop counter */
tapCnt--;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete. Now copy the last numTaps - 1 samples to the
satrt of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Calculation of count for copying integer writes */
tapCnt = (numTaps - 1u) >> 2;
while (tapCnt > 0u)
{
#ifndef UNALIGNED_SUPPORT_DISABLE
*__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
*__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
#else
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
#endif
tapCnt--;
}
/* Calculation of count for remaining q15_t data */
tapCnt = (numTaps - 1u) % 0x4u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Loop over blockSize number of values */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Initialize pState pointer */
px = pState;
/* Initialize pCoeffs pointer */
pb = pCoeffs;
/* Set the accumulator to zero */
acc = 0;
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += (q63_t) ((q31_t) (*px++) * (*pb++));
/* Decrement the loop counter */
tapCnt--;
}
/* Calc lower part of acc */
acc_l = acc & 0xffffffff;
/* Calc upper part of acc */
acc_h = (acc >> 32) & 0xffffffff;
/* Apply shift for lower part of acc and upper part of acc */
acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
/* Converting the result to 1.15 format and saturate the output */
acc = __SSAT(acc, 16);
/* Store the result from accumulator into the destination buffer. */
*pOut++ = (q15_t) acc;
/* Compute and store error */
e = *pRef++ - (q15_t) acc;
*pErr++ = (q15_t) e;
/* Compute alpha i.e. intermediate constant for taps update */
alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
/* Initialize pState pointer */
/* Advance state pointer by 1 for the next sample */
px = pState++;
/* Initialize pCoeffs pointer */
pb = pCoeffs;
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
*pb++ = (q15_t) __SSAT((coef), 16);
/* Decrement the loop counter */
tapCnt--;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete. Now copy the last numTaps - 1 samples to the
start of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Copy (numTaps - 1u) samples */
tapCnt = (numTaps - 1u);
/* Copy the data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of LMS group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_q15.c
|
C
|
apache-2.0
| 10,636
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_lms_q31.c
* Description: Processing function for the Q31 LMS filter
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupFilters
*/
/**
* @addtogroup LMS
* @{
*/
/**
* @brief Processing function for Q31 LMS filter.
* @param[in] *S points to an instance of the Q15 LMS filter structure.
* @param[in] *pSrc points to the block of input data.
* @param[in] *pRef points to the block of reference data.
* @param[out] *pOut points to the block of output data.
* @param[out] *pErr points to the block of error data.
* @param[in] blockSize number of samples to process.
* @return none.
*
* \par Scaling and Overflow Behavior:
* The function is implemented using an internal 64-bit accumulator.
* The accumulator has a 2.62 format and maintains full precision of the intermediate
* multiplication results but provides only a single guard bit.
* Thus, if the accumulator result overflows it wraps around rather than clips.
* In order to avoid overflows completely the input signal must be scaled down by
* log2(numTaps) bits.
* The reference signal should not be scaled down.
* After all multiply-accumulates are performed, the 2.62 accumulator is shifted
* and saturated to 1.31 format to yield the final result.
* The output signal and error signal are in 1.31 format.
*
* \par
* In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.
*/
void arm_lms_q31(
const arm_lms_instance_q31 * S,
q31_t * pSrc,
q31_t * pRef,
q31_t * pOut,
q31_t * pErr,
uint32_t blockSize)
{
q31_t *pState = S->pState; /* State pointer */
uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
q31_t *pStateCurnt; /* Points to the current sample of the state */
q31_t mu = S->mu; /* Adaptive factor */
q31_t *px; /* Temporary pointer for state */
q31_t *pb; /* Temporary pointer for coefficient buffer */
uint32_t tapCnt, blkCnt; /* Loop counters */
q63_t acc; /* Accumulator */
q31_t e = 0; /* error of data sample */
q31_t alpha; /* Intermediate constant for taps update */
q31_t coef; /* Temporary variable for coef */
q31_t acc_l, acc_h; /* temporary input */
uint32_t uShift = ((uint32_t) S->postShift + 1u);
uint32_t lShift = 32u - uShift; /* Shift to be applied to the output */
/* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
/* pStateCurnt points to the location where the new input data should be written */
pStateCurnt = &(S->pState[(numTaps - 1u)]);
/* Initializing blkCnt with blockSize */
blkCnt = blockSize;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Initialize state pointer */
px = pState;
/* Initialize coefficient pointer */
pb = pCoeffs;
/* Set the accumulator to zero */
acc = 0;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
/* acc += b[N] * x[n-N] */
acc += ((q63_t) (*px++)) * (*pb++);
/* acc += b[N-1] * x[n-N-1] */
acc += ((q63_t) (*px++)) * (*pb++);
/* acc += b[N-2] * x[n-N-2] */
acc += ((q63_t) (*px++)) * (*pb++);
/* acc += b[N-3] * x[n-N-3] */
acc += ((q63_t) (*px++)) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += ((q63_t) (*px++)) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* Converting the result to 1.31 format */
/* Calc lower part of acc */
acc_l = acc & 0xffffffff;
/* Calc upper part of acc */
acc_h = (acc >> 32) & 0xffffffff;
acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
/* Store the result from accumulator into the destination buffer. */
*pOut++ = (q31_t) acc;
/* Compute and store error */
e = *pRef++ - (q31_t) acc;
*pErr++ = (q31_t) e;
/* Compute alpha i.e. intermediate constant for taps update */
alpha = (q31_t) (((q63_t) e * mu) >> 31);
/* Initialize state pointer */
/* Advance state pointer by 1 for the next sample */
px = pState++;
/* Initialize coefficient pointer */
pb = pCoeffs;
/* Loop unrolling. Process 4 taps at a time. */
tapCnt = numTaps >> 2;
/* Update filter coefficients */
while (tapCnt > 0u)
{
/* coef is in 2.30 format */
coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
/* get coef in 1.31 format by left shifting */
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
/* update coefficient buffer to next coefficient */
pb++;
coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
pb++;
coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
pb++;
coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
pb++;
/* Decrement the loop counter */
tapCnt--;
}
/* If the filter length is not a multiple of 4, compute the remaining filter taps */
tapCnt = numTaps % 0x4u;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
pb++;
/* Decrement the loop counter */
tapCnt--;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete. Now copy the last numTaps - 1 samples to the
satrt of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Loop unrolling for (numTaps - 1u) samples copy */
tapCnt = (numTaps - 1u) >> 2u;
/* copy data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
/* Calculate remaining number of copies */
tapCnt = (numTaps - 1u) % 0x4u;
/* Copy the remaining q31_t data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#else
/* Run the below code for Cortex-M0 */
while (blkCnt > 0u)
{
/* Copy the new input sample into the state buffer */
*pStateCurnt++ = *pSrc++;
/* Initialize pState pointer */
px = pState;
/* Initialize pCoeffs pointer */
pb = pCoeffs;
/* Set the accumulator to zero */
acc = 0;
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
acc += ((q63_t) (*px++)) * (*pb++);
/* Decrement the loop counter */
tapCnt--;
}
/* Converting the result to 1.31 format */
/* Store the result from accumulator into the destination buffer. */
/* Calc lower part of acc */
acc_l = acc & 0xffffffff;
/* Calc upper part of acc */
acc_h = (acc >> 32) & 0xffffffff;
acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
*pOut++ = (q31_t) acc;
/* Compute and store error */
e = *pRef++ - (q31_t) acc;
*pErr++ = (q31_t) e;
/* Weighting factor for the LMS version */
alpha = (q31_t) (((q63_t) e * mu) >> 31);
/* Initialize pState pointer */
/* Advance state pointer by 1 for the next sample */
px = pState++;
/* Initialize pCoeffs pointer */
pb = pCoeffs;
/* Loop over numTaps number of values */
tapCnt = numTaps;
while (tapCnt > 0u)
{
/* Perform the multiply-accumulate */
coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
*pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
pb++;
/* Decrement the loop counter */
tapCnt--;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Processing is complete. Now copy the last numTaps - 1 samples to the
start of the state buffer. This prepares the state buffer for the
next function call. */
/* Points to the start of the pState buffer */
pStateCurnt = S->pState;
/* Copy (numTaps - 1u) samples */
tapCnt = (numTaps - 1u);
/* Copy the data */
while (tapCnt > 0u)
{
*pStateCurnt++ = *pState++;
/* Decrement the loop counter */
tapCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of LMS group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/FilteringFunctions/arm_lms_q31.c
|
C
|
apache-2.0
| 10,248
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_add_f32.c
* Description: Floating-point matrix addition
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @defgroup MatrixAdd Matrix Addition
*
* Adds two matrices.
* \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"
*
* The functions check to make sure that
* <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
* number of rows and columns.
*/
/**
* @addtogroup MatrixAdd
* @{
*/
/**
* @brief Floating-point matrix addition.
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_add_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
arm_matrix_instance_f32 * pDst)
{
float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
float32_t *pOut = pDst->pData; /* output data matrix pointer */
#if defined (ARM_MATH_DSP)
float32_t inA1, inA2, inB1, inB2, out1, out2; /* temporary variables */
#endif // #if defined (ARM_MATH_DSP)
uint32_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix addition */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
(pSrcA->numCols != pSrcB->numCols) ||
(pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif
{
/* Total number of samples in the input matrix */
numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
#if defined (ARM_MATH_DSP)
/* Loop unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) + B(m,n) */
/* Add and then store the results in the destination buffer. */
/* Read values from source A */
inA1 = pIn1[0];
/* Read values from source B */
inB1 = pIn2[0];
/* Read values from source A */
inA2 = pIn1[1];
/* out = sourceA + sourceB */
out1 = inA1 + inB1;
/* Read values from source B */
inB2 = pIn2[1];
/* Read values from source A */
inA1 = pIn1[2];
/* out = sourceA + sourceB */
out2 = inA2 + inB2;
/* Read values from source B */
inB1 = pIn2[2];
/* Store result in destination */
pOut[0] = out1;
pOut[1] = out2;
/* Read values from source A */
inA2 = pIn1[3];
/* Read values from source B */
inB2 = pIn2[3];
/* out = sourceA + sourceB */
out1 = inA1 + inB1;
/* out = sourceA + sourceB */
out2 = inA2 + inB2;
/* Store result in destination */
pOut[2] = out1;
/* Store result in destination */
pOut[3] = out2;
/* update pointers to process next sampels */
pIn1 += 4u;
pIn2 += 4u;
pOut += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) + B(m,n) */
/* Add and then store the results in the destination buffer. */
*pOut++ = (*pIn1++) + (*pIn2++);
/* Decrement the loop counter */
blkCnt--;
}
/* set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixAdd group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_add_f32.c
|
C
|
apache-2.0
| 5,332
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_add_q15.c
* Description: Q15 matrix addition
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixAdd
* @{
*/
/**
* @brief Q15 matrix addition.
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
*/
arm_status arm_mat_add_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
arm_matrix_instance_q15 * pDst)
{
q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
q15_t *pOut = pDst->pData; /* output data matrix pointer */
uint16_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix addition */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
(pSrcA->numCols != pSrcB->numCols) ||
(pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Total number of samples in the input matrix */
numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Loop unrolling */
blkCnt = (uint32_t) numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) + B(m,n) */
/* Add, Saturate and then store the results in the destination buffer. */
*__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
*__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = (uint32_t) numSamples % 0x4u;
/* q15 pointers of input and output are initialized */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) + B(m,n) */
/* Add, Saturate and then store the results in the destination buffer. */
*pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = (uint32_t) numSamples;
/* q15 pointers of input and output are initialized */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) + B(m,n) */
/* Add, Saturate and then store the results in the destination buffer. */
*pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
/* set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixAdd group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_add_q15.c
|
C
|
apache-2.0
| 4,697
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_add_q31.c
* Description: Q31 matrix addition
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixAdd
* @{
*/
/**
* @brief Q31 matrix addition.
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
*/
arm_status arm_mat_add_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
arm_matrix_instance_q31 * pDst)
{
q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
q31_t *pOut = pDst->pData; /* output data matrix pointer */
q31_t inA1, inB1; /* temporary variables */
#if defined (ARM_MATH_DSP)
q31_t inA2, inB2; /* temporary variables */
q31_t out1, out2; /* temporary variables */
#endif // #if defined (ARM_MATH_DSP)
uint32_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix addition */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
(pSrcA->numCols != pSrcB->numCols) ||
(pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif
{
/* Total number of samples in the input matrix */
numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) + B(m,n) */
/* Add, saturate and then store the results in the destination buffer. */
/* Read values from source A */
inA1 = pIn1[0];
/* Read values from source B */
inB1 = pIn2[0];
/* Read values from source A */
inA2 = pIn1[1];
/* Add and saturate */
out1 = __QADD(inA1, inB1);
/* Read values from source B */
inB2 = pIn2[1];
/* Read values from source A */
inA1 = pIn1[2];
/* Add and saturate */
out2 = __QADD(inA2, inB2);
/* Read values from source B */
inB1 = pIn2[2];
/* Store result in destination */
pOut[0] = out1;
pOut[1] = out2;
/* Read values from source A */
inA2 = pIn1[3];
/* Read values from source B */
inB2 = pIn2[3];
/* Add and saturate */
out1 = __QADD(inA1, inB1);
out2 = __QADD(inA2, inB2);
/* Store result in destination */
pOut[2] = out1;
pOut[3] = out2;
/* update pointers to process next sampels */
pIn1 += 4u;
pIn2 += 4u;
pOut += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) + B(m,n) */
/* Add, saturate and then store the results in the destination buffer. */
inA1 = *pIn1++;
inB1 = *pIn2++;
inA1 = __QADD(inA1, inB1);
/* Decrement the loop counter */
blkCnt--;
*pOut++ = inA1;
}
/* set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixAdd group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_add_q31.c
|
C
|
apache-2.0
| 5,416
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_cmplx_mult_f32.c
* Description: Floating-point matrix multiplication
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @defgroup CmplxMatrixMult Complex Matrix Multiplication
*
* Complex Matrix multiplication is only defined if the number of columns of the
* first matrix equals the number of rows of the second matrix.
* Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
* in an <code>M x P</code> matrix.
* When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
* <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output
* matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
*/
/**
* @addtogroup CmplxMatrixMult
* @{
*/
/**
* @brief Floating-point Complex matrix multiplication.
* @param[in] *pSrcA points to the first input complex matrix structure
* @param[in] *pSrcB points to the second input complex matrix structure
* @param[out] *pDst points to output complex matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_cmplx_mult_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
arm_matrix_instance_f32 * pDst)
{
float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */
float32_t *pOut = pDst->pData; /* output data matrix pointer */
float32_t *px; /* Temporary output data matrix pointer */
uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
float32_t sumReal1, sumImag1; /* accumulator */
float32_t a0, b0, c0, d0;
float32_t a1, b1, c1, d1;
float32_t sumReal2, sumImag2; /* accumulator */
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
do
{
/* Output pointer is set to starting address of the row being processed */
px = pOut + 2 * i;
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the pSrcB data */
pIn2 = pSrcB->pData;
j = 0u;
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sumReal1 = 0.0f;
sumImag1 = 0.0f;
sumReal2 = 0.0f;
sumImag2 = 0.0f;
/* Initiate the pointer pIn1 to point to the starting address of the column being processed */
pIn1 = pInA;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
colCnt = numColsA >> 2;
/* matrix multiplication */
while (colCnt > 0u)
{
/* Reading real part of complex matrix A */
a0 = *pIn1;
/* Reading real part of complex matrix B */
c0 = *pIn2;
/* Reading imaginary part of complex matrix A */
b0 = *(pIn1 + 1u);
/* Reading imaginary part of complex matrix B */
d0 = *(pIn2 + 1u);
sumReal1 += a0 * c0;
sumImag1 += b0 * c0;
pIn1 += 2u;
pIn2 += 2 * numColsB;
sumReal2 -= b0 * d0;
sumImag2 += a0 * d0;
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
a1 = *pIn1;
c1 = *pIn2;
b1 = *(pIn1 + 1u);
d1 = *(pIn2 + 1u);
sumReal1 += a1 * c1;
sumImag1 += b1 * c1;
pIn1 += 2u;
pIn2 += 2 * numColsB;
sumReal2 -= b1 * d1;
sumImag2 += a1 * d1;
a0 = *pIn1;
c0 = *pIn2;
b0 = *(pIn1 + 1u);
d0 = *(pIn2 + 1u);
sumReal1 += a0 * c0;
sumImag1 += b0 * c0;
pIn1 += 2u;
pIn2 += 2 * numColsB;
sumReal2 -= b0 * d0;
sumImag2 += a0 * d0;
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
a1 = *pIn1;
c1 = *pIn2;
b1 = *(pIn1 + 1u);
d1 = *(pIn2 + 1u);
sumReal1 += a1 * c1;
sumImag1 += b1 * c1;
pIn1 += 2u;
pIn2 += 2 * numColsB;
sumReal2 -= b1 * d1;
sumImag2 += a1 * d1;
/* Decrement the loop count */
colCnt--;
}
/* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
** No loop unrolling is used. */
colCnt = numColsA % 0x4u;
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
a1 = *pIn1;
c1 = *pIn2;
b1 = *(pIn1 + 1u);
d1 = *(pIn2 + 1u);
sumReal1 += a1 * c1;
sumImag1 += b1 * c1;
pIn1 += 2u;
pIn2 += 2 * numColsB;
sumReal2 -= b1 * d1;
sumImag2 += a1 * d1;
/* Decrement the loop counter */
colCnt--;
}
sumReal1 += sumReal2;
sumImag1 += sumImag2;
/* Store the result in the destination buffer */
*px++ = sumReal1;
*px++ = sumImag1;
/* Update the pointer pIn2 to point to the starting address of the next column */
j++;
pIn2 = pSrcB->pData + 2u * j;
/* Decrement the column loop counter */
col--;
} while (col > 0u);
/* Update the pointer pInA to point to the starting address of the next row */
i = i + numColsB;
pInA = pInA + 2 * numColsA;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixMult group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
|
C
|
apache-2.0
| 7,897
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_cmplx_mat_mult_q15.c
* Description: Q15 complex matrix multiplication
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup CmplxMatrixMult
* @{
*/
/**
* @brief Q15 Complex matrix multiplication
* @param[in] *pSrcA points to the first input complex matrix structure
* @param[in] *pSrcB points to the second input complex matrix structure
* @param[out] *pDst points to output complex matrix structure
* @param[in] *pScratch points to the array for storing intermediate results
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* \par Conditions for optimum performance
* Input, output and state buffers should be aligned by 32-bit
*
* \par Restrictions
* If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE
* In this case input, output, scratch buffers should be aligned by 32-bit
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The function is implemented using a 64-bit internal accumulator. The inputs to the
* multiplications are in 1.15 format and multiplications yield a 2.30 result.
* The 2.30 intermediate
* results are accumulated in a 64-bit accumulator in 34.30 format. This approach
* provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
* truncated to 34.15 format by discarding the low 15 bits and then saturated to
* 1.15 format.
*
* \par
* Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function.
*
*/
arm_status arm_mat_cmplx_mult_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
arm_matrix_instance_q15 * pDst,
q15_t * pScratch)
{
/* accumulator */
q15_t *pSrcBT = pScratch; /* input data matrix pointer for transpose */
q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
q15_t *px; /* Temporary output data matrix pointer */
uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */
uint16_t col, i = 0u, row = numRowsB, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
q63_t sumReal, sumImag;
#ifdef UNALIGNED_SUPPORT_DISABLE
q15_t in; /* Temporary variable to hold the input value */
q15_t a, b, c, d;
#else
q31_t in; /* Temporary variable to hold the input value */
q31_t prod1, prod2;
q31_t pSourceA, pSourceB;
#endif
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif
{
/* Matrix transpose */
do
{
/* Apply loop unrolling and exchange the columns with row elements */
col = numColsB >> 2;
/* The pointer px is set to starting address of the column being processed */
px = pSrcBT + i;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (col > 0u)
{
#ifdef UNALIGNED_SUPPORT_DISABLE
/* Read two elements from the row */
in = *pInB++;
*px = in;
in = *pInB++;
px[1] = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB * 2;
/* Read two elements from the row */
in = *pInB++;
*px = in;
in = *pInB++;
px[1] = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB * 2;
/* Read two elements from the row */
in = *pInB++;
*px = in;
in = *pInB++;
px[1] = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB * 2;
/* Read two elements from the row */
in = *pInB++;
*px = in;
in = *pInB++;
px[1] = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB * 2;
/* Decrement the column loop counter */
col--;
}
/* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
col = numColsB % 0x4u;
while (col > 0u)
{
/* Read two elements from the row */
in = *pInB++;
*px = in;
in = *pInB++;
px[1] = in;
#else
/* Read two elements from the row */
in = *__SIMD32(pInB)++;
*__SIMD32(px) = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB * 2;
/* Read two elements from the row */
in = *__SIMD32(pInB)++;
*__SIMD32(px) = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB * 2;
/* Read two elements from the row */
in = *__SIMD32(pInB)++;
*__SIMD32(px) = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB * 2;
/* Read two elements from the row */
in = *__SIMD32(pInB)++;
*__SIMD32(px) = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB * 2;
/* Decrement the column loop counter */
col--;
}
/* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
col = numColsB % 0x4u;
while (col > 0u)
{
/* Read two elements from the row */
in = *__SIMD32(pInB)++;
*__SIMD32(px) = in;
#endif
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB * 2;
/* Decrement the column loop counter */
col--;
}
i = i + 2u;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
/* Reset the variables for the usage in the following multiplication process */
row = numRowsA;
i = 0u;
px = pDst->pData;
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
do
{
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the transposed pSrcB data */
pInB = pSrcBT;
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sumReal = 0;
sumImag = 0;
/* Apply loop unrolling and compute 2 MACs simultaneously. */
colCnt = numColsA >> 1;
/* Initiate the pointer pIn1 to point to the starting address of the column being processed */
pInA = pSrcA->pData + i * 2;
/* matrix multiplication */
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
#ifdef UNALIGNED_SUPPORT_DISABLE
/* read real and imag values from pSrcA buffer */
a = *pInA;
b = *(pInA + 1u);
/* read real and imag values from pSrcB buffer */
c = *pInB;
d = *(pInB + 1u);
/* Multiply and Accumlates */
sumReal += (q31_t) a *c;
sumImag += (q31_t) a *d;
sumReal -= (q31_t) b *d;
sumImag += (q31_t) b *c;
/* read next real and imag values from pSrcA buffer */
a = *(pInA + 2u);
b = *(pInA + 3u);
/* read next real and imag values from pSrcB buffer */
c = *(pInB + 2u);
d = *(pInB + 3u);
/* update pointer */
pInA += 4u;
/* Multiply and Accumlates */
sumReal += (q31_t) a *c;
sumImag += (q31_t) a *d;
sumReal -= (q31_t) b *d;
sumImag += (q31_t) b *c;
/* update pointer */
pInB += 4u;
#else
/* read real and imag values from pSrcA and pSrcB buffer */
pSourceA = *__SIMD32(pInA)++;
pSourceB = *__SIMD32(pInB)++;
/* Multiply and Accumlates */
#ifdef ARM_MATH_BIG_ENDIAN
prod1 = -__SMUSD(pSourceA, pSourceB);
#else
prod1 = __SMUSD(pSourceA, pSourceB);
#endif
prod2 = __SMUADX(pSourceA, pSourceB);
sumReal += (q63_t) prod1;
sumImag += (q63_t) prod2;
/* read real and imag values from pSrcA and pSrcB buffer */
pSourceA = *__SIMD32(pInA)++;
pSourceB = *__SIMD32(pInB)++;
/* Multiply and Accumlates */
#ifdef ARM_MATH_BIG_ENDIAN
prod1 = -__SMUSD(pSourceA, pSourceB);
#else
prod1 = __SMUSD(pSourceA, pSourceB);
#endif
prod2 = __SMUADX(pSourceA, pSourceB);
sumReal += (q63_t) prod1;
sumImag += (q63_t) prod2;
#endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */
/* Decrement the loop counter */
colCnt--;
}
/* process odd column samples */
if ((numColsA & 0x1u) > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
#ifdef UNALIGNED_SUPPORT_DISABLE
/* read real and imag values from pSrcA and pSrcB buffer */
a = *pInA++;
b = *pInA++;
c = *pInB++;
d = *pInB++;
/* Multiply and Accumlates */
sumReal += (q31_t) a *c;
sumImag += (q31_t) a *d;
sumReal -= (q31_t) b *d;
sumImag += (q31_t) b *c;
#else
/* read real and imag values from pSrcA and pSrcB buffer */
pSourceA = *__SIMD32(pInA)++;
pSourceB = *__SIMD32(pInB)++;
/* Multiply and Accumlates */
#ifdef ARM_MATH_BIG_ENDIAN
prod1 = -__SMUSD(pSourceA, pSourceB);
#else
prod1 = __SMUSD(pSourceA, pSourceB);
#endif
prod2 = __SMUADX(pSourceA, pSourceB);
sumReal += (q63_t) prod1;
sumImag += (q63_t) prod2;
#endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */
}
/* Saturate and store the result in the destination buffer */
*px++ = (q15_t) (__SSAT(sumReal >> 15, 16));
*px++ = (q15_t) (__SSAT(sumImag >> 15, 16));
/* Decrement the column loop counter */
col--;
} while (col > 0u);
i = i + numColsA;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
/* set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixMult group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
|
C
|
apache-2.0
| 12,450
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_cmplx_mult_q31.c
* Description: Floating-point matrix multiplication
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup CmplxMatrixMult
* @{
*/
/**
* @brief Q31 Complex matrix multiplication
* @param[in] *pSrcA points to the first input complex matrix structure
* @param[in] *pSrcB points to the second input complex matrix structure
* @param[out] *pDst points to output complex matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The function is implemented using an internal 64-bit accumulator.
* The accumulator has a 2.62 format and maintains full precision of the intermediate
* multiplication results but provides only a single guard bit. There is no saturation
* on intermediate additions. Thus, if the accumulator overflows it wraps around and
* distorts the result. The input signals should be scaled down to avoid intermediate
* overflows. The input is thus scaled down by log2(numColsA) bits
* to avoid overflows, as a total of numColsA additions are performed internally.
* The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
*
*
*/
arm_status arm_mat_cmplx_mult_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
arm_matrix_instance_q31 * pDst)
{
q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
q31_t *pOut = pDst->pData; /* output data matrix pointer */
q31_t *px; /* Temporary output data matrix pointer */
uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
q63_t sumReal1, sumImag1; /* accumulator */
q31_t a0, b0, c0, d0;
q31_t a1, b1, c1, d1;
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
do
{
/* Output pointer is set to starting address of the row being processed */
px = pOut + 2 * i;
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the pSrcB data */
pIn2 = pSrcB->pData;
j = 0u;
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sumReal1 = 0.0;
sumImag1 = 0.0;
/* Initiate the pointer pIn1 to point to the starting address of the column being processed */
pIn1 = pInA;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
colCnt = numColsA >> 2;
/* matrix multiplication */
while (colCnt > 0u)
{
/* Reading real part of complex matrix A */
a0 = *pIn1;
/* Reading real part of complex matrix B */
c0 = *pIn2;
/* Reading imaginary part of complex matrix A */
b0 = *(pIn1 + 1u);
/* Reading imaginary part of complex matrix B */
d0 = *(pIn2 + 1u);
/* Multiply and Accumlates */
sumReal1 += (q63_t) a0 *c0;
sumImag1 += (q63_t) b0 *c0;
/* update pointers */
pIn1 += 2u;
pIn2 += 2 * numColsB;
/* Multiply and Accumlates */
sumReal1 -= (q63_t) b0 *d0;
sumImag1 += (q63_t) a0 *d0;
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
/* read real and imag values from pSrcA and pSrcB buffer */
a1 = *pIn1;
c1 = *pIn2;
b1 = *(pIn1 + 1u);
d1 = *(pIn2 + 1u);
/* Multiply and Accumlates */
sumReal1 += (q63_t) a1 *c1;
sumImag1 += (q63_t) b1 *c1;
/* update pointers */
pIn1 += 2u;
pIn2 += 2 * numColsB;
/* Multiply and Accumlates */
sumReal1 -= (q63_t) b1 *d1;
sumImag1 += (q63_t) a1 *d1;
a0 = *pIn1;
c0 = *pIn2;
b0 = *(pIn1 + 1u);
d0 = *(pIn2 + 1u);
/* Multiply and Accumlates */
sumReal1 += (q63_t) a0 *c0;
sumImag1 += (q63_t) b0 *c0;
/* update pointers */
pIn1 += 2u;
pIn2 += 2 * numColsB;
/* Multiply and Accumlates */
sumReal1 -= (q63_t) b0 *d0;
sumImag1 += (q63_t) a0 *d0;
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
a1 = *pIn1;
c1 = *pIn2;
b1 = *(pIn1 + 1u);
d1 = *(pIn2 + 1u);
/* Multiply and Accumlates */
sumReal1 += (q63_t) a1 *c1;
sumImag1 += (q63_t) b1 *c1;
/* update pointers */
pIn1 += 2u;
pIn2 += 2 * numColsB;
/* Multiply and Accumlates */
sumReal1 -= (q63_t) b1 *d1;
sumImag1 += (q63_t) a1 *d1;
/* Decrement the loop count */
colCnt--;
}
/* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
** No loop unrolling is used. */
colCnt = numColsA % 0x4u;
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
a1 = *pIn1;
c1 = *pIn2;
b1 = *(pIn1 + 1u);
d1 = *(pIn2 + 1u);
/* Multiply and Accumlates */
sumReal1 += (q63_t) a1 *c1;
sumImag1 += (q63_t) b1 *c1;
/* update pointers */
pIn1 += 2u;
pIn2 += 2 * numColsB;
/* Multiply and Accumlates */
sumReal1 -= (q63_t) b1 *d1;
sumImag1 += (q63_t) a1 *d1;
/* Decrement the loop counter */
colCnt--;
}
/* Store the result in the destination buffer */
*px++ = (q31_t) clip_q63_to_q31(sumReal1 >> 31);
*px++ = (q31_t) clip_q63_to_q31(sumImag1 >> 31);
/* Update the pointer pIn2 to point to the starting address of the next column */
j++;
pIn2 = pSrcB->pData + 2u * j;
/* Decrement the column loop counter */
col--;
} while (col > 0u);
/* Update the pointer pInA to point to the starting address of the next row */
i = i + numColsB;
pInA = pInA + 2 * numColsA;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixMult group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
|
C
|
apache-2.0
| 8,659
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_init_f32.c
* Description: Floating-point matrix initialization
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @defgroup MatrixInit Matrix Initialization
*
* Initializes the underlying matrix data structure.
* The functions set the <code>numRows</code>,
* <code>numCols</code>, and <code>pData</code> fields
* of the matrix data structure.
*/
/**
* @addtogroup MatrixInit
* @{
*/
/**
* @brief Floating-point matrix initialization.
* @param[in,out] *S points to an instance of the floating-point matrix structure.
* @param[in] nRows number of rows in the matrix.
* @param[in] nColumns number of columns in the matrix.
* @param[in] *pData points to the matrix data array.
* @return none
*/
void arm_mat_init_f32(
arm_matrix_instance_f32 * S,
uint16_t nRows,
uint16_t nColumns,
float32_t * pData)
{
/* Assign Number of Rows */
S->numRows = nRows;
/* Assign Number of Columns */
S->numCols = nColumns;
/* Assign Data pointer */
S->pData = pData;
}
/**
* @} end of MatrixInit group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_init_f32.c
|
C
|
apache-2.0
| 2,087
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_init_q15.c
* Description: Q15 matrix initialization
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixInit
* @{
*/
/**
* @brief Q15 matrix initialization.
* @param[in,out] *S points to an instance of the floating-point matrix structure.
* @param[in] nRows number of rows in the matrix.
* @param[in] nColumns number of columns in the matrix.
* @param[in] *pData points to the matrix data array.
* @return none
*/
void arm_mat_init_q15(
arm_matrix_instance_q15 * S,
uint16_t nRows,
uint16_t nColumns,
q15_t * pData)
{
/* Assign Number of Rows */
S->numRows = nRows;
/* Assign Number of Columns */
S->numCols = nColumns;
/* Assign Data pointer */
S->pData = pData;
}
/**
* @} end of MatrixInit group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_init_q15.c
|
C
|
apache-2.0
| 1,817
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_init_q31.c
* Description: Q31 matrix initialization
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @defgroup MatrixInit Matrix Initialization
*
*/
/**
* @addtogroup MatrixInit
* @{
*/
/**
* @brief Q31 matrix initialization.
* @param[in,out] *S points to an instance of the floating-point matrix structure.
* @param[in] nRows number of rows in the matrix.
* @param[in] nColumns number of columns in the matrix.
* @param[in] *pData points to the matrix data array.
* @return none
*/
void arm_mat_init_q31(
arm_matrix_instance_q31 * S,
uint16_t nRows,
uint16_t nColumns,
q31_t * pData)
{
/* Assign Number of Rows */
S->numRows = nRows;
/* Assign Number of Columns */
S->numCols = nColumns;
/* Assign Data pointer */
S->pData = pData;
}
/**
* @} end of MatrixInit group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_init_q31.c
|
C
|
apache-2.0
| 1,875
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_inverse_f32.c
* Description: Floating-point matrix inverse
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @defgroup MatrixInv Matrix Inverse
*
* Computes the inverse of a matrix.
*
* The inverse is defined only if the input matrix is square and non-singular (the determinant
* is non-zero). The function checks that the input and output matrices are square and of the
* same size.
*
* Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
* inversion of floating-point matrices.
*
* \par Algorithm
* The Gauss-Jordan method is used to find the inverse.
* The algorithm performs a sequence of elementary row-operations until it
* reduces the input matrix to an identity matrix. Applying the same sequence
* of elementary row-operations to an identity matrix yields the inverse matrix.
* If the input matrix is singular, then the algorithm terminates and returns error status
* <code>ARM_MATH_SINGULAR</code>.
* \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
*/
/**
* @addtogroup MatrixInv
* @{
*/
/**
* @brief Floating-point matrix inverse.
* @param[in] *pSrc points to input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns
* <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size
* of the output matrix does not match the size of the input matrix.
* If the input matrix is found to be singular (non-invertible), then the function returns
* <code>ARM_MATH_SINGULAR</code>. Otherwise, the function returns <code>ARM_MATH_SUCCESS</code>.
*/
arm_status arm_mat_inverse_f32(
const arm_matrix_instance_f32 * pSrc,
arm_matrix_instance_f32 * pDst)
{
float32_t *pIn = pSrc->pData; /* input data matrix pointer */
float32_t *pOut = pDst->pData; /* output data matrix pointer */
float32_t *pInT1, *pInT2; /* Temporary input data matrix pointer */
float32_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */
float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data matrix pointer */
uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */
uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */
#if defined (ARM_MATH_DSP)
float32_t maxC; /* maximum value in the column */
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t Xchg, in = 0.0f, in1; /* Temporary input values */
uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l; /* loop counters */
arm_status status; /* status of matrix inverse */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
|| (pSrc->numRows != pDst->numRows))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/*--------------------------------------------------------------------------------------------------------------
* Matrix Inverse can be solved using elementary row operations.
*
* Gauss-Jordan Method:
*
* 1. First combine the identity matrix and the input matrix separated by a bar to form an
* augmented matrix as follows:
* _ _ _ _
* | a11 a12 | 1 0 | | X11 X12 |
* | | | = | |
* |_ a21 a22 | 0 1 _| |_ X21 X21 _|
*
* 2. In our implementation, pDst Matrix is used as identity matrix.
*
* 3. Begin with the first row. Let i = 1.
*
* 4. Check to see if the pivot for column i is the greatest of the column.
* The pivot is the element of the main diagonal that is on the current row.
* For instance, if working with row i, then the pivot element is aii.
* If the pivot is not the most significant of the columns, exchange that row with a row
* below it that does contain the most significant value in column i. If the most
* significant value of the column is zero, then an inverse to that matrix does not exist.
* The most significant value of the column is the absolute maximum.
*
* 5. Divide every element of row i by the pivot.
*
* 6. For every row below and row i, replace that row with the sum of that row and
* a multiple of row i so that each new element in column i below row i is zero.
*
* 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
* for every element below and above the main diagonal.
*
* 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
* Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
*----------------------------------------------------------------------------------------------------------------*/
/* Working pointer for destination matrix */
pOutT1 = pOut;
/* Loop over the number of rows */
rowCnt = numRows;
/* Making the destination matrix as identity matrix */
while (rowCnt > 0u)
{
/* Writing all zeroes in lower triangle of the destination matrix */
j = numRows - rowCnt;
while (j > 0u)
{
*pOutT1++ = 0.0f;
j--;
}
/* Writing all ones in the diagonal of the destination matrix */
*pOutT1++ = 1.0f;
/* Writing all zeroes in upper triangle of the destination matrix */
j = rowCnt - 1u;
while (j > 0u)
{
*pOutT1++ = 0.0f;
j--;
}
/* Decrement the loop counter */
rowCnt--;
}
/* Loop over the number of columns of the input matrix.
All the elements in each column are processed by the row operations */
loopCnt = numCols;
/* Index modifier to navigate through the columns */
l = 0u;
while (loopCnt > 0u)
{
/* Check if the pivot element is zero..
* If it is zero then interchange the row with non zero row below.
* If there is no non zero element to replace in the rows below,
* then the matrix is Singular. */
/* Working pointer for the input matrix that points
* to the pivot element of the particular row */
pInT1 = pIn + (l * numCols);
/* Working pointer for the destination matrix that points
* to the pivot element of the particular row */
pOutT1 = pOut + (l * numCols);
/* Temporary variable to hold the pivot value */
in = *pInT1;
/* Grab the most significant value from column l */
maxC = 0;
for (i = l; i < numRows; i++)
{
maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
pInT1 += numCols;
}
/* Update the status if the matrix is singular */
if (maxC == 0.0f)
{
return ARM_MATH_SINGULAR;
}
/* Restore pInT1 */
pInT1 = pIn;
/* Destination pointer modifier */
k = 1u;
/* Check if the pivot element is the most significant of the column */
if ( (in > 0.0f ? in : -in) != maxC)
{
/* Loop over the number rows present below */
i = numRows - (l + 1u);
while (i > 0u)
{
/* Update the input and destination pointers */
pInT2 = pInT1 + (numCols * l);
pOutT2 = pOutT1 + (numCols * k);
/* Look for the most significant element to
* replace in the rows below */
if ((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
{
/* Loop over number of columns
* to the right of the pilot element */
j = numCols - l;
while (j > 0u)
{
/* Exchange the row elements of the input matrix */
Xchg = *pInT2;
*pInT2++ = *pInT1;
*pInT1++ = Xchg;
/* Decrement the loop counter */
j--;
}
/* Loop over number of columns of the destination matrix */
j = numCols;
while (j > 0u)
{
/* Exchange the row elements of the destination matrix */
Xchg = *pOutT2;
*pOutT2++ = *pOutT1;
*pOutT1++ = Xchg;
/* Decrement the loop counter */
j--;
}
/* Flag to indicate whether exchange is done or not */
flag = 1u;
/* Break after exchange is done */
break;
}
/* Update the destination pointer modifier */
k++;
/* Decrement the loop counter */
i--;
}
}
/* Update the status if the matrix is singular */
if ((flag != 1u) && (in == 0.0f))
{
return ARM_MATH_SINGULAR;
}
/* Points to the pivot row of input and destination matrices */
pPivotRowIn = pIn + (l * numCols);
pPivotRowDst = pOut + (l * numCols);
/* Temporary pointers to the pivot row pointers */
pInT1 = pPivotRowIn;
pInT2 = pPivotRowDst;
/* Pivot element of the row */
in = *pPivotRowIn;
/* Loop over number of columns
* to the right of the pilot element */
j = (numCols - l);
while (j > 0u)
{
/* Divide each element of the row of the input matrix
* by the pivot element */
in1 = *pInT1;
*pInT1++ = in1 / in;
/* Decrement the loop counter */
j--;
}
/* Loop over number of columns of the destination matrix */
j = numCols;
while (j > 0u)
{
/* Divide each element of the row of the destination matrix
* by the pivot element */
in1 = *pInT2;
*pInT2++ = in1 / in;
/* Decrement the loop counter */
j--;
}
/* Replace the rows with the sum of that row and a multiple of row i
* so that each new element in column i above row i is zero.*/
/* Temporary pointers for input and destination matrices */
pInT1 = pIn;
pInT2 = pOut;
/* index used to check for pivot element */
i = 0u;
/* Loop over number of rows */
/* to be replaced by the sum of that row and a multiple of row i */
k = numRows;
while (k > 0u)
{
/* Check for the pivot element */
if (i == l)
{
/* If the processing element is the pivot element,
only the columns to the right are to be processed */
pInT1 += numCols - l;
pInT2 += numCols;
}
else
{
/* Element of the reference row */
in = *pInT1;
/* Working pointers for input and destination pivot rows */
pPRT_in = pPivotRowIn;
pPRT_pDst = pPivotRowDst;
/* Loop over the number of columns to the right of the pivot element,
to replace the elements in the input matrix */
j = (numCols - l);
while (j > 0u)
{
/* Replace the element by the sum of that row
and a multiple of the reference row */
in1 = *pInT1;
*pInT1++ = in1 - (in * *pPRT_in++);
/* Decrement the loop counter */
j--;
}
/* Loop over the number of columns to
replace the elements in the destination matrix */
j = numCols;
while (j > 0u)
{
/* Replace the element by the sum of that row
and a multiple of the reference row */
in1 = *pInT2;
*pInT2++ = in1 - (in * *pPRT_pDst++);
/* Decrement the loop counter */
j--;
}
}
/* Increment the temporary input pointer */
pInT1 = pInT1 + l;
/* Decrement the loop counter */
k--;
/* Increment the pivot index */
i++;
}
/* Increment the input pointer */
pIn++;
/* Decrement the loop counter */
loopCnt--;
/* Increment the index modifier */
l++;
}
#else
/* Run the below code for Cortex-M0 */
float32_t Xchg, in = 0.0f; /* Temporary input values */
uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l; /* loop counters */
arm_status status; /* status of matrix inverse */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
|| (pSrc->numRows != pDst->numRows))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/*--------------------------------------------------------------------------------------------------------------
* Matrix Inverse can be solved using elementary row operations.
*
* Gauss-Jordan Method:
*
* 1. First combine the identity matrix and the input matrix separated by a bar to form an
* augmented matrix as follows:
* _ _ _ _ _ _ _ _
* | | a11 a12 | | | 1 0 | | | X11 X12 |
* | | | | | | | = | |
* |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _|
*
* 2. In our implementation, pDst Matrix is used as identity matrix.
*
* 3. Begin with the first row. Let i = 1.
*
* 4. Check to see if the pivot for row i is zero.
* The pivot is the element of the main diagonal that is on the current row.
* For instance, if working with row i, then the pivot element is aii.
* If the pivot is zero, exchange that row with a row below it that does not
* contain a zero in column i. If this is not possible, then an inverse
* to that matrix does not exist.
*
* 5. Divide every element of row i by the pivot.
*
* 6. For every row below and row i, replace that row with the sum of that row and
* a multiple of row i so that each new element in column i below row i is zero.
*
* 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
* for every element below and above the main diagonal.
*
* 8. Now an identical matrix is formed to the left of the bar(input matrix, src).
* Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
*----------------------------------------------------------------------------------------------------------------*/
/* Working pointer for destination matrix */
pOutT1 = pOut;
/* Loop over the number of rows */
rowCnt = numRows;
/* Making the destination matrix as identity matrix */
while (rowCnt > 0u)
{
/* Writing all zeroes in lower triangle of the destination matrix */
j = numRows - rowCnt;
while (j > 0u)
{
*pOutT1++ = 0.0f;
j--;
}
/* Writing all ones in the diagonal of the destination matrix */
*pOutT1++ = 1.0f;
/* Writing all zeroes in upper triangle of the destination matrix */
j = rowCnt - 1u;
while (j > 0u)
{
*pOutT1++ = 0.0f;
j--;
}
/* Decrement the loop counter */
rowCnt--;
}
/* Loop over the number of columns of the input matrix.
All the elements in each column are processed by the row operations */
loopCnt = numCols;
/* Index modifier to navigate through the columns */
l = 0u;
//for(loopCnt = 0u; loopCnt < numCols; loopCnt++)
while (loopCnt > 0u)
{
/* Check if the pivot element is zero..
* If it is zero then interchange the row with non zero row below.
* If there is no non zero element to replace in the rows below,
* then the matrix is Singular. */
/* Working pointer for the input matrix that points
* to the pivot element of the particular row */
pInT1 = pIn + (l * numCols);
/* Working pointer for the destination matrix that points
* to the pivot element of the particular row */
pOutT1 = pOut + (l * numCols);
/* Temporary variable to hold the pivot value */
in = *pInT1;
/* Destination pointer modifier */
k = 1u;
/* Check if the pivot element is zero */
if (*pInT1 == 0.0f)
{
/* Loop over the number rows present below */
for (i = (l + 1u); i < numRows; i++)
{
/* Update the input and destination pointers */
pInT2 = pInT1 + (numCols * l);
pOutT2 = pOutT1 + (numCols * k);
/* Check if there is a non zero pivot element to
* replace in the rows below */
if (*pInT2 != 0.0f)
{
/* Loop over number of columns
* to the right of the pilot element */
for (j = 0u; j < (numCols - l); j++)
{
/* Exchange the row elements of the input matrix */
Xchg = *pInT2;
*pInT2++ = *pInT1;
*pInT1++ = Xchg;
}
for (j = 0u; j < numCols; j++)
{
Xchg = *pOutT2;
*pOutT2++ = *pOutT1;
*pOutT1++ = Xchg;
}
/* Flag to indicate whether exchange is done or not */
flag = 1u;
/* Break after exchange is done */
break;
}
/* Update the destination pointer modifier */
k++;
}
}
/* Update the status if the matrix is singular */
if ((flag != 1u) && (in == 0.0f))
{
return ARM_MATH_SINGULAR;
}
/* Points to the pivot row of input and destination matrices */
pPivotRowIn = pIn + (l * numCols);
pPivotRowDst = pOut + (l * numCols);
/* Temporary pointers to the pivot row pointers */
pInT1 = pPivotRowIn;
pOutT1 = pPivotRowDst;
/* Pivot element of the row */
in = *(pIn + (l * numCols));
/* Loop over number of columns
* to the right of the pilot element */
for (j = 0u; j < (numCols - l); j++)
{
/* Divide each element of the row of the input matrix
* by the pivot element */
*pInT1 = *pInT1 / in;
pInT1++;
}
for (j = 0u; j < numCols; j++)
{
/* Divide each element of the row of the destination matrix
* by the pivot element */
*pOutT1 = *pOutT1 / in;
pOutT1++;
}
/* Replace the rows with the sum of that row and a multiple of row i
* so that each new element in column i above row i is zero.*/
/* Temporary pointers for input and destination matrices */
pInT1 = pIn;
pOutT1 = pOut;
for (i = 0u; i < numRows; i++)
{
/* Check for the pivot element */
if (i == l)
{
/* If the processing element is the pivot element,
only the columns to the right are to be processed */
pInT1 += numCols - l;
pOutT1 += numCols;
}
else
{
/* Element of the reference row */
in = *pInT1;
/* Working pointers for input and destination pivot rows */
pPRT_in = pPivotRowIn;
pPRT_pDst = pPivotRowDst;
/* Loop over the number of columns to the right of the pivot element,
to replace the elements in the input matrix */
for (j = 0u; j < (numCols - l); j++)
{
/* Replace the element by the sum of that row
and a multiple of the reference row */
*pInT1 = *pInT1 - (in * *pPRT_in++);
pInT1++;
}
/* Loop over the number of columns to
replace the elements in the destination matrix */
for (j = 0u; j < numCols; j++)
{
/* Replace the element by the sum of that row
and a multiple of the reference row */
*pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
pOutT1++;
}
}
/* Increment the temporary input pointer */
pInT1 = pInT1 + l;
}
/* Increment the input pointer */
pIn++;
/* Decrement the loop counter */
loopCnt--;
/* Increment the index modifier */
l++;
}
#endif /* #if defined (ARM_MATH_DSP) */
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
if ((flag != 1u) && (in == 0.0f))
{
pIn = pSrc->pData;
for (i = 0; i < numRows * numCols; i++)
{
if (pIn[i] != 0.0f)
break;
}
if (i == numRows * numCols)
status = ARM_MATH_SINGULAR;
}
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixInv group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_inverse_f32.c
|
C
|
apache-2.0
| 22,018
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_inverse_f64.c
* Description: Floating-point matrix inverse
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @defgroup MatrixInv Matrix Inverse
*
* Computes the inverse of a matrix.
*
* The inverse is defined only if the input matrix is square and non-singular (the determinant
* is non-zero). The function checks that the input and output matrices are square and of the
* same size.
*
* Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
* inversion of floating-point matrices.
*
* \par Algorithm
* The Gauss-Jordan method is used to find the inverse.
* The algorithm performs a sequence of elementary row-operations until it
* reduces the input matrix to an identity matrix. Applying the same sequence
* of elementary row-operations to an identity matrix yields the inverse matrix.
* If the input matrix is singular, then the algorithm terminates and returns error status
* <code>ARM_MATH_SINGULAR</code>.
* \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
*/
/**
* @addtogroup MatrixInv
* @{
*/
/**
* @brief Floating-point matrix inverse.
* @param[in] *pSrc points to input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns
* <code>ARM_MATH_SIZE_MISMATCH</code> if the input matrix is not square or if the size
* of the output matrix does not match the size of the input matrix.
* If the input matrix is found to be singular (non-invertible), then the function returns
* <code>ARM_MATH_SINGULAR</code>. Otherwise, the function returns <code>ARM_MATH_SUCCESS</code>.
*/
arm_status arm_mat_inverse_f64(
const arm_matrix_instance_f64 * pSrc,
arm_matrix_instance_f64 * pDst)
{
float64_t *pIn = pSrc->pData; /* input data matrix pointer */
float64_t *pOut = pDst->pData; /* output data matrix pointer */
float64_t *pInT1, *pInT2; /* Temporary input data matrix pointer */
float64_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */
float64_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst; /* Temporary input and output data matrix pointer */
uint32_t numRows = pSrc->numRows; /* Number of rows in the matrix */
uint32_t numCols = pSrc->numCols; /* Number of Cols in the matrix */
#if defined (ARM_MATH_DSP)
float64_t maxC; /* maximum value in the column */
/* Run the below code for Cortex-M4 and Cortex-M3 */
float64_t Xchg, in = 0.0f, in1; /* Temporary input values */
uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l; /* loop counters */
arm_status status; /* status of matrix inverse */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
|| (pSrc->numRows != pDst->numRows))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/*--------------------------------------------------------------------------------------------------------------
* Matrix Inverse can be solved using elementary row operations.
*
* Gauss-Jordan Method:
*
* 1. First combine the identity matrix and the input matrix separated by a bar to form an
* augmented matrix as follows:
* _ _ _ _
* | a11 a12 | 1 0 | | X11 X12 |
* | | | = | |
* |_ a21 a22 | 0 1 _| |_ X21 X21 _|
*
* 2. In our implementation, pDst Matrix is used as identity matrix.
*
* 3. Begin with the first row. Let i = 1.
*
* 4. Check to see if the pivot for column i is the greatest of the column.
* The pivot is the element of the main diagonal that is on the current row.
* For instance, if working with row i, then the pivot element is aii.
* If the pivot is not the most significant of the columns, exchange that row with a row
* below it that does contain the most significant value in column i. If the most
* significant value of the column is zero, then an inverse to that matrix does not exist.
* The most significant value of the column is the absolute maximum.
*
* 5. Divide every element of row i by the pivot.
*
* 6. For every row below and row i, replace that row with the sum of that row and
* a multiple of row i so that each new element in column i below row i is zero.
*
* 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
* for every element below and above the main diagonal.
*
* 8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
* Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
*----------------------------------------------------------------------------------------------------------------*/
/* Working pointer for destination matrix */
pOutT1 = pOut;
/* Loop over the number of rows */
rowCnt = numRows;
/* Making the destination matrix as identity matrix */
while (rowCnt > 0u)
{
/* Writing all zeroes in lower triangle of the destination matrix */
j = numRows - rowCnt;
while (j > 0u)
{
*pOutT1++ = 0.0f;
j--;
}
/* Writing all ones in the diagonal of the destination matrix */
*pOutT1++ = 1.0f;
/* Writing all zeroes in upper triangle of the destination matrix */
j = rowCnt - 1u;
while (j > 0u)
{
*pOutT1++ = 0.0f;
j--;
}
/* Decrement the loop counter */
rowCnt--;
}
/* Loop over the number of columns of the input matrix.
All the elements in each column are processed by the row operations */
loopCnt = numCols;
/* Index modifier to navigate through the columns */
l = 0u;
while (loopCnt > 0u)
{
/* Check if the pivot element is zero..
* If it is zero then interchange the row with non zero row below.
* If there is no non zero element to replace in the rows below,
* then the matrix is Singular. */
/* Working pointer for the input matrix that points
* to the pivot element of the particular row */
pInT1 = pIn + (l * numCols);
/* Working pointer for the destination matrix that points
* to the pivot element of the particular row */
pOutT1 = pOut + (l * numCols);
/* Temporary variable to hold the pivot value */
in = *pInT1;
/* Grab the most significant value from column l */
maxC = 0;
for (i = l; i < numRows; i++)
{
maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
pInT1 += numCols;
}
/* Update the status if the matrix is singular */
if (maxC == 0.0f)
{
return ARM_MATH_SINGULAR;
}
/* Restore pInT1 */
pInT1 = pIn;
/* Destination pointer modifier */
k = 1u;
/* Check if the pivot element is the most significant of the column */
if ( (in > 0.0f ? in : -in) != maxC)
{
/* Loop over the number rows present below */
i = numRows - (l + 1u);
while (i > 0u)
{
/* Update the input and destination pointers */
pInT2 = pInT1 + (numCols * l);
pOutT2 = pOutT1 + (numCols * k);
/* Look for the most significant element to
* replace in the rows below */
if ((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
{
/* Loop over number of columns
* to the right of the pilot element */
j = numCols - l;
while (j > 0u)
{
/* Exchange the row elements of the input matrix */
Xchg = *pInT2;
*pInT2++ = *pInT1;
*pInT1++ = Xchg;
/* Decrement the loop counter */
j--;
}
/* Loop over number of columns of the destination matrix */
j = numCols;
while (j > 0u)
{
/* Exchange the row elements of the destination matrix */
Xchg = *pOutT2;
*pOutT2++ = *pOutT1;
*pOutT1++ = Xchg;
/* Decrement the loop counter */
j--;
}
/* Flag to indicate whether exchange is done or not */
flag = 1u;
/* Break after exchange is done */
break;
}
/* Update the destination pointer modifier */
k++;
/* Decrement the loop counter */
i--;
}
}
/* Update the status if the matrix is singular */
if ((flag != 1u) && (in == 0.0f))
{
return ARM_MATH_SINGULAR;
}
/* Points to the pivot row of input and destination matrices */
pPivotRowIn = pIn + (l * numCols);
pPivotRowDst = pOut + (l * numCols);
/* Temporary pointers to the pivot row pointers */
pInT1 = pPivotRowIn;
pInT2 = pPivotRowDst;
/* Pivot element of the row */
in = *pPivotRowIn;
/* Loop over number of columns
* to the right of the pilot element */
j = (numCols - l);
while (j > 0u)
{
/* Divide each element of the row of the input matrix
* by the pivot element */
in1 = *pInT1;
*pInT1++ = in1 / in;
/* Decrement the loop counter */
j--;
}
/* Loop over number of columns of the destination matrix */
j = numCols;
while (j > 0u)
{
/* Divide each element of the row of the destination matrix
* by the pivot element */
in1 = *pInT2;
*pInT2++ = in1 / in;
/* Decrement the loop counter */
j--;
}
/* Replace the rows with the sum of that row and a multiple of row i
* so that each new element in column i above row i is zero.*/
/* Temporary pointers for input and destination matrices */
pInT1 = pIn;
pInT2 = pOut;
/* index used to check for pivot element */
i = 0u;
/* Loop over number of rows */
/* to be replaced by the sum of that row and a multiple of row i */
k = numRows;
while (k > 0u)
{
/* Check for the pivot element */
if (i == l)
{
/* If the processing element is the pivot element,
only the columns to the right are to be processed */
pInT1 += numCols - l;
pInT2 += numCols;
}
else
{
/* Element of the reference row */
in = *pInT1;
/* Working pointers for input and destination pivot rows */
pPRT_in = pPivotRowIn;
pPRT_pDst = pPivotRowDst;
/* Loop over the number of columns to the right of the pivot element,
to replace the elements in the input matrix */
j = (numCols - l);
while (j > 0u)
{
/* Replace the element by the sum of that row
and a multiple of the reference row */
in1 = *pInT1;
*pInT1++ = in1 - (in * *pPRT_in++);
/* Decrement the loop counter */
j--;
}
/* Loop over the number of columns to
replace the elements in the destination matrix */
j = numCols;
while (j > 0u)
{
/* Replace the element by the sum of that row
and a multiple of the reference row */
in1 = *pInT2;
*pInT2++ = in1 - (in * *pPRT_pDst++);
/* Decrement the loop counter */
j--;
}
}
/* Increment the temporary input pointer */
pInT1 = pInT1 + l;
/* Decrement the loop counter */
k--;
/* Increment the pivot index */
i++;
}
/* Increment the input pointer */
pIn++;
/* Decrement the loop counter */
loopCnt--;
/* Increment the index modifier */
l++;
}
#else
/* Run the below code for Cortex-M0 */
float64_t Xchg, in = 0.0f; /* Temporary input values */
uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l; /* loop counters */
arm_status status; /* status of matrix inverse */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
|| (pSrc->numRows != pDst->numRows))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/*--------------------------------------------------------------------------------------------------------------
* Matrix Inverse can be solved using elementary row operations.
*
* Gauss-Jordan Method:
*
* 1. First combine the identity matrix and the input matrix separated by a bar to form an
* augmented matrix as follows:
* _ _ _ _ _ _ _ _
* | | a11 a12 | | | 1 0 | | | X11 X12 |
* | | | | | | | = | |
* |_ |_ a21 a22 _| | |_0 1 _| _| |_ X21 X21 _|
*
* 2. In our implementation, pDst Matrix is used as identity matrix.
*
* 3. Begin with the first row. Let i = 1.
*
* 4. Check to see if the pivot for row i is zero.
* The pivot is the element of the main diagonal that is on the current row.
* For instance, if working with row i, then the pivot element is aii.
* If the pivot is zero, exchange that row with a row below it that does not
* contain a zero in column i. If this is not possible, then an inverse
* to that matrix does not exist.
*
* 5. Divide every element of row i by the pivot.
*
* 6. For every row below and row i, replace that row with the sum of that row and
* a multiple of row i so that each new element in column i below row i is zero.
*
* 7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
* for every element below and above the main diagonal.
*
* 8. Now an identical matrix is formed to the left of the bar(input matrix, src).
* Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
*----------------------------------------------------------------------------------------------------------------*/
/* Working pointer for destination matrix */
pOutT1 = pOut;
/* Loop over the number of rows */
rowCnt = numRows;
/* Making the destination matrix as identity matrix */
while (rowCnt > 0u)
{
/* Writing all zeroes in lower triangle of the destination matrix */
j = numRows - rowCnt;
while (j > 0u)
{
*pOutT1++ = 0.0f;
j--;
}
/* Writing all ones in the diagonal of the destination matrix */
*pOutT1++ = 1.0f;
/* Writing all zeroes in upper triangle of the destination matrix */
j = rowCnt - 1u;
while (j > 0u)
{
*pOutT1++ = 0.0f;
j--;
}
/* Decrement the loop counter */
rowCnt--;
}
/* Loop over the number of columns of the input matrix.
All the elements in each column are processed by the row operations */
loopCnt = numCols;
/* Index modifier to navigate through the columns */
l = 0u;
//for(loopCnt = 0u; loopCnt < numCols; loopCnt++)
while (loopCnt > 0u)
{
/* Check if the pivot element is zero..
* If it is zero then interchange the row with non zero row below.
* If there is no non zero element to replace in the rows below,
* then the matrix is Singular. */
/* Working pointer for the input matrix that points
* to the pivot element of the particular row */
pInT1 = pIn + (l * numCols);
/* Working pointer for the destination matrix that points
* to the pivot element of the particular row */
pOutT1 = pOut + (l * numCols);
/* Temporary variable to hold the pivot value */
in = *pInT1;
/* Destination pointer modifier */
k = 1u;
/* Check if the pivot element is zero */
if (*pInT1 == 0.0f)
{
/* Loop over the number rows present below */
for (i = (l + 1u); i < numRows; i++)
{
/* Update the input and destination pointers */
pInT2 = pInT1 + (numCols * l);
pOutT2 = pOutT1 + (numCols * k);
/* Check if there is a non zero pivot element to
* replace in the rows below */
if (*pInT2 != 0.0f)
{
/* Loop over number of columns
* to the right of the pilot element */
for (j = 0u; j < (numCols - l); j++)
{
/* Exchange the row elements of the input matrix */
Xchg = *pInT2;
*pInT2++ = *pInT1;
*pInT1++ = Xchg;
}
for (j = 0u; j < numCols; j++)
{
Xchg = *pOutT2;
*pOutT2++ = *pOutT1;
*pOutT1++ = Xchg;
}
/* Flag to indicate whether exchange is done or not */
flag = 1u;
/* Break after exchange is done */
break;
}
/* Update the destination pointer modifier */
k++;
}
}
/* Update the status if the matrix is singular */
if ((flag != 1u) && (in == 0.0f))
{
return ARM_MATH_SINGULAR;
}
/* Points to the pivot row of input and destination matrices */
pPivotRowIn = pIn + (l * numCols);
pPivotRowDst = pOut + (l * numCols);
/* Temporary pointers to the pivot row pointers */
pInT1 = pPivotRowIn;
pOutT1 = pPivotRowDst;
/* Pivot element of the row */
in = *(pIn + (l * numCols));
/* Loop over number of columns
* to the right of the pilot element */
for (j = 0u; j < (numCols - l); j++)
{
/* Divide each element of the row of the input matrix
* by the pivot element */
*pInT1 = *pInT1 / in;
pInT1++;
}
for (j = 0u; j < numCols; j++)
{
/* Divide each element of the row of the destination matrix
* by the pivot element */
*pOutT1 = *pOutT1 / in;
pOutT1++;
}
/* Replace the rows with the sum of that row and a multiple of row i
* so that each new element in column i above row i is zero.*/
/* Temporary pointers for input and destination matrices */
pInT1 = pIn;
pOutT1 = pOut;
for (i = 0u; i < numRows; i++)
{
/* Check for the pivot element */
if (i == l)
{
/* If the processing element is the pivot element,
only the columns to the right are to be processed */
pInT1 += numCols - l;
pOutT1 += numCols;
}
else
{
/* Element of the reference row */
in = *pInT1;
/* Working pointers for input and destination pivot rows */
pPRT_in = pPivotRowIn;
pPRT_pDst = pPivotRowDst;
/* Loop over the number of columns to the right of the pivot element,
to replace the elements in the input matrix */
for (j = 0u; j < (numCols - l); j++)
{
/* Replace the element by the sum of that row
and a multiple of the reference row */
*pInT1 = *pInT1 - (in * *pPRT_in++);
pInT1++;
}
/* Loop over the number of columns to
replace the elements in the destination matrix */
for (j = 0u; j < numCols; j++)
{
/* Replace the element by the sum of that row
and a multiple of the reference row */
*pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
pOutT1++;
}
}
/* Increment the temporary input pointer */
pInT1 = pInT1 + l;
}
/* Increment the input pointer */
pIn++;
/* Decrement the loop counter */
loopCnt--;
/* Increment the index modifier */
l++;
}
#endif /* #if defined (ARM_MATH_DSP) */
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
if ((flag != 1u) && (in == 0.0f))
{
pIn = pSrc->pData;
for (i = 0; i < numRows * numCols; i++)
{
if (pIn[i] != 0.0f)
break;
}
if (i == numRows * numCols)
status = ARM_MATH_SINGULAR;
}
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixInv group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_inverse_f64.c
|
C
|
apache-2.0
| 22,018
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_mult_f32.c
* Description: Floating-point matrix multiplication
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @defgroup MatrixMult Matrix Multiplication
*
* Multiplies two matrices.
*
* \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"
* Matrix multiplication is only defined if the number of columns of the
* first matrix equals the number of rows of the second matrix.
* Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
* in an <code>M x P</code> matrix.
* When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
* <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output
* matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
*/
/**
* @addtogroup MatrixMult
* @{
*/
/**
* @brief Floating-point matrix multiplication.
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_mult_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
arm_matrix_instance_f32 * pDst)
{
float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
float32_t *pInA = pSrcA->pData; /* input data matrix pointer A */
float32_t *pOut = pDst->pData; /* output data matrix pointer */
float32_t *px; /* Temporary output data matrix pointer */
float32_t sum; /* Accumulator */
uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t in1, in2, in3, in4;
uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
do
{
/* Output pointer is set to starting address of the row being processed */
px = pOut + i;
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the pSrcB data */
pIn2 = pSrcB->pData;
j = 0u;
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0.0f;
/* Initiate the pointer pIn1 to point to the starting address of the column being processed */
pIn1 = pInA;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
colCnt = numColsA >> 2u;
/* matrix multiplication */
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
in3 = *pIn2;
pIn2 += numColsB;
in1 = pIn1[0];
in2 = pIn1[1];
sum += in1 * in3;
in4 = *pIn2;
pIn2 += numColsB;
sum += in2 * in4;
in3 = *pIn2;
pIn2 += numColsB;
in1 = pIn1[2];
in2 = pIn1[3];
sum += in1 * in3;
in4 = *pIn2;
pIn2 += numColsB;
sum += in2 * in4;
pIn1 += 4u;
/* Decrement the loop count */
colCnt--;
}
/* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
** No loop unrolling is used. */
colCnt = numColsA % 0x4u;
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
sum += *pIn1++ * (*pIn2);
pIn2 += numColsB;
/* Decrement the loop counter */
colCnt--;
}
/* Store the result in the destination buffer */
*px++ = sum;
/* Update the pointer pIn2 to point to the starting address of the next column */
j++;
pIn2 = pSrcB->pData + j;
/* Decrement the column loop counter */
col--;
} while (col > 0u);
#else
/* Run the below code for Cortex-M0 */
float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */
uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pInA with each column in pInB */
/* row loop */
do
{
/* Output pointer is set to starting address of the row being processed */
px = pOut + i;
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the pSrcB data */
pIn2 = pSrcB->pData;
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0.0f;
/* Initialize the pointer pIn1 to point to the starting address of the row being processed */
pIn1 = pInA;
/* Matrix A columns number of MAC operations are to be performed */
colCnt = numColsA;
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
sum += *pIn1++ * (*pIn2);
pIn2 += numColsB;
/* Decrement the loop counter */
colCnt--;
}
/* Store the result in the destination buffer */
*px++ = sum;
/* Decrement the column loop counter */
col--;
/* Update the pointer pIn2 to point to the starting address of the next column */
pIn2 = pInB + (numColsB - col);
} while (col > 0u);
#endif /* #if defined (ARM_MATH_DSP) */
/* Update the pointer pInA to point to the starting address of the next row */
i = i + numColsB;
pInA = pInA + numColsA;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixMult group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_mult_f32.c
|
C
|
apache-2.0
| 8,539
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_mult_fast_q15.c
* Description: Q15 matrix multiplication (fast variant)
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixMult
* @{
*/
/**
* @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @param[in] *pState points to the array for storing intermediate results
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The difference between the function arm_mat_mult_q15() and this fast variant is that
* the fast variant use a 32-bit rather than a 64-bit accumulator.
* The result of each 1.15 x 1.15 multiplication is truncated to
* 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
* format. Finally, the accumulator is saturated and converted to a 1.15 result.
*
* \par
* The fast version has the same overflow behavior as the standard version but provides
* less precision since it discards the low 16 bits of each multiplication result.
* In order to avoid overflows completely the input signals must be scaled down.
* Scale down one of the input matrices by log2(numColsA) bits to
* avoid overflows, as a total of numColsA additions are computed internally for each
* output element.
*
* \par
* See <code>arm_mat_mult_q15()</code> for a slower implementation of this function
* which uses 64-bit accumulation to provide higher precision.
*/
arm_status arm_mat_mult_fast_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
arm_matrix_instance_q15 * pDst,
q15_t * pState)
{
q31_t sum; /* accumulator */
q15_t *pSrcBT = pState; /* input data matrix pointer for transpose */
q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
q15_t *px; /* Temporary output data matrix pointer */
uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */
uint32_t col, i = 0u, row = numRowsB, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
#ifndef UNALIGNED_SUPPORT_DISABLE
q31_t in; /* Temporary variable to hold the input value */
q31_t inA1, inA2, inB1, inB2;
q31_t sum2, sum3, sum4;
q15_t *pInA2, *pInB2, *px2;
uint32_t j = 0;
#else
q15_t in; /* Temporary variable to hold the input value */
q15_t inA1, inA2, inB1, inB2;
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif
{
/* Matrix transpose */
do
{
/* Apply loop unrolling and exchange the columns with row elements */
col = numColsB >> 2;
/* The pointer px is set to starting address of the column being processed */
px = pSrcBT + i;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (col > 0u)
{
#ifndef UNALIGNED_SUPPORT_DISABLE
/* Read two elements from the row */
in = *__SIMD32(pInB)++;
/* Unpack and store one element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*px = (q15_t) in;
#else
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Unpack and store the second element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#else
*px = (q15_t) in;
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Read two elements from the row */
in = *__SIMD32(pInB)++;
/* Unpack and store one element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*px = (q15_t) in;
#else
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Unpack and store the second element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#else
*px = (q15_t) in;
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
#else
/* Read one element from the row */
in = *pInB++;
/* Store one element in the destination */
*px = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Read one element from the row */
in = *pInB++;
/* Store one element in the destination */
*px = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Read one element from the row */
in = *pInB++;
/* Store one element in the destination */
*px = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Read one element from the row */
in = *pInB++;
/* Store one element in the destination */
*px = in;
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Decrement the column loop counter */
col--;
}
/* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
col = numColsB % 0x4u;
while (col > 0u)
{
/* Read and store the input element in the destination */
*px = *pInB++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Decrement the column loop counter */
col--;
}
i++;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
/* Reset the variables for the usage in the following multiplication process */
row = numRowsA;
i = 0u;
px = pDst->pData;
#ifndef UNALIGNED_SUPPORT_DISABLE
/* Process two rows from matrix A at a time and output two rows at a time */
row = row >> 1;
px2 = px + numColsB;
#endif
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
while (row > 0u)
{
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the transposed pSrcB data */
pInB = pSrcBT;
#ifndef UNALIGNED_SUPPORT_DISABLE
/* Process two (transposed) columns from matrix B at a time */
col = col >> 1;
j = 0;
#endif
/* column loop */
while (col > 0u)
{
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
/* Initiate the pointer pInA to point to the starting address of the column being processed */
pInA = pSrcA->pData + i;
#ifndef UNALIGNED_SUPPORT_DISABLE
sum2 = 0;
sum3 = 0;
sum4 = 0;
pInB = pSrcBT + j;
pInA2 = pInA + numColsA;
pInB2 = pInB + numRowsB;
/* Read in two elements at once - alows dual MAC instruction */
colCnt = numColsA >> 1;
#else
colCnt = numColsA >> 2;
#endif
/* matrix multiplication */
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
#ifndef UNALIGNED_SUPPORT_DISABLE
inA1 = *__SIMD32(pInA)++;
inB1 = *__SIMD32(pInB)++;
inA2 = *__SIMD32(pInA2)++;
inB2 = *__SIMD32(pInB2)++;
sum = __SMLAD(inA1, inB1, sum);
sum2 = __SMLAD(inA1, inB2, sum2);
sum3 = __SMLAD(inA2, inB1, sum3);
sum4 = __SMLAD(inA2, inB2, sum4);
#else
inA1 = *pInA;
inB1 = *pInB;
sum += inA1 * inB1;
inA2 = pInA[1];
inB2 = pInB[1];
sum += inA2 * inB2;
inA1 = pInA[2];
inB1 = pInB[2];
sum += inA1 * inB1;
inA2 = pInA[3];
inB2 = pInB[3];
sum += inA2 * inB2;
pInA += 4;
pInB += 4;
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Decrement the loop counter */
colCnt--;
}
/* process odd column samples */
#ifndef UNALIGNED_SUPPORT_DISABLE
if (numColsA & 1u) {
inA1 = *pInA++;
inB1 = *pInB++;
inA2 = *pInA2++;
inB2 = *pInB2++;
sum += inA1 * inB1;
sum2 += inA1 * inB2;
sum3 += inA2 * inB1;
sum4 += inA2 * inB2;
}
#else
colCnt = numColsA % 0x4u;
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
sum += (q31_t) (*pInA++) * (*pInB++);
colCnt--;
}
#endif
/* Saturate and store the result in the destination buffer */
*px++ = (q15_t) (sum >> 15);
#ifndef UNALIGNED_SUPPORT_DISABLE
*px++ = (q15_t) (sum2 >> 15);
*px2++ = (q15_t) (sum3 >> 15);
*px2++ = (q15_t) (sum4 >> 15);
j += numRowsB * 2;
#endif
/* Decrement the column loop counter */
col--;
}
i = i + numColsA;
#ifndef UNALIGNED_SUPPORT_DISABLE
i = i + numColsA;
px = px2 + (numColsB & 1u);
px2 = px + numColsB;
#endif
/* Decrement the row loop counter */
row--;
}
/* Compute any remaining odd row/column below */
#ifndef UNALIGNED_SUPPORT_DISABLE
/* Compute remaining output column */
if (numColsB & 1u) {
/* Avoid redundant computation of last element */
row = numRowsA & (~0x1);
/* Point to remaining unfilled column in output matrix */
px = pDst->pData+numColsB-1;
pInA = pSrcA->pData;
/* row loop */
while (row > 0)
{
/* point to last column in matrix B */
pInB = pSrcBT + numRowsB*(numColsB-1);
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
/* Compute 4 columns at once */
colCnt = numColsA >> 2;
/* matrix multiplication */
while (colCnt > 0u)
{
inA1 = *__SIMD32(pInA)++;
inA2 = *__SIMD32(pInA)++;
inB1 = *__SIMD32(pInB)++;
inB2 = *__SIMD32(pInB)++;
sum = __SMLAD(inA1, inB1, sum);
sum = __SMLAD(inA2, inB2, sum);
/* Decrement the loop counter */
colCnt--;
}
colCnt = numColsA & 3u;
while (colCnt > 0u) {
sum += (q31_t) (*pInA++) * (*pInB++);
colCnt--;
}
/* Store the result in the destination buffer */
*px = (q15_t) (sum >> 15);
px += numColsB;
/* Decrement the row loop counter */
row--;
}
}
/* Compute remaining output row */
if (numRowsA & 1u) {
/* point to last row in output matrix */
px = pDst->pData+(numColsB)*(numRowsA-1);
pInB = pSrcBT;
col = numColsB;
i = 0u;
/* col loop */
while (col > 0)
{
/* point to last row in matrix A */
pInA = pSrcA->pData + (numRowsA-1)*numColsA;
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
/* Compute 4 columns at once */
colCnt = numColsA >> 2;
/* matrix multiplication */
while (colCnt > 0u)
{
inA1 = *__SIMD32(pInA)++;
inA2 = *__SIMD32(pInA)++;
inB1 = *__SIMD32(pInB)++;
inB2 = *__SIMD32(pInB)++;
sum = __SMLAD(inA1, inB1, sum);
sum = __SMLAD(inA2, inB2, sum);
/* Decrement the loop counter */
colCnt--;
}
colCnt = numColsA & 3u;
while (colCnt > 0u) {
sum += (q31_t) (*pInA++) * (*pInB++);
colCnt--;
}
/* Store the result in the destination buffer */
*px++ = (q15_t) (sum >> 15);
/* Decrement the col loop counter */
col--;
}
}
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixMult group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
|
C
|
apache-2.0
| 14,680
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_mult_fast_q31.c
* Description: Q31 matrix multiplication (fast variant)
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixMult
* @{
*/
/**
* @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The difference between the function arm_mat_mult_q31() and this fast variant is that
* the fast variant use a 32-bit rather than a 64-bit accumulator.
* The result of each 1.31 x 1.31 multiplication is truncated to
* 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
* format. Finally, the accumulator is saturated and converted to a 1.31 result.
*
* \par
* The fast version has the same overflow behavior as the standard version but provides
* less precision since it discards the low 32 bits of each multiplication result.
* In order to avoid overflows completely the input signals must be scaled down.
* Scale down one of the input matrices by log2(numColsA) bits to
* avoid overflows, as a total of numColsA additions are computed internally for each
* output element.
*
* \par
* See <code>arm_mat_mult_q31()</code> for a slower implementation of this function
* which uses 64-bit accumulation to provide higher precision.
*/
arm_status arm_mat_mult_fast_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
arm_matrix_instance_q31 * pDst)
{
q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */
q31_t *px; /* Temporary output data matrix pointer */
q31_t sum; /* Accumulator */
uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
uint32_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
q31_t inA1, inB1;
#if defined (ARM_MATH_DSP)
q31_t sum2, sum3, sum4;
q31_t inA2, inB2;
q31_t *pInA2;
q31_t *px2;
#endif
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
px = pDst->pData;
#if defined (ARM_MATH_DSP)
row = row >> 1;
px2 = px + numColsB;
#endif
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
while (row > 0u)
{
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the pSrcB data */
pInB = pSrcB->pData;
j = 0u;
#if defined (ARM_MATH_DSP)
col = col >> 1;
#endif
/* column loop */
while (col > 0u)
{
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
/* Initiate data pointers */
pInA = pSrcA->pData + i;
pInB = pSrcB->pData + j;
#if defined (ARM_MATH_DSP)
sum2 = 0;
sum3 = 0;
sum4 = 0;
pInA2 = pInA + numColsA;
colCnt = numColsA;
#else
colCnt = numColsA >> 2;
#endif
/* matrix multiplication */
while (colCnt > 0u)
{
#if defined (ARM_MATH_DSP)
inA1 = *pInA++;
inB1 = pInB[0];
inA2 = *pInA2++;
inB2 = pInB[1];
pInB += numColsB;
sum = __SMMLA(inA1, inB1, sum);
sum2 = __SMMLA(inA1, inB2, sum2);
sum3 = __SMMLA(inA2, inB1, sum3);
sum4 = __SMMLA(inA2, inB2, sum4);
#else
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
/* Perform the multiply-accumulates */
inB1 = *pInB;
pInB += numColsB;
inA1 = pInA[0];
sum = __SMMLA(inA1, inB1, sum);
inB1 = *pInB;
pInB += numColsB;
inA1 = pInA[1];
sum = __SMMLA(inA1, inB1, sum);
inB1 = *pInB;
pInB += numColsB;
inA1 = pInA[2];
sum = __SMMLA(inA1, inB1, sum);
inB1 = *pInB;
pInB += numColsB;
inA1 = pInA[3];
sum = __SMMLA(inA1, inB1, sum);
pInA += 4u;
#endif
/* Decrement the loop counter */
colCnt--;
}
#ifdef ARM_MATH_CM0_FAMILY
/* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here. */
colCnt = numColsA % 0x4u;
while (colCnt > 0u)
{
sum = __SMMLA(*pInA++, *pInB, sum);
pInB += numColsB;
colCnt--;
}
j++;
#endif
/* Convert the result from 2.30 to 1.31 format and store in destination buffer */
*px++ = sum << 1;
#if defined (ARM_MATH_DSP)
*px++ = sum2 << 1;
*px2++ = sum3 << 1;
*px2++ = sum4 << 1;
j += 2;
#endif
/* Decrement the column loop counter */
col--;
}
i = i + numColsA;
#if defined (ARM_MATH_DSP)
i = i + numColsA;
px = px2 + (numColsB & 1u);
px2 = px + numColsB;
#endif
/* Decrement the row loop counter */
row--;
}
/* Compute any remaining odd row/column below */
#if defined (ARM_MATH_DSP)
/* Compute remaining output column */
if (numColsB & 1u) {
/* Avoid redundant computation of last element */
row = numRowsA & (~0x1);
/* Point to remaining unfilled column in output matrix */
px = pDst->pData+numColsB-1;
pInA = pSrcA->pData;
/* row loop */
while (row > 0)
{
/* point to last column in matrix B */
pInB = pSrcB->pData + numColsB-1;
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
/* Compute 4 columns at once */
colCnt = numColsA >> 2;
/* matrix multiplication */
while (colCnt > 0u)
{
inA1 = *pInA++;
inA2 = *pInA++;
inB1 = *pInB;
pInB += numColsB;
inB2 = *pInB;
pInB += numColsB;
sum = __SMMLA(inA1, inB1, sum);
sum = __SMMLA(inA2, inB2, sum);
inA1 = *pInA++;
inA2 = *pInA++;
inB1 = *pInB;
pInB += numColsB;
inB2 = *pInB;
pInB += numColsB;
sum = __SMMLA(inA1, inB1, sum);
sum = __SMMLA(inA2, inB2, sum);
/* Decrement the loop counter */
colCnt--;
}
colCnt = numColsA & 3u;
while (colCnt > 0u) {
sum = __SMMLA(*pInA++, *pInB, sum);
pInB += numColsB;
colCnt--;
}
/* Convert the result from 2.30 to 1.31 format and store in destination buffer */
*px = sum << 1;
px += numColsB;
/* Decrement the row loop counter */
row--;
}
}
/* Compute remaining output row */
if (numRowsA & 1u) {
/* point to last row in output matrix */
px = pDst->pData+(numColsB)*(numRowsA-1);
col = numColsB;
i = 0u;
/* col loop */
while (col > 0)
{
/* point to last row in matrix A */
pInA = pSrcA->pData + (numRowsA-1)*numColsA;
pInB = pSrcB->pData + i;
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
/* Compute 4 columns at once */
colCnt = numColsA >> 2;
/* matrix multiplication */
while (colCnt > 0u)
{
inA1 = *pInA++;
inA2 = *pInA++;
inB1 = *pInB;
pInB += numColsB;
inB2 = *pInB;
pInB += numColsB;
sum = __SMMLA(inA1, inB1, sum);
sum = __SMMLA(inA2, inB2, sum);
inA1 = *pInA++;
inA2 = *pInA++;
inB1 = *pInB;
pInB += numColsB;
inB2 = *pInB;
pInB += numColsB;
sum = __SMMLA(inA1, inB1, sum);
sum = __SMMLA(inA2, inB2, sum);
/* Decrement the loop counter */
colCnt--;
}
colCnt = numColsA & 3u;
while (colCnt > 0u) {
sum = __SMMLA(*pInA++, *pInB, sum);
pInB += numColsB;
colCnt--;
}
/* Saturate and store the result in the destination buffer */
*px++ = sum << 1;
i++;
/* Decrement the col loop counter */
col--;
}
}
#endif /* #if defined (ARM_MATH_DSP) */
/* set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixMult group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
|
C
|
apache-2.0
| 10,463
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_mult_q15.c
* Description: Q15 matrix multiplication
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixMult
* @{
*/
/**
* @brief Q15 matrix multiplication
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @param[in] *pState points to the array for storing intermediate results (Unused)
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The function is implemented using a 64-bit internal accumulator. The inputs to the
* multiplications are in 1.15 format and multiplications yield a 2.30 result.
* The 2.30 intermediate
* results are accumulated in a 64-bit accumulator in 34.30 format. This approach
* provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
* truncated to 34.15 format by discarding the low 15 bits and then saturated to
* 1.15 format.
*
* \par
* Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.
*
*/
arm_status arm_mat_mult_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
arm_matrix_instance_q15 * pDst,
q15_t * pState)
{
q63_t sum; /* accumulator */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q15_t *pSrcBT = pState; /* input data matrix pointer for transpose */
q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
q15_t *px; /* Temporary output data matrix pointer */
uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */
uint16_t col, i = 0u, row = numRowsB, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
#ifndef UNALIGNED_SUPPORT_DISABLE
q31_t in; /* Temporary variable to hold the input value */
q31_t pSourceA1, pSourceB1, pSourceA2, pSourceB2;
#else
q15_t in; /* Temporary variable to hold the input value */
q15_t inA1, inB1, inA2, inB2;
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Matrix transpose */
do
{
/* Apply loop unrolling and exchange the columns with row elements */
col = numColsB >> 2;
/* The pointer px is set to starting address of the column being processed */
px = pSrcBT + i;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (col > 0u)
{
#ifndef UNALIGNED_SUPPORT_DISABLE
/* Read two elements from the row */
in = *__SIMD32(pInB)++;
/* Unpack and store one element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*px = (q15_t) in;
#else
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Unpack and store the second element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#else
*px = (q15_t) in;
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Read two elements from the row */
in = *__SIMD32(pInB)++;
/* Unpack and store one element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*px = (q15_t) in;
#else
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Unpack and store the second element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#else
*px = (q15_t) in;
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
#else
/* Read one element from the row */
in = *pInB++;
/* Store one element in the destination */
*px = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Read one element from the row */
in = *pInB++;
/* Store one element in the destination */
*px = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Read one element from the row */
in = *pInB++;
/* Store one element in the destination */
*px = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Read one element from the row */
in = *pInB++;
/* Store one element in the destination */
*px = in;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Decrement the column loop counter */
col--;
}
/* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
col = numColsB % 0x4u;
while (col > 0u)
{
/* Read and store the input element in the destination */
*px = *pInB++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += numRowsB;
/* Decrement the column loop counter */
col--;
}
i++;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
/* Reset the variables for the usage in the following multiplication process */
row = numRowsA;
i = 0u;
px = pDst->pData;
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
do
{
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the transposed pSrcB data */
pInB = pSrcBT;
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
/* Apply loop unrolling and compute 2 MACs simultaneously. */
colCnt = numColsA >> 2;
/* Initiate the pointer pIn1 to point to the starting address of the column being processed */
pInA = pSrcA->pData + i;
/* matrix multiplication */
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
#ifndef UNALIGNED_SUPPORT_DISABLE
/* read real and imag values from pSrcA and pSrcB buffer */
pSourceA1 = *__SIMD32(pInA)++;
pSourceB1 = *__SIMD32(pInB)++;
pSourceA2 = *__SIMD32(pInA)++;
pSourceB2 = *__SIMD32(pInB)++;
/* Multiply and Accumlates */
sum = __SMLALD(pSourceA1, pSourceB1, sum);
sum = __SMLALD(pSourceA2, pSourceB2, sum);
#else
/* read real and imag values from pSrcA and pSrcB buffer */
inA1 = *pInA++;
inB1 = *pInB++;
inA2 = *pInA++;
/* Multiply and Accumlates */
sum += inA1 * inB1;
inB2 = *pInB++;
inA1 = *pInA++;
inB1 = *pInB++;
/* Multiply and Accumlates */
sum += inA2 * inB2;
inA2 = *pInA++;
inB2 = *pInB++;
/* Multiply and Accumlates */
sum += inA1 * inB1;
sum += inA2 * inB2;
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Decrement the loop counter */
colCnt--;
}
/* process remaining column samples */
colCnt = numColsA & 3u;
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
sum += *pInA++ * *pInB++;
/* Decrement the loop counter */
colCnt--;
}
/* Saturate and store the result in the destination buffer */
*px = (q15_t) (__SSAT((sum >> 15), 16));
px++;
/* Decrement the column loop counter */
col--;
} while (col > 0u);
i = i + numColsA;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
#else
/* Run the below code for Cortex-M0 */
q15_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
q15_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */
q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */
q15_t *pOut = pDst->pData; /* output data matrix pointer */
q15_t *px; /* Temporary output data matrix pointer */
uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
do
{
/* Output pointer is set to starting address of the row being processed */
px = pOut + i;
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the pSrcB data */
pIn2 = pSrcB->pData;
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
/* Initiate the pointer pIn1 to point to the starting address of pSrcA */
pIn1 = pInA;
/* Matrix A columns number of MAC operations are to be performed */
colCnt = numColsA;
/* matrix multiplication */
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
/* Perform the multiply-accumulates */
sum += (q31_t) * pIn1++ * *pIn2;
pIn2 += numColsB;
/* Decrement the loop counter */
colCnt--;
}
/* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */
/* Saturate and store the result in the destination buffer */
*px++ = (q15_t) __SSAT((sum >> 15), 16);
/* Decrement the column loop counter */
col--;
/* Update the pointer pIn2 to point to the starting address of the next column */
pIn2 = pInB + (numColsB - col);
} while (col > 0u);
/* Update the pointer pSrcA to point to the starting address of the next row */
i = i + numColsB;
pInA = pInA + numColsA;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
#endif /* #if defined (ARM_MATH_DSP) */
/* set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixMult group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_mult_q15.c
|
C
|
apache-2.0
| 14,075
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_mult_q31.c
* Description: Q31 matrix multiplication
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixMult
* @{
*/
/**
* @brief Q31 matrix multiplication
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The function is implemented using an internal 64-bit accumulator.
* The accumulator has a 2.62 format and maintains full precision of the intermediate
* multiplication results but provides only a single guard bit. There is no saturation
* on intermediate additions. Thus, if the accumulator overflows it wraps around and
* distorts the result. The input signals should be scaled down to avoid intermediate
* overflows. The input is thus scaled down by log2(numColsA) bits
* to avoid overflows, as a total of numColsA additions are performed internally.
* The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
*
* \par
* See <code>arm_mat_mult_fast_q31()</code> for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.
*
*/
arm_status arm_mat_mult_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
arm_matrix_instance_q31 * pDst)
{
q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
q31_t *pOut = pDst->pData; /* output data matrix pointer */
q31_t *px; /* Temporary output data matrix pointer */
q63_t sum; /* Accumulator */
uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
q31_t a0, a1, a2, a3, b0, b1, b2, b3;
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
do
{
/* Output pointer is set to starting address of the row being processed */
px = pOut + i;
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the pSrcB data */
pIn2 = pSrcB->pData;
j = 0u;
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
/* Initiate the pointer pIn1 to point to the starting address of pInA */
pIn1 = pInA;
/* Apply loop unrolling and compute 4 MACs simultaneously. */
colCnt = numColsA >> 2;
/* matrix multiplication */
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
/* Perform the multiply-accumulates */
b0 = *pIn2;
pIn2 += numColsB;
a0 = *pIn1++;
a1 = *pIn1++;
b1 = *pIn2;
pIn2 += numColsB;
b2 = *pIn2;
pIn2 += numColsB;
sum += (q63_t) a0 *b0;
sum += (q63_t) a1 *b1;
a2 = *pIn1++;
a3 = *pIn1++;
b3 = *pIn2;
pIn2 += numColsB;
sum += (q63_t) a2 *b2;
sum += (q63_t) a3 *b3;
/* Decrement the loop counter */
colCnt--;
}
/* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
colCnt = numColsA % 0x4u;
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
/* Perform the multiply-accumulates */
sum += (q63_t) * pIn1++ * *pIn2;
pIn2 += numColsB;
/* Decrement the loop counter */
colCnt--;
}
/* Convert the result from 2.62 to 1.31 format and store in destination buffer */
*px++ = (q31_t) (sum >> 31);
/* Update the pointer pIn2 to point to the starting address of the next column */
j++;
pIn2 = (pSrcB->pData) + j;
/* Decrement the column loop counter */
col--;
} while (col > 0u);
#else
/* Run the below code for Cortex-M0 */
q31_t *pInB = pSrcB->pData; /* input data matrix pointer B */
uint16_t col, i = 0u, row = numRowsA, colCnt; /* loop counters */
arm_status status; /* status of matrix multiplication */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numCols != pSrcB->numRows) ||
(pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
/* row loop */
do
{
/* Output pointer is set to starting address of the row being processed */
px = pOut + i;
/* For every row wise process, the column loop counter is to be initiated */
col = numColsB;
/* For every row wise process, the pIn2 pointer is set
** to the starting address of the pSrcB data */
pIn2 = pSrcB->pData;
/* column loop */
do
{
/* Set the variable sum, that acts as accumulator, to zero */
sum = 0;
/* Initiate the pointer pIn1 to point to the starting address of pInA */
pIn1 = pInA;
/* Matrix A columns number of MAC operations are to be performed */
colCnt = numColsA;
/* matrix multiplication */
while (colCnt > 0u)
{
/* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
/* Perform the multiply-accumulates */
sum += (q63_t) * pIn1++ * *pIn2;
pIn2 += numColsB;
/* Decrement the loop counter */
colCnt--;
}
/* Convert the result from 2.62 to 1.31 format and store in destination buffer */
*px++ = (q31_t) clip_q63_to_q31(sum >> 31);
/* Decrement the column loop counter */
col--;
/* Update the pointer pIn2 to point to the starting address of the next column */
pIn2 = pInB + (numColsB - col);
} while (col > 0u);
#endif
/* Update the pointer pInA to point to the starting address of the next row */
i = i + numColsB;
pInA = pInA + numColsA;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
/* set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixMult group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_mult_q31.c
|
C
|
apache-2.0
| 8,939
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_scale_f32.c
* Description: Multiplies a floating-point matrix by a scalar
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @defgroup MatrixScale Matrix Scale
*
* Multiplies a matrix by a scalar. This is accomplished by multiplying each element in the
* matrix by the scalar. For example:
* \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"
*
* The function checks to make sure that the input and output matrices are of the same size.
*
* In the fixed-point Q15 and Q31 functions, <code>scale</code> is represented by
* a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
* The shift allows the gain of the scaling operation to exceed 1.0.
* The overall scale factor applied to the fixed-point data is
* <pre>
* scale = scaleFract * 2^shift.
* </pre>
*/
/**
* @addtogroup MatrixScale
* @{
*/
/**
* @brief Floating-point matrix scaling.
* @param[in] *pSrc points to input matrix structure
* @param[in] scale scale factor to be applied
* @param[out] *pDst points to output matrix structure
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
*/
arm_status arm_mat_scale_f32(
const arm_matrix_instance_f32 * pSrc,
float32_t scale,
arm_matrix_instance_f32 * pDst)
{
float32_t *pIn = pSrc->pData; /* input data matrix pointer */
float32_t *pOut = pDst->pData; /* output data matrix pointer */
uint32_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix scaling */
#if defined (ARM_MATH_DSP)
float32_t in1, in2, in3, in4; /* temporary variables */
float32_t out1, out2, out3, out4; /* temporary variables */
#endif // #if defined (ARM_MATH_DSP)
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Total number of samples in the input matrix */
numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Loop Unrolling */
blkCnt = numSamples >> 2;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) * scale */
/* Scaling and results are stored in the destination buffer. */
in1 = pIn[0];
in2 = pIn[1];
in3 = pIn[2];
in4 = pIn[3];
out1 = in1 * scale;
out2 = in2 * scale;
out3 = in3 * scale;
out4 = in4 * scale;
pOut[0] = out1;
pOut[1] = out2;
pOut[2] = out3;
pOut[3] = out4;
/* update pointers to process next sampels */
pIn += 4u;
pOut += 4u;
/* Decrement the numSamples loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) * scale */
/* The results are stored in the destination buffer. */
*pOut++ = (*pIn++) * scale;
/* Decrement the loop counter */
blkCnt--;
}
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixScale group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_scale_f32.c
|
C
|
apache-2.0
| 5,022
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_scale_q15.c
* Description: Multiplies a Q15 matrix by a scalar
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixScale
* @{
*/
/**
* @brief Q15 matrix scaling.
* @param[in] *pSrc points to input matrix
* @param[in] scaleFract fractional portion of the scale factor
* @param[in] shift number of bits to shift the result by
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
* \par
* The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
* These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
*/
arm_status arm_mat_scale_q15(
const arm_matrix_instance_q15 * pSrc,
q15_t scaleFract,
int32_t shift,
arm_matrix_instance_q15 * pDst)
{
q15_t *pIn = pSrc->pData; /* input data matrix pointer */
q15_t *pOut = pDst->pData; /* output data matrix pointer */
uint32_t numSamples; /* total number of elements in the matrix */
int32_t totShift = 15 - shift; /* total shift to apply after scaling */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix scaling */
#if defined (ARM_MATH_DSP)
q15_t in1, in2, in3, in4;
q31_t out1, out2, out3, out4;
q31_t inA1, inA2;
#endif // #if defined (ARM_MATH_DSP)
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch */
if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif // #ifdef ARM_MATH_MATRIX_CHECK
{
/* Total number of samples in the input matrix */
numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Loop Unrolling */
blkCnt = numSamples >> 2;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) * k */
/* Scale, saturate and then store the results in the destination buffer. */
/* Reading 2 inputs from memory */
inA1 = _SIMD32_OFFSET(pIn);
inA2 = _SIMD32_OFFSET(pIn + 2);
/* C = A * scale */
/* Scale the inputs and then store the 2 results in the destination buffer
* in single cycle by packing the outputs */
out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
out2 = (q31_t) ((q15_t) inA1 * scaleFract);
out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
out4 = (q31_t) ((q15_t) inA2 * scaleFract);
out1 = out1 >> totShift;
inA1 = _SIMD32_OFFSET(pIn + 4);
out2 = out2 >> totShift;
inA2 = _SIMD32_OFFSET(pIn + 6);
out3 = out3 >> totShift;
out4 = out4 >> totShift;
in1 = (q15_t) (__SSAT(out1, 16));
in2 = (q15_t) (__SSAT(out2, 16));
in3 = (q15_t) (__SSAT(out3, 16));
in4 = (q15_t) (__SSAT(out4, 16));
_SIMD32_OFFSET(pOut) = __PKHBT(in2, in1, 16);
_SIMD32_OFFSET(pOut + 2) = __PKHBT(in4, in3, 16);
/* update pointers to process next sampels */
pIn += 4u;
pOut += 4u;
/* Decrement the numSamples loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) * k */
/* Scale, saturate and then store the results in the destination buffer. */
*pOut++ =
(q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
/* Decrement the numSamples loop counter */
blkCnt--;
}
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixScale group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_scale_q15.c
|
C
|
apache-2.0
| 5,409
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_scale_q31.c
* Description: Multiplies a Q31 matrix by a scalar
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixScale
* @{
*/
/**
* @brief Q31 matrix scaling.
* @param[in] *pSrc points to input matrix
* @param[in] scaleFract fractional portion of the scale factor
* @param[in] shift number of bits to shift the result by
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
* \par
* The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
* These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
*/
arm_status arm_mat_scale_q31(
const arm_matrix_instance_q31 * pSrc,
q31_t scaleFract,
int32_t shift,
arm_matrix_instance_q31 * pDst)
{
q31_t *pIn = pSrc->pData; /* input data matrix pointer */
q31_t *pOut = pDst->pData; /* output data matrix pointer */
uint32_t numSamples; /* total number of elements in the matrix */
int32_t totShift = shift + 1; /* shift to apply after scaling */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix scaling */
q31_t in1, in2, out1; /* temporary variabels */
#if defined (ARM_MATH_DSP)
q31_t in3, in4, out2, out3, out4; /* temporary variables */
#endif // #ifndef ARM_MAT_CM0
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch */
if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif // #ifdef ARM_MATH_MATRIX_CHECK
{
/* Total number of samples in the input matrix */
numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) * k */
/* Read values from input */
in1 = *pIn;
in2 = *(pIn + 1);
in3 = *(pIn + 2);
in4 = *(pIn + 3);
/* multiply input with scaler value */
in1 = ((q63_t) in1 * scaleFract) >> 32;
in2 = ((q63_t) in2 * scaleFract) >> 32;
in3 = ((q63_t) in3 * scaleFract) >> 32;
in4 = ((q63_t) in4 * scaleFract) >> 32;
/* apply shifting */
out1 = in1 << totShift;
out2 = in2 << totShift;
/* saturate the results. */
if (in1 != (out1 >> totShift))
out1 = 0x7FFFFFFF ^ (in1 >> 31);
if (in2 != (out2 >> totShift))
out2 = 0x7FFFFFFF ^ (in2 >> 31);
out3 = in3 << totShift;
out4 = in4 << totShift;
*pOut = out1;
*(pOut + 1) = out2;
if (in3 != (out3 >> totShift))
out3 = 0x7FFFFFFF ^ (in3 >> 31);
if (in4 != (out4 >> totShift))
out4 = 0x7FFFFFFF ^ (in4 >> 31);
*(pOut + 2) = out3;
*(pOut + 3) = out4;
/* update pointers to process next sampels */
pIn += 4u;
pOut += 4u;
/* Decrement the numSamples loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) * k */
/* Scale, saturate and then store the results in the destination buffer. */
in1 = *pIn++;
in2 = ((q63_t) in1 * scaleFract) >> 32;
out1 = in2 << totShift;
if (in2 != (out1 >> totShift))
out1 = 0x7FFFFFFF ^ (in2 >> 31);
*pOut++ = out1;
/* Decrement the numSamples loop counter */
blkCnt--;
}
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixScale group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_scale_q31.c
|
C
|
apache-2.0
| 5,496
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_sub_f32.c
* Description: Floating-point matrix subtraction
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @defgroup MatrixSub Matrix Subtraction
*
* Subtract two matrices.
* \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"
*
* The functions check to make sure that
* <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
* number of rows and columns.
*/
/**
* @addtogroup MatrixSub
* @{
*/
/**
* @brief Floating-point matrix subtraction
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_sub_f32(
const arm_matrix_instance_f32 * pSrcA,
const arm_matrix_instance_f32 * pSrcB,
arm_matrix_instance_f32 * pDst)
{
float32_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
float32_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
float32_t *pOut = pDst->pData; /* output data matrix pointer */
#if defined (ARM_MATH_DSP)
float32_t inA1, inA2, inB1, inB2, out1, out2; /* temporary variables */
#endif // #if defined (ARM_MATH_DSP)
uint32_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix subtraction */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
(pSrcA->numCols != pSrcB->numCols) ||
(pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Total number of samples in the input matrix */
numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) - B(m,n) */
/* Subtract and then store the results in the destination buffer. */
/* Read values from source A */
inA1 = pIn1[0];
/* Read values from source B */
inB1 = pIn2[0];
/* Read values from source A */
inA2 = pIn1[1];
/* out = sourceA - sourceB */
out1 = inA1 - inB1;
/* Read values from source B */
inB2 = pIn2[1];
/* Read values from source A */
inA1 = pIn1[2];
/* out = sourceA - sourceB */
out2 = inA2 - inB2;
/* Read values from source B */
inB1 = pIn2[2];
/* Store result in destination */
pOut[0] = out1;
pOut[1] = out2;
/* Read values from source A */
inA2 = pIn1[3];
/* Read values from source B */
inB2 = pIn2[3];
/* out = sourceA - sourceB */
out1 = inA1 - inB1;
/* out = sourceA - sourceB */
out2 = inA2 - inB2;
/* Store result in destination */
pOut[2] = out1;
/* Store result in destination */
pOut[3] = out2;
/* update pointers to process next sampels */
pIn1 += 4u;
pIn2 += 4u;
pOut += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) - B(m,n) */
/* Subtract and then store the results in the destination buffer. */
*pOut++ = (*pIn1++) - (*pIn2++);
/* Decrement the loop counter */
blkCnt--;
}
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixSub group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_sub_f32.c
|
C
|
apache-2.0
| 5,457
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_sub_q15.c
* Description: Q15 Matrix subtraction
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixSub
* @{
*/
/**
* @brief Q15 matrix subtraction.
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
*/
arm_status arm_mat_sub_q15(
const arm_matrix_instance_q15 * pSrcA,
const arm_matrix_instance_q15 * pSrcB,
arm_matrix_instance_q15 * pDst)
{
q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
q15_t *pOut = pDst->pData; /* output data matrix pointer */
uint32_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix subtraction */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
(pSrcA->numCols != pSrcB->numCols) ||
(pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Total number of samples in the input matrix */
numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Apply loop unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) - B(m,n) */
/* Subtract, Saturate and then store the results in the destination buffer. */
*__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
*__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) - B(m,n) */
/* Subtract and then store the results in the destination buffer. */
*pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) - B(m,n) */
/* Subtract and then store the results in the destination buffer. */
*pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixSub group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_sub_q15.c
|
C
|
apache-2.0
| 4,551
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_sub_q31.c
* Description: Q31 matrix subtraction
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixSub
* @{
*/
/**
* @brief Q31 matrix subtraction.
* @param[in] *pSrcA points to the first input matrix structure
* @param[in] *pSrcB points to the second input matrix structure
* @param[out] *pDst points to output matrix structure
* @return The function returns either
* <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function uses saturating arithmetic.
* Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
*/
arm_status arm_mat_sub_q31(
const arm_matrix_instance_q31 * pSrcA,
const arm_matrix_instance_q31 * pSrcB,
arm_matrix_instance_q31 * pDst)
{
q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
q31_t *pOut = pDst->pData; /* output data matrix pointer */
q31_t inA1, inB1; /* temporary variables */
#if defined (ARM_MATH_DSP)
q31_t inA2, inB2; /* temporary variables */
q31_t out1, out2; /* temporary variables */
#endif // #if defined (ARM_MATH_DSP)
uint32_t numSamples; /* total number of elements in the matrix */
uint32_t blkCnt; /* loop counters */
arm_status status; /* status of matrix subtraction */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrcA->numRows != pSrcB->numRows) ||
(pSrcA->numCols != pSrcB->numCols) ||
(pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif
{
/* Total number of samples in the input matrix */
numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* Loop Unrolling */
blkCnt = numSamples >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) - B(m,n) */
/* Subtract, saturate and then store the results in the destination buffer. */
/* Read values from source A */
inA1 = pIn1[0];
/* Read values from source B */
inB1 = pIn2[0];
/* Read values from source A */
inA2 = pIn1[1];
/* Subtract and saturate */
out1 = __QSUB(inA1, inB1);
/* Read values from source B */
inB2 = pIn2[1];
/* Read values from source A */
inA1 = pIn1[2];
/* Subtract and saturate */
out2 = __QSUB(inA2, inB2);
/* Read values from source B */
inB1 = pIn2[2];
/* Store result in destination */
pOut[0] = out1;
pOut[1] = out2;
/* Read values from source A */
inA2 = pIn1[3];
/* Read values from source B */
inB2 = pIn2[3];
/* Subtract and saturate */
out1 = __QSUB(inA1, inB1);
/* Subtract and saturate */
out2 = __QSUB(inA2, inB2);
/* Store result in destination */
pOut[2] = out1;
pOut[3] = out2;
/* update pointers to process next samples */
pIn1 += 4u;
pIn2 += 4u;
pOut += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* If the numSamples is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = numSamples % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Initialize blkCnt with number of samples */
blkCnt = numSamples;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C(m,n) = A(m,n) - B(m,n) */
/* Subtract, saturate and then store the results in the destination buffer. */
inA1 = *pIn1++;
inB1 = *pIn2++;
inA1 = __QSUB(inA1, inB1);
*pOut++ = inA1;
/* Decrement the loop counter */
blkCnt--;
}
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixSub group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_sub_q31.c
|
C
|
apache-2.0
| 5,485
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_trans_f32.c
* Description: Floating-point matrix transpose
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @defgroup MatrixTrans Matrix Transpose
*
* Tranposes a matrix.
* Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix.
* \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixTrans
* @{
*/
/**
* @brief Floating-point matrix transpose.
* @param[in] *pSrc points to the input matrix
* @param[out] *pDst points to the output matrix
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_trans_f32(
const arm_matrix_instance_f32 * pSrc,
arm_matrix_instance_f32 * pDst)
{
float32_t *pIn = pSrc->pData; /* input data matrix pointer */
float32_t *pOut = pDst->pData; /* output data matrix pointer */
float32_t *px; /* Temporary output data matrix pointer */
uint16_t nRows = pSrc->numRows; /* number of rows */
uint16_t nColumns = pSrc->numCols; /* number of columns */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint16_t blkCnt, i = 0u, row = nRows; /* loop counters */
arm_status status; /* status of matrix transpose */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Matrix transpose by exchanging the rows with columns */
/* row loop */
do
{
/* Loop Unrolling */
blkCnt = nColumns >> 2;
/* The pointer px is set to starting address of the column being processed */
px = pOut + i;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u) /* column loop */
{
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Decrement the column loop counter */
blkCnt--;
}
/* Perform matrix transpose for last 3 samples here. */
blkCnt = nColumns % 0x4u;
while (blkCnt > 0u)
{
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Decrement the column loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
uint16_t col, i = 0u, row = nRows; /* loop counters */
arm_status status; /* status of matrix transpose */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Matrix transpose by exchanging the rows with columns */
/* row loop */
do
{
/* The pointer px is set to starting address of the column being processed */
px = pOut + i;
/* Initialize column loop counter */
col = nColumns;
while (col > 0u)
{
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Decrement the column loop counter */
col--;
}
#endif /* #if defined (ARM_MATH_DSP) */
i++;
/* Decrement the row loop counter */
row--;
} while (row > 0u); /* row loop end */
/* Set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixTrans group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_trans_f32.c
|
C
|
apache-2.0
| 5,919
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_trans_q15.c
* Description: Q15 matrix transpose
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixTrans
* @{
*/
/*
* @brief Q15 matrix transpose.
* @param[in] *pSrc points to the input matrix
* @param[out] *pDst points to the output matrix
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_trans_q15(
const arm_matrix_instance_q15 * pSrc,
arm_matrix_instance_q15 * pDst)
{
q15_t *pSrcA = pSrc->pData; /* input data matrix pointer */
q15_t *pOut = pDst->pData; /* output data matrix pointer */
uint16_t nRows = pSrc->numRows; /* number of nRows */
uint16_t nColumns = pSrc->numCols; /* number of nColumns */
uint16_t col, row = nRows, i = 0u; /* row and column loop counters */
arm_status status; /* status of matrix transpose */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
#ifndef UNALIGNED_SUPPORT_DISABLE
q31_t in; /* variable to hold temporary output */
#else
q15_t in;
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Matrix transpose by exchanging the rows with columns */
/* row loop */
do
{
/* Apply loop unrolling and exchange the columns with row elements */
col = nColumns >> 2u;
/* The pointer pOut is set to starting address of the column being processed */
pOut = pDst->pData + i;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (col > 0u)
{
#ifndef UNALIGNED_SUPPORT_DISABLE
/* Read two elements from the row */
in = *__SIMD32(pSrcA)++;
/* Unpack and store one element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*pOut = (q15_t) in;
#else
*pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Update the pointer pOut to point to the next row of the transposed matrix */
pOut += nRows;
/* Unpack and store the second element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#else
*pOut = (q15_t) in;
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Update the pointer pOut to point to the next row of the transposed matrix */
pOut += nRows;
/* Read two elements from the row */
#ifndef ARM_MATH_BIG_ENDIAN
in = *__SIMD32(pSrcA)++;
#else
in = *__SIMD32(pSrcA)++;
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Unpack and store one element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*pOut = (q15_t) in;
#else
*pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
/* Update the pointer pOut to point to the next row of the transposed matrix */
pOut += nRows;
/* Unpack and store the second element in the destination */
#ifndef ARM_MATH_BIG_ENDIAN
*pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
#else
*pOut = (q15_t) in;
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
#else
/* Read one element from the row */
in = *pSrcA++;
/* Store one element in the destination */
*pOut = in;
/* Update the pointer px to point to the next row of the transposed matrix */
pOut += nRows;
/* Read one element from the row */
in = *pSrcA++;
/* Store one element in the destination */
*pOut = in;
/* Update the pointer px to point to the next row of the transposed matrix */
pOut += nRows;
/* Read one element from the row */
in = *pSrcA++;
/* Store one element in the destination */
*pOut = in;
/* Update the pointer px to point to the next row of the transposed matrix */
pOut += nRows;
/* Read one element from the row */
in = *pSrcA++;
/* Store one element in the destination */
*pOut = in;
#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
/* Update the pointer pOut to point to the next row of the transposed matrix */
pOut += nRows;
/* Decrement the column loop counter */
col--;
}
/* Perform matrix transpose for last 3 samples here. */
col = nColumns % 0x4u;
#else
/* Run the below code for Cortex-M0 */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Matrix transpose by exchanging the rows with columns */
/* row loop */
do
{
/* The pointer pOut is set to starting address of the column being processed */
pOut = pDst->pData + i;
/* Initialize column loop counter */
col = nColumns;
#endif /* #if defined (ARM_MATH_DSP) */
while (col > 0u)
{
/* Read and store the input element in the destination */
*pOut = *pSrcA++;
/* Update the pointer pOut to point to the next row of the transposed matrix */
pOut += nRows;
/* Decrement the column loop counter */
col--;
}
i++;
/* Decrement the row loop counter */
row--;
} while (row > 0u);
/* set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixTrans group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_trans_q15.c
|
C
|
apache-2.0
| 7,161
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mat_trans_q31.c
* Description: Q31 matrix transpose
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupMatrix
*/
/**
* @addtogroup MatrixTrans
* @{
*/
/*
* @brief Q31 matrix transpose.
* @param[in] *pSrc points to the input matrix
* @param[out] *pDst points to the output matrix
* @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code>
* or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
*/
arm_status arm_mat_trans_q31(
const arm_matrix_instance_q31 * pSrc,
arm_matrix_instance_q31 * pDst)
{
q31_t *pIn = pSrc->pData; /* input data matrix pointer */
q31_t *pOut = pDst->pData; /* output data matrix pointer */
q31_t *px; /* Temporary output data matrix pointer */
uint16_t nRows = pSrc->numRows; /* number of nRows */
uint16_t nColumns = pSrc->numCols; /* number of nColumns */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
uint16_t blkCnt, i = 0u, row = nRows; /* loop counters */
arm_status status; /* status of matrix transpose */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Matrix transpose by exchanging the rows with columns */
/* row loop */
do
{
/* Apply loop unrolling and exchange the columns with row elements */
blkCnt = nColumns >> 2u;
/* The pointer px is set to starting address of the column being processed */
px = pOut + i;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Decrement the column loop counter */
blkCnt--;
}
/* Perform matrix transpose for last 3 samples here. */
blkCnt = nColumns % 0x4u;
while (blkCnt > 0u)
{
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Decrement the column loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
uint16_t col, i = 0u, row = nRows; /* loop counters */
arm_status status; /* status of matrix transpose */
#ifdef ARM_MATH_MATRIX_CHECK
/* Check for matrix mismatch condition */
if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
{
/* Set status as ARM_MATH_SIZE_MISMATCH */
status = ARM_MATH_SIZE_MISMATCH;
}
else
#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
{
/* Matrix transpose by exchanging the rows with columns */
/* row loop */
do
{
/* The pointer px is set to starting address of the column being processed */
px = pOut + i;
/* Initialize column loop counter */
col = nColumns;
while (col > 0u)
{
/* Read and store the input element in the destination */
*px = *pIn++;
/* Update the pointer px to point to the next row of the transposed matrix */
px += nRows;
/* Decrement the column loop counter */
col--;
}
#endif /* #if defined (ARM_MATH_DSP) */
i++;
/* Decrement the row loop counter */
row--;
}
while (row > 0u); /* row loop end */
/* set status as ARM_MATH_SUCCESS */
status = ARM_MATH_SUCCESS;
}
/* Return to application */
return (status);
}
/**
* @} end of MatrixTrans group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/MatrixFunctions/arm_mat_trans_q31.c
|
C
|
apache-2.0
| 5,658
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_max_f32.c
* Description: Maximum value of a floating-point vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @defgroup Max Maximum
*
* Computes the maximum value of an array of data.
* The function returns both the maximum value and its position within the array.
* There are separate functions for floating-point, Q31, Q15, and Q7 data types.
*/
/**
* @addtogroup Max
* @{
*/
/**
* @brief Maximum value of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult maximum value returned here
* @param[out] *pIndex index of maximum value returned here
* @return none.
*/
void arm_max_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult,
uint32_t * pIndex)
{
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex, count; /* loop counter */
/* Initialise the count value. */
count = 0u;
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
/* Loop unrolling */
blkCnt = (blockSize - 1u) >> 2u;
while (blkCnt > 0u)
{
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
maxVal2 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and its index */
out = maxVal1;
outIndex = count + 1u;
}
/* compare for the maximum value */
if (out < maxVal2)
{
/* Update the maximum value and its index */
out = maxVal2;
outIndex = count + 2u;
}
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
maxVal2 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and its index */
out = maxVal1;
outIndex = count + 3u;
}
/* compare for the maximum value */
if (out < maxVal2)
{
/* Update the maximum value and its index */
out = maxVal2;
outIndex = count + 4u;
}
count += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* if (blockSize - 1u) is not multiple of 4 */
blkCnt = (blockSize - 1u) % 4u;
#else
/* Run the below code for Cortex-M0 */
float32_t maxVal1, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex; /* loop counter */
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
blkCnt = (blockSize - 1u);
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and it's index */
out = maxVal1;
outIndex = blockSize - blkCnt;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Store the maximum value and it's index into destination pointers */
*pResult = out;
*pIndex = outIndex;
}
/**
* @} end of Max group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_max_f32.c
|
C
|
apache-2.0
| 4,399
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_max_q15.c
* Description: Maximum value of a Q15 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup Max
* @{
*/
/**
* @brief Maximum value of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult maximum value returned here
* @param[out] *pIndex index of maximum value returned here
* @return none.
*/
void arm_max_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult,
uint32_t * pIndex)
{
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q15_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex, count; /* loop counter */
/* Initialise the count value. */
count = 0u;
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
/* Loop unrolling */
blkCnt = (blockSize - 1u) >> 2u;
while (blkCnt > 0u)
{
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
maxVal2 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and its index */
out = maxVal1;
outIndex = count + 1u;
}
/* compare for the maximum value */
if (out < maxVal2)
{
/* Update the maximum value and its index */
out = maxVal2;
outIndex = count + 2u;
}
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
maxVal2 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and its index */
out = maxVal1;
outIndex = count + 3u;
}
/* compare for the maximum value */
if (out < maxVal2)
{
/* Update the maximum value and its index */
out = maxVal2;
outIndex = count + 4u;
}
count += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* if (blockSize - 1u) is not multiple of 4 */
blkCnt = (blockSize - 1u) % 4u;
#else
/* Run the below code for Cortex-M0 */
q15_t maxVal1, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex; /* loop counter */
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
blkCnt = (blockSize - 1u);
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and it's index */
out = maxVal1;
outIndex = blockSize - blkCnt;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Store the maximum value and it's index into destination pointers */
*pResult = out;
*pIndex = outIndex;
}
/**
* @} end of Max group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_max_q15.c
|
C
|
apache-2.0
| 4,118
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_max_q31.c
* Description: Maximum value of a Q31 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup Max
* @{
*/
/**
* @brief Maximum value of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult maximum value returned here
* @param[out] *pIndex index of maximum value returned here
* @return none.
*/
void arm_max_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult,
uint32_t * pIndex)
{
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex, count; /* loop counter */
/* Initialise the count value. */
count = 0u;
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
/* Loop unrolling */
blkCnt = (blockSize - 1u) >> 2u;
while (blkCnt > 0u)
{
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
maxVal2 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and its index */
out = maxVal1;
outIndex = count + 1u;
}
/* compare for the maximum value */
if (out < maxVal2)
{
/* Update the maximum value and its index */
out = maxVal2;
outIndex = count + 2u;
}
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
maxVal2 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and its index */
out = maxVal1;
outIndex = count + 3u;
}
/* compare for the maximum value */
if (out < maxVal2)
{
/* Update the maximum value and its index */
out = maxVal2;
outIndex = count + 4u;
}
count += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* if (blockSize - 1u) is not multiple of 4 */
blkCnt = (blockSize - 1u) % 4u;
#else
/* Run the below code for Cortex-M0 */
q31_t maxVal1, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex; /* loop counter */
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
blkCnt = (blockSize - 1u);
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and it's index */
out = maxVal1;
outIndex = blockSize - blkCnt;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Store the maximum value and it's index into destination pointers */
*pResult = out;
*pIndex = outIndex;
}
/**
* @} end of Max group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_max_q31.c
|
C
|
apache-2.0
| 4,118
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_max_q7.c
* Description: Maximum value of a Q7 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup Max
* @{
*/
/**
* @brief Maximum value of a Q7 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult maximum value returned here
* @param[out] *pIndex index of maximum value returned here
* @return none.
*/
void arm_max_q7(
q7_t * pSrc,
uint32_t blockSize,
q7_t * pResult,
uint32_t * pIndex)
{
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t maxVal1, maxVal2, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex, count; /* loop counter */
/* Initialise the count value. */
count = 0u;
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
/* Loop unrolling */
blkCnt = (blockSize - 1u) >> 2u;
while (blkCnt > 0u)
{
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
maxVal2 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and its index */
out = maxVal1;
outIndex = count + 1u;
}
/* compare for the maximum value */
if (out < maxVal2)
{
/* Update the maximum value and its index */
out = maxVal2;
outIndex = count + 2u;
}
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
maxVal2 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and its index */
out = maxVal1;
outIndex = count + 3u;
}
/* compare for the maximum value */
if (out < maxVal2)
{
/* Update the maximum value and its index */
out = maxVal2;
outIndex = count + 4u;
}
count += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* if (blockSize - 1u) is not multiple of 4 */
blkCnt = (blockSize - 1u) % 4u;
#else
/* Run the below code for Cortex-M0 */
q7_t maxVal1, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex; /* loop counter */
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
blkCnt = (blockSize - 1u);
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* Initialize maxVal to the next consecutive values one by one */
maxVal1 = *pSrc++;
/* compare for the maximum value */
if (out < maxVal1)
{
/* Update the maximum value and it's index */
out = maxVal1;
outIndex = blockSize - blkCnt;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Store the maximum value and it's index into destination pointers */
*pResult = out;
*pIndex = outIndex;
}
/**
* @} end of Max group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_max_q7.c
|
C
|
apache-2.0
| 4,112
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mean_f32.c
* Description: Mean value of a floating-point vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @defgroup mean Mean
*
* Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.
* The underlying algorithm is used:
*
* <pre>
* Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
* </pre>
*
* There are separate functions for floating-point, Q31, Q15, and Q7 data types.
*/
/**
* @addtogroup mean
* @{
*/
/**
* @brief Mean value of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult mean value returned here
* @return none.
*/
void arm_mean_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult)
{
float32_t sum = 0.0f; /* Temporary result storage */
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t in1, in2, in3, in4;
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
in1 = *pSrc++;
in2 = *pSrc++;
in3 = *pSrc++;
in4 = *pSrc++;
sum += in1;
sum += in2;
sum += in3;
sum += in4;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
sum += *pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
/* Store the result to the destination */
*pResult = sum / (float32_t) blockSize;
}
/**
* @} end of mean group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_mean_f32.c
|
C
|
apache-2.0
| 3,240
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mean_q15.c
* Description: Mean value of a Q15 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup mean
* @{
*/
/**
* @brief Mean value of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult mean value returned here
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using a 32-bit internal accumulator.
* The input is represented in 1.15 format and is accumulated in a 32-bit
* accumulator in 17.15 format.
* There is no risk of internal overflow with this approach, and the
* full precision of intermediate result is preserved.
* Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.
*
*/
void arm_mean_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult)
{
q31_t sum = 0; /* Temporary result storage */
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in;
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
in = *__SIMD32(pSrc)++;
sum += ((in << 16u) >> 16u);
sum += (in >> 16u);
in = *__SIMD32(pSrc)++;
sum += ((in << 16u) >> 16u);
sum += (in >> 16u);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
sum += *pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
/* Store the result to the destination */
*pResult = (q15_t) (sum / (q31_t)blockSize);
}
/**
* @} end of mean group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_mean_q15.c
|
C
|
apache-2.0
| 3,314
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mean_q31.c
* Description: Mean value of a Q31 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup mean
* @{
*/
/**
* @brief Mean value of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult mean value returned here
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*\par
* The function is implemented using a 64-bit internal accumulator.
* The input is represented in 1.31 format and is accumulated in a 64-bit
* accumulator in 33.31 format.
* There is no risk of internal overflow with this approach, and the
* full precision of intermediate result is preserved.
* Finally, the accumulator is truncated to yield a result of 1.31 format.
*
*/
void arm_mean_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult)
{
q63_t sum = 0; /* Temporary result storage */
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4;
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
in1 = *pSrc++;
in2 = *pSrc++;
in3 = *pSrc++;
in4 = *pSrc++;
sum += in1;
sum += in2;
sum += in3;
sum += in4;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
sum += *pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
/* Store the result to the destination */
*pResult = (q31_t) (sum / (int32_t) blockSize);
}
/**
* @} end of mean group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_mean_q31.c
|
C
|
apache-2.0
| 3,287
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_mean_q7.c
* Description: Mean value of a Q7 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup mean
* @{
*/
/**
* @brief Mean value of a Q7 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult mean value returned here
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
* \par
* The function is implemented using a 32-bit internal accumulator.
* The input is represented in 1.7 format and is accumulated in a 32-bit
* accumulator in 25.7 format.
* There is no risk of internal overflow with this approach, and the
* full precision of intermediate result is preserved.
* Finally, the accumulator is truncated to yield a result of 1.7 format.
*
*/
void arm_mean_q7(
q7_t * pSrc,
uint32_t blockSize,
q7_t * pResult)
{
q31_t sum = 0; /* Temporary result storage */
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in;
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
in = *__SIMD32(pSrc)++;
sum += ((in << 24u) >> 24u);
sum += ((in << 16u) >> 24u);
sum += ((in << 8u) >> 24u);
sum += (in >> 24u);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
sum += *pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
/* Store the result to the destination */
*pResult = (q7_t) (sum / (int32_t) blockSize);
}
/**
* @} end of mean group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_mean_q7.c
|
C
|
apache-2.0
| 3,274
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_min_f32.c
* Description: Minimum value of a floating-point vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @defgroup Min Minimum
*
* Computes the minimum value of an array of data.
* The function returns both the minimum value and its position within the array.
* There are separate functions for floating-point, Q31, Q15, and Q7 data types.
*/
/**
* @addtogroup Min
* @{
*/
/**
* @brief Minimum value of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult minimum value returned here
* @param[out] *pIndex index of minimum value returned here
* @return none.
*/
void arm_min_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult,
uint32_t * pIndex)
{
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex, count; /* loop counter */
/* Initialise the count value. */
count = 0u;
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
/* Loop unrolling */
blkCnt = (blockSize - 1u) >> 2u;
while (blkCnt > 0u)
{
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
minVal2 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and its index */
out = minVal1;
outIndex = count + 1u;
}
/* compare for the minimum value */
if (out > minVal2)
{
/* Update the minimum value and its index */
out = minVal2;
outIndex = count + 2u;
}
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
minVal2 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and its index */
out = minVal1;
outIndex = count + 3u;
}
/* compare for the minimum value */
if (out > minVal2)
{
/* Update the minimum value and its index */
out = minVal2;
outIndex = count + 4u;
}
count += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* if (blockSize - 1u) is not multiple of 4 */
blkCnt = (blockSize - 1u) % 4u;
#else
/* Run the below code for Cortex-M0 */
float32_t minVal1, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex; /* loop counter */
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
blkCnt = (blockSize - 1u);
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and it's index */
out = minVal1;
outIndex = blockSize - blkCnt;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Store the minimum value and it's index into destination pointers */
*pResult = out;
*pIndex = outIndex;
}
/**
* @} end of Min group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_min_f32.c
|
C
|
apache-2.0
| 4,399
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_min_q15.c
* Description: Minimum value of a Q15 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup Min
* @{
*/
/**
* @brief Minimum value of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult minimum value returned here
* @param[out] *pIndex index of minimum value returned here
* @return none.
*/
void arm_min_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult,
uint32_t * pIndex)
{
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q15_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex, count; /* loop counter */
/* Initialise the count value. */
count = 0u;
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
/* Loop unrolling */
blkCnt = (blockSize - 1u) >> 2u;
while (blkCnt > 0u)
{
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
minVal2 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and its index */
out = minVal1;
outIndex = count + 1u;
}
/* compare for the minimum value */
if (out > minVal2)
{
/* Update the minimum value and its index */
out = minVal2;
outIndex = count + 2u;
}
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
minVal2 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and its index */
out = minVal1;
outIndex = count + 3u;
}
/* compare for the minimum value */
if (out > minVal2)
{
/* Update the minimum value and its index */
out = minVal2;
outIndex = count + 4u;
}
count += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* if (blockSize - 1u) is not multiple of 4 */
blkCnt = (blockSize - 1u) % 4u;
#else
/* Run the below code for Cortex-M0 */
q15_t minVal1, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex; /* loop counter */
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
blkCnt = (blockSize - 1u);
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and it's index */
out = minVal1;
outIndex = blockSize - blkCnt;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Store the minimum value and it's index into destination pointers */
*pResult = out;
*pIndex = outIndex;
}
/**
* @} end of Min group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_min_q15.c
|
C
|
apache-2.0
| 4,119
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_min_q31.c
* Description: Minimum value of a Q31 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup Min
* @{
*/
/**
* @brief Minimum value of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult minimum value returned here
* @param[out] *pIndex index of minimum value returned here
* @return none.
*/
void arm_min_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult,
uint32_t * pIndex)
{
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex, count; /* loop counter */
/* Initialise the count value. */
count = 0u;
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
/* Loop unrolling */
blkCnt = (blockSize - 1u) >> 2u;
while (blkCnt > 0u)
{
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
minVal2 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and its index */
out = minVal1;
outIndex = count + 1u;
}
/* compare for the minimum value */
if (out > minVal2)
{
/* Update the minimum value and its index */
out = minVal2;
outIndex = count + 2u;
}
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
minVal2 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and its index */
out = minVal1;
outIndex = count + 3u;
}
/* compare for the minimum value */
if (out > minVal2)
{
/* Update the minimum value and its index */
out = minVal2;
outIndex = count + 4u;
}
count += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* if (blockSize - 1u) is not multiple of 4 */
blkCnt = (blockSize - 1u) % 4u;
#else
/* Run the below code for Cortex-M0 */
q31_t minVal1, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex; /* loop counter */
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
blkCnt = (blockSize - 1u);
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and it's index */
out = minVal1;
outIndex = blockSize - blkCnt;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Store the minimum value and it's index into destination pointers */
*pResult = out;
*pIndex = outIndex;
}
/**
* @} end of Min group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_min_q31.c
|
C
|
apache-2.0
| 4,119
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_min_q7.c
* Description: Minimum value of a Q7 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup Min
* @{
*/
/**
* @brief Minimum value of a Q7 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult minimum value returned here
* @param[out] *pIndex index of minimum value returned here
* @return none.
*/
void arm_min_q7(
q7_t * pSrc,
uint32_t blockSize,
q7_t * pResult,
uint32_t * pIndex)
{
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q7_t minVal1, minVal2, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex, count; /* loop counter */
/* Initialise the count value. */
count = 0u;
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
/* Loop unrolling */
blkCnt = (blockSize - 1u) >> 2u;
while (blkCnt > 0u)
{
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
minVal2 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and its index */
out = minVal1;
outIndex = count + 1u;
}
/* compare for the minimum value */
if (out > minVal2)
{
/* Update the minimum value and its index */
out = minVal2;
outIndex = count + 2u;
}
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
minVal2 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and its index */
out = minVal1;
outIndex = count + 3u;
}
/* compare for the minimum value */
if (out > minVal2)
{
/* Update the minimum value and its index */
out = minVal2;
outIndex = count + 4u;
}
count += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* if (blockSize - 1u) is not multiple of 4 */
blkCnt = (blockSize - 1u) % 4u;
#else
/* Run the below code for Cortex-M0 */
q7_t minVal1, out; /* Temporary variables to store the output value. */
uint32_t blkCnt, outIndex; /* loop counter */
/* Initialise the index value to zero. */
outIndex = 0u;
/* Load first input value that act as reference value for comparision */
out = *pSrc++;
blkCnt = (blockSize - 1u);
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* Initialize minVal to the next consecutive values one by one */
minVal1 = *pSrc++;
/* compare for the minimum value */
if (out > minVal1)
{
/* Update the minimum value and it's index */
out = minVal1;
outIndex = blockSize - blkCnt;
}
/* Decrement the loop counter */
blkCnt--;
}
/* Store the minimum value and it's index into destination pointers */
*pResult = out;
*pIndex = outIndex;
}
/**
* @} end of Min group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_min_q7.c
|
C
|
apache-2.0
| 4,113
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_power_f32.c
* Description: Sum of the squares of the elements of a floating-point vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @defgroup power Power
*
* Calculates the sum of the squares of the elements in the input vector.
* The underlying algorithm is used:
*
* <pre>
* Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
* </pre>
*
* There are separate functions for floating point, Q31, Q15, and Q7 data types.
*/
/**
* @addtogroup power
* @{
*/
/**
* @brief Sum of the squares of the elements of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult sum of the squares value returned here
* @return none.
*
*/
void arm_power_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult)
{
float32_t sum = 0.0f; /* accumulator */
float32_t in; /* Temporary variable to store input value */
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute Power and then store the result in a temporary variable, sum. */
in = *pSrc++;
sum += in * in;
in = *pSrc++;
sum += in * in;
in = *pSrc++;
sum += in * in;
in = *pSrc++;
sum += in * in;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* compute power and then store the result in a temporary variable, sum. */
in = *pSrc++;
sum += in * in;
/* Decrement the loop counter */
blkCnt--;
}
/* Store the result to the destination */
*pResult = sum;
}
/**
* @} end of power group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_power_f32.c
|
C
|
apache-2.0
| 3,535
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_power_q15.c
* Description: Sum of the squares of the elements of a Q15 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup power
* @{
*/
/**
* @brief Sum of the squares of the elements of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult sum of the squares value returned here
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The function is implemented using a 64-bit internal accumulator.
* The input is represented in 1.15 format.
* Intermediate multiplication yields a 2.30 format, and this
* result is added without saturation to a 64-bit accumulator in 34.30 format.
* With 33 guard bits in the accumulator, there is no risk of overflow, and the
* full precision of the intermediate multiplication is preserved.
* Finally, the return result is in 34.30 format.
*
*/
void arm_power_q15(
q15_t * pSrc,
uint32_t blockSize,
q63_t * pResult)
{
q63_t sum = 0; /* Temporary result storage */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in32; /* Temporary variable to store input value */
q15_t in16; /* Temporary variable to store input value */
uint32_t blkCnt; /* loop counter */
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute Power and then store the result in a temporary variable, sum. */
in32 = *__SIMD32(pSrc)++;
sum = __SMLALD(in32, in32, sum);
in32 = *__SIMD32(pSrc)++;
sum = __SMLALD(in32, in32, sum);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute Power and then store the result in a temporary variable, sum. */
in16 = *pSrc++;
sum = __SMLALD(in16, in16, sum);
/* Decrement the loop counter */
blkCnt--;
}
#else
/* Run the below code for Cortex-M0 */
q15_t in; /* Temporary variable to store input value */
uint32_t blkCnt; /* loop counter */
/* Loop over blockSize number of values */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute Power and then store the result in a temporary variable, sum. */
in = *pSrc++;
sum += ((q31_t) in * in);
/* Decrement the loop counter */
blkCnt--;
}
#endif /* #if defined (ARM_MATH_DSP) */
/* Store the results in 34.30 format */
*pResult = sum;
}
/**
* @} end of power group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_power_q15.c
|
C
|
apache-2.0
| 4,227
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_power_q31.c
* Description: Sum of the squares of the elements of a Q31 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup power
* @{
*/
/**
* @brief Sum of the squares of the elements of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult sum of the squares value returned here
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The function is implemented using a 64-bit internal accumulator.
* The input is represented in 1.31 format.
* Intermediate multiplication yields a 2.62 format, and this
* result is truncated to 2.48 format by discarding the lower 14 bits.
* The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
* With 15 guard bits in the accumulator, there is no risk of overflow, and the
* full precision of the intermediate multiplication is preserved.
* Finally, the return result is in 16.48 format.
*
*/
void arm_power_q31(
q31_t * pSrc,
uint32_t blockSize,
q63_t * pResult)
{
q63_t sum = 0; /* Temporary result storage */
q31_t in;
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
in = *pSrc++;
sum += ((q63_t) in * in) >> 14u;
in = *pSrc++;
sum += ((q63_t) in * in) >> 14u;
in = *pSrc++;
sum += ((q63_t) in * in) >> 14u;
in = *pSrc++;
sum += ((q63_t) in * in) >> 14u;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute Power and then store the result in a temporary variable, sum. */
in = *pSrc++;
sum += ((q63_t) in * in) >> 14u;
/* Decrement the loop counter */
blkCnt--;
}
/* Store the results in 16.48 format */
*pResult = sum;
}
/**
* @} end of power group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_power_q31.c
|
C
|
apache-2.0
| 3,841
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_power_q7.c
* Description: Sum of the squares of the elements of a Q7 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup power
* @{
*/
/**
* @brief Sum of the squares of the elements of a Q7 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult sum of the squares value returned here
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The function is implemented using a 32-bit internal accumulator.
* The input is represented in 1.7 format.
* Intermediate multiplication yields a 2.14 format, and this
* result is added without saturation to an accumulator in 18.14 format.
* With 17 guard bits in the accumulator, there is no risk of overflow, and the
* full precision of the intermediate multiplication is preserved.
* Finally, the return result is in 18.14 format.
*
*/
void arm_power_q7(
q7_t * pSrc,
uint32_t blockSize,
q31_t * pResult)
{
q31_t sum = 0; /* Temporary result storage */
q7_t in; /* Temporary variable to store input */
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t input1; /* Temporary variable to store packed input */
q31_t in1, in2; /* Temporary variables to store input */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* Reading two inputs of pSrc vector and packing */
input1 = *__SIMD32(pSrc)++;
in1 = __SXTB16(__ROR(input1, 8));
in2 = __SXTB16(input1);
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* calculate power and accumulate to accumulator */
sum = __SMLAD(in1, in1, sum);
sum = __SMLAD(in2, in2, sum);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute Power and then store the result in a temporary variable, sum. */
in = *pSrc++;
sum += ((q15_t) in * in);
/* Decrement the loop counter */
blkCnt--;
}
/* Store the result in 18.14 format */
*pResult = sum;
}
/**
* @} end of power group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_power_q7.c
|
C
|
apache-2.0
| 3,884
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_rms_f32.c
* Description: Root mean square value of an array of F32 type
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @defgroup RMS Root mean square (RMS)
*
*
* Calculates the Root Mean Sqaure of the elements in the input vector.
* The underlying algorithm is used:
*
* <pre>
* Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
* </pre>
*
* There are separate functions for floating point, Q31, and Q15 data types.
*/
/**
* @addtogroup RMS
* @{
*/
/**
* @brief Root Mean Square of the elements of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult rms value returned here
* @return none.
*
*/
void arm_rms_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult)
{
float32_t sum = 0.0f; /* Accumulator */
float32_t in; /* Tempoprary variable to store input value */
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute sum of the squares and then store the result in a temporary variable, sum */
in = *pSrc++;
sum += in * in;
in = *pSrc++;
sum += in * in;
in = *pSrc++;
sum += in * in;
in = *pSrc++;
sum += in * in;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute sum of the squares and then store the results in a temporary variable, sum */
in = *pSrc++;
sum += in * in;
/* Decrement the loop counter */
blkCnt--;
}
/* Compute Rms and store the result in the destination */
arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
}
/**
* @} end of RMS group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_rms_f32.c
|
C
|
apache-2.0
| 3,587
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_rms_q15.c
* Description: Root Mean Square of the elements of a Q15 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @addtogroup RMS
* @{
*/
/**
* @brief Root Mean Square of the elements of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult rms value returned here
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The function is implemented using a 64-bit internal accumulator.
* The input is represented in 1.15 format.
* Intermediate multiplication yields a 2.30 format, and this
* result is added without saturation to a 64-bit accumulator in 34.30 format.
* With 33 guard bits in the accumulator, there is no risk of overflow, and the
* full precision of the intermediate multiplication is preserved.
* Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
* 15 bits, and then saturated to yield a result in 1.15 format.
*
*/
void arm_rms_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult)
{
q63_t sum = 0; /* accumulator */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in; /* temporary variable to store the input value */
q15_t in1; /* temporary variable to store the input value */
uint32_t blkCnt; /* loop counter */
/* loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute sum of the squares and then store the results in a temporary variable, sum */
in = *__SIMD32(pSrc)++;
sum = __SMLALD(in, in, sum);
in = *__SIMD32(pSrc)++;
sum = __SMLALD(in, in, sum);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute sum of the squares and then store the results in a temporary variable, sum */
in1 = *pSrc++;
sum = __SMLALD(in1, in1, sum);
/* Decrement the loop counter */
blkCnt--;
}
/* Truncating and saturating the accumulator to 1.15 format */
/* Store the result in the destination */
arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
#else
/* Run the below code for Cortex-M0 */
q15_t in; /* temporary variable to store the input value */
uint32_t blkCnt; /* loop counter */
/* Loop over blockSize number of values */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute sum of the squares and then store the results in a temporary variable, sum */
in = *pSrc++;
sum += ((q31_t) in * in);
/* Decrement the loop counter */
blkCnt--;
}
/* Truncating and saturating the accumulator to 1.15 format */
/* Store the result in the destination */
arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of RMS group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_rms_q15.c
|
C
|
apache-2.0
| 4,547
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_rms_q31.c
* Description: Root Mean Square of the elements of a Q31 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @addtogroup RMS
* @{
*/
/**
* @brief Root Mean Square of the elements of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult rms value returned here
* @return none.
*
* @details
* <b>Scaling and Overflow Behavior:</b>
*
*\par
* The function is implemented using an internal 64-bit accumulator.
* The input is represented in 1.31 format, and intermediate multiplication
* yields a 2.62 format.
* The accumulator maintains full precision of the intermediate multiplication results,
* but provides only a single guard bit.
* There is no saturation on intermediate additions.
* If the accumulator overflows, it wraps around and distorts the result.
* In order to avoid overflows completely, the input signal must be scaled down by
* log2(blockSize) bits, as a total of blockSize additions are performed internally.
* Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
*
*/
void arm_rms_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult)
{
q63_t sum = 0; /* accumulator */
q31_t in; /* Temporary variable to store the input */
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4; /* Temporary input variables */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 8 outputs at a time.
** a second loop below computes the remaining 1 to 7 samples. */
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute sum of the squares and then store the result in a temporary variable, sum */
/* read two samples from source buffer */
in1 = pSrc[0];
in2 = pSrc[1];
/* calculate power and accumulate to accumulator */
sum += (q63_t) in1 *in1;
sum += (q63_t) in2 *in2;
/* read two samples from source buffer */
in3 = pSrc[2];
in4 = pSrc[3];
/* calculate power and accumulate to accumulator */
sum += (q63_t) in3 *in3;
sum += (q63_t) in4 *in4;
/* update source buffer to process next samples */
pSrc += 4u;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 8, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
/* Compute sum of the squares and then store the results in a temporary variable, sum */
in = *pSrc++;
sum += (q63_t) in *in;
/* Decrement the loop counter */
blkCnt--;
}
/* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
/* Compute Rms and store the result in the destination vector */
arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
}
/**
* @} end of RMS group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_rms_q31.c
|
C
|
apache-2.0
| 4,358
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_std_f32.c
* Description: Standard deviation of the elements of a floating-point vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @defgroup STD Standard deviation
*
* Calculates the standard deviation of the elements in the input vector.
* The underlying algorithm is used:
*
* <pre>
* Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))
*
* where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
*
* sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
* </pre>
*
* There are separate functions for floating point, Q31, and Q15 data types.
*/
/**
* @addtogroup STD
* @{
*/
/**
* @brief Standard deviation of the elements of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult standard deviation value returned here
* @return none.
*/
void arm_std_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult)
{
float32_t sum = 0.0f; /* Temporary result storage */
float32_t sumOfSquares = 0.0f; /* Sum of squares */
float32_t in; /* input value */
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
float32_t meanOfSquares, mean, squareOfMean; /* Temporary variables */
#else
float32_t squareOfSum; /* Square of Sum */
float32_t var; /* Temporary varaince storage */
#endif
if (blockSize == 1u)
{
*pResult = 0;
return;
}
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sum. */
in = *pSrc++;
sum += in;
sumOfSquares += in * in;
in = *pSrc++;
sum += in;
sumOfSquares += in * in;
in = *pSrc++;
sum += in;
sumOfSquares += in * in;
in = *pSrc++;
sum += in;
sumOfSquares += in * in;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sum. */
in = *pSrc++;
sum += in;
sumOfSquares += in * in;
/* Decrement the loop counter */
blkCnt--;
}
/* Compute Mean of squares of the input samples
* and then store the result in a temporary variable, meanOfSquares. */
meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
/* Compute mean of all input values */
mean = sum / (float32_t) blockSize;
/* Compute square of mean */
squareOfMean = (mean * mean) * (((float32_t) blockSize) /
((float32_t) blockSize - 1.0f));
/* Compute standard deviation and then store the result to the destination */
arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sumOfSquares. */
in = *pSrc++;
sumOfSquares += in * in;
/* C = (A[0] + A[1] + ... + A[blockSize-1]) */
/* Compute Sum of the input samples
* and then store the result in a temporary variable, sum. */
sum += in;
/* Decrement the loop counter */
blkCnt--;
}
/* Compute the square of sum */
squareOfSum = ((sum * sum) / (float32_t) blockSize);
/* Compute the variance */
var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
/* Compute standard deviation and then store the result to the destination */
arm_sqrt_f32(var, pResult);
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of STD group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_std_f32.c
|
C
|
apache-2.0
| 5,568
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_std_q15.c
* Description: Standard deviation of an array of Q15 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup STD
* @{
*/
/**
* @brief Standard deviation of the elements of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult standard deviation value returned here
* @return none.
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The function is implemented using a 64-bit internal accumulator.
* The input is represented in 1.15 format.
* Intermediate multiplication yields a 2.30 format, and this
* result is added without saturation to a 64-bit accumulator in 34.30 format.
* With 33 guard bits in the accumulator, there is no risk of overflow, and the
* full precision of the intermediate multiplication is preserved.
* Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
* 15 bits, and then saturated to yield a result in 1.15 format.
*/
void arm_std_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult)
{
q31_t sum = 0; /* Accumulator */
q31_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
uint32_t blkCnt; /* loop counter */
q63_t sumOfSquares = 0; /* Accumulator */
#if defined (ARM_MATH_DSP)
q31_t in; /* input value */
q15_t in1; /* input value */
#else
q15_t in; /* input value */
#endif
if (blockSize == 1u)
{
*pResult = 0;
return;
}
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sum. */
in = *__SIMD32(pSrc)++;
sum += ((in << 16u) >> 16u);
sum += (in >> 16u);
sumOfSquares = __SMLALD(in, in, sumOfSquares);
in = *__SIMD32(pSrc)++;
sum += ((in << 16u) >> 16u);
sum += (in >> 16u);
sumOfSquares = __SMLALD(in, in, sumOfSquares);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sum. */
in1 = *pSrc++;
sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
sum += in1;
/* Decrement the loop counter */
blkCnt--;
}
/* Compute Mean of squares of the input samples
* and then store the result in a temporary variable, meanOfSquares. */
meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1u));
/* Compute square of mean */
squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1u)));
/* mean of the squares minus the square of the mean. */
/* Compute standard deviation and store the result to the destination */
arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15u, 16u), pResult);
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sumOfSquares. */
in = *pSrc++;
sumOfSquares += (in * in);
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
/* Compute sum of all input values and then store the result in a temporary variable, sum. */
sum += in;
/* Decrement the loop counter */
blkCnt--;
}
/* Compute Mean of squares of the input samples
* and then store the result in a temporary variable, meanOfSquares. */
meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1u));
/* Compute square of mean */
squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1u)));
/* mean of the squares minus the square of the mean. */
/* Compute standard deviation and store the result to the destination */
arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15u, 16u), pResult);
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of STD group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_std_q15.c
|
C
|
apache-2.0
| 5,797
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_std_q31.c
* Description: Standard deviation of an array of Q31 type.
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup STD
* @{
*/
/**
* @brief Standard deviation of the elements of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult standard deviation value returned here
* @return none.
* @details
* <b>Scaling and Overflow Behavior:</b>
*
*\par
* The function is implemented using an internal 64-bit accumulator.
* The input is represented in 1.31 format, which is then downshifted by 8 bits
* which yields 1.23, and intermediate multiplication yields a 2.46 format.
* The accumulator maintains full precision of the intermediate multiplication results,
* but provides only a 16 guard bits.
* There is no saturation on intermediate additions.
* If the accumulator overflows it wraps around and distorts the result.
* In order to avoid overflows completely the input signal must be scaled down by
* log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
* After division, internal variables should be Q18.46
* Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
*
*/
void arm_std_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult)
{
q63_t sum = 0; /* Accumulator */
q63_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
q31_t in; /* input value */
uint32_t blkCnt; /* loop counter */
q63_t sumOfSquares = 0; /* Accumulator */
if (blockSize == 1u)
{
*pResult = 0;
return;
}
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sum. */
in = *pSrc++ >> 8u;
sum += in;
sumOfSquares += ((q63_t) (in) * (in));
in = *pSrc++ >> 8u;
sum += in;
sumOfSquares += ((q63_t) (in) * (in));
in = *pSrc++ >> 8u;
sum += in;
sumOfSquares += ((q63_t) (in) * (in));
in = *pSrc++ >> 8u;
sum += in;
sumOfSquares += ((q63_t) (in) * (in));
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sum. */
in = *pSrc++ >> 8u;
sum += in;
sumOfSquares += ((q63_t) (in) * (in));
/* Decrement the loop counter */
blkCnt--;
}
/* Compute Mean of squares of the input samples
* and then store the result in a temporary variable, meanOfSquares. */
meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1u);
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sumOfSquares. */
in = *pSrc++ >> 8u;
sumOfSquares += ((q63_t) (in) * (in));
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
/* Compute sum of all input values and then store the result in a temporary variable, sum. */
sum += in;
/* Decrement the loop counter */
blkCnt--;
}
/* Compute Mean of squares of the input samples
* and then store the result in a temporary variable, meanOfSquares. */
meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1u);
#endif /* #if defined (ARM_MATH_DSP) */
/* Compute square of mean */
squareOfMean = sum * sum / (q63_t)(blockSize * (blockSize - 1u));
/* Compute standard deviation and then store the result to the destination */
arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15u, pResult);
}
/**
* @} end of STD group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_std_q31.c
|
C
|
apache-2.0
| 5,509
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_var_f32.c
* Description: Variance of the elements of a floating-point vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @defgroup variance Variance
*
* Calculates the variance of the elements in the input vector.
* The underlying algorithm used is the direct method sometimes referred to as the two-pass method:
*
* <pre>
* Result = sum(element - meanOfElements)^2) / numElement - 1
*
* where, meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize
*
* </pre>
*
* There are separate functions for floating point, Q31, and Q15 data types.
*/
/**
* @addtogroup variance
* @{
*/
/**
* @brief Variance of the elements of a floating-point vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult variance value returned here
* @return none.
*/
void arm_var_f32(
float32_t * pSrc,
uint32_t blockSize,
float32_t * pResult)
{
float32_t fMean, fValue;
uint32_t blkCnt; /* loop counter */
float32_t * pInput = pSrc;
float32_t sum = 0.0f;
float32_t fSum = 0.0f;
#if defined(ARM_MATH_DSP)
float32_t in1, in2, in3, in4;
#endif
if (blockSize <= 1u)
{
*pResult = 0;
return;
}
#if defined(ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M7 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
in1 = *pInput++;
in2 = *pInput++;
in3 = *pInput++;
in4 = *pInput++;
sum += in1;
sum += in2;
sum += in3;
sum += in4;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 or Cortex-M3 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif
while (blkCnt > 0u)
{
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
sum += *pInput++;
/* Decrement the loop counter */
blkCnt--;
}
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */
fMean = sum / (float32_t) blockSize;
pInput = pSrc;
#if defined(ARM_MATH_DSP)
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
fValue = *pInput++ - fMean;
fSum += fValue * fValue;
fValue = *pInput++ - fMean;
fSum += fValue * fValue;
fValue = *pInput++ - fMean;
fSum += fValue * fValue;
fValue = *pInput++ - fMean;
fSum += fValue * fValue;
/* Decrement the loop counter */
blkCnt--;
}
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 or Cortex-M3 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif
while (blkCnt > 0u)
{
fValue = *pInput++ - fMean;
fSum += fValue * fValue;
/* Decrement the loop counter */
blkCnt--;
}
/* Variance */
*pResult = fSum / (float32_t)(blockSize - 1.0f);
}
/**
* @} end of variance group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_var_f32.c
|
C
|
apache-2.0
| 4,871
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_var_q15.c
* Description: Variance of an array of Q15 type
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup variance
* @{
*/
/**
* @brief Variance of the elements of a Q15 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult variance value returned here
* @return none.
* @details
* <b>Scaling and Overflow Behavior:</b>
*
* \par
* The function is implemented using a 64-bit internal accumulator.
* The input is represented in 1.15 format.
* Intermediate multiplication yields a 2.30 format, and this
* result is added without saturation to a 64-bit accumulator in 34.30 format.
* With 33 guard bits in the accumulator, there is no risk of overflow, and the
* full precision of the intermediate multiplication is preserved.
* Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
* 15 bits, and then saturated to yield a result in 1.15 format.
*/
void arm_var_q15(
q15_t * pSrc,
uint32_t blockSize,
q15_t * pResult)
{
q31_t sum = 0; /* Accumulator */
q31_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
uint32_t blkCnt; /* loop counter */
q63_t sumOfSquares = 0; /* Accumulator */
#if defined (ARM_MATH_DSP)
q31_t in; /* input value */
q15_t in1; /* input value */
#else
q15_t in; /* input value */
#endif
if (blockSize == 1u)
{
*pResult = 0;
return;
}
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sum. */
in = *__SIMD32(pSrc)++;
sum += ((in << 16u) >> 16u);
sum += (in >> 16u);
sumOfSquares = __SMLALD(in, in, sumOfSquares);
in = *__SIMD32(pSrc)++;
sum += ((in << 16u) >> 16u);
sum += (in >> 16u);
sumOfSquares = __SMLALD(in, in, sumOfSquares);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sum. */
in1 = *pSrc++;
sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
sum += in1;
/* Decrement the loop counter */
blkCnt--;
}
/* Compute Mean of squares of the input samples
* and then store the result in a temporary variable, meanOfSquares. */
meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1u));
/* Compute square of mean */
squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1u)));
/* mean of the squares minus the square of the mean. */
*pResult = (meanOfSquares - squareOfMean) >> 15u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sumOfSquares. */
in = *pSrc++;
sumOfSquares += (in * in);
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
/* Compute sum of all input values and then store the result in a temporary variable, sum. */
sum += in;
/* Decrement the loop counter */
blkCnt--;
}
/* Compute Mean of squares of the input samples
* and then store the result in a temporary variable, meanOfSquares. */
meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1u));
/* Compute square of mean */
squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1u)));
/* mean of the squares minus the square of the mean. */
*pResult = (meanOfSquares - squareOfMean) >> 15;
#endif /* #if defined (ARM_MATH_DSP) */
}
/**
* @} end of variance group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_var_q15.c
|
C
|
apache-2.0
| 5,574
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_var_q31.c
* Description: Variance of an array of Q31 type
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupStats
*/
/**
* @addtogroup variance
* @{
*/
/**
* @brief Variance of the elements of a Q31 vector.
* @param[in] *pSrc points to the input vector
* @param[in] blockSize length of the input vector
* @param[out] *pResult variance value returned here
* @return none.
* @details
* <b>Scaling and Overflow Behavior:</b>
*
*\par
* The function is implemented using an internal 64-bit accumulator.
* The input is represented in 1.31 format, which is then downshifted by 8 bits
* which yields 1.23, and intermediate multiplication yields a 2.46 format.
* The accumulator maintains full precision of the intermediate multiplication results,
* but provides only a 16 guard bits.
* There is no saturation on intermediate additions.
* If the accumulator overflows it wraps around and distorts the result.
* In order to avoid overflows completely the input signal must be scaled down by
* log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
* After division, internal variables should be Q18.46
* Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
*
*/
void arm_var_q31(
q31_t * pSrc,
uint32_t blockSize,
q31_t * pResult)
{
q63_t sum = 0; /* Accumulator */
q63_t meanOfSquares, squareOfMean; /* square of mean and mean of square */
q31_t in; /* input value */
uint32_t blkCnt; /* loop counter */
q63_t sumOfSquares = 0; /* Accumulator */
if (blockSize == 1u)
{
*pResult = 0;
return;
}
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sum. */
in = *pSrc++ >> 8u;
sum += in;
sumOfSquares += ((q63_t) (in) * (in));
in = *pSrc++ >> 8u;
sum += in;
sumOfSquares += ((q63_t) (in) * (in));
in = *pSrc++ >> 8u;
sum += in;
sumOfSquares += ((q63_t) (in) * (in));
in = *pSrc++ >> 8u;
sum += in;
sumOfSquares += ((q63_t) (in) * (in));
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sum. */
in = *pSrc++ >> 8u;
sum += in;
sumOfSquares += ((q63_t) (in) * (in));
/* Decrement the loop counter */
blkCnt--;
}
/* Compute Mean of squares of the input samples
* and then store the result in a temporary variable, meanOfSquares. */
meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1u);
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
while (blkCnt > 0u)
{
/* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
/* Compute Sum of squares of the input samples
* and then store the result in a temporary variable, sumOfSquares. */
in = *pSrc++ >> 8u;
sumOfSquares += ((q63_t) (in) * (in));
/* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
/* Compute sum of all input values and then store the result in a temporary variable, sum. */
sum += in;
/* Decrement the loop counter */
blkCnt--;
}
/* Compute Mean of squares of the input samples
* and then store the result in a temporary variable, meanOfSquares. */
meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1u);
#endif /* #if defined (ARM_MATH_DSP) */
/* Compute square of mean */
squareOfMean = sum * sum / (q63_t)(blockSize * (blockSize - 1u));
/* Compute standard deviation and then store the result to the destination */
*pResult = (meanOfSquares - squareOfMean) >> 15u;
}
/**
* @} end of variance group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/StatisticsFunctions/arm_var_q31.c
|
C
|
apache-2.0
| 5,476
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_copy_f32.c
* Description: Copies the elements of a floating-point vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupSupport
*/
/**
* @defgroup copy Vector Copy
*
* Copies sample by sample from source vector to destination vector.
*
* <pre>
* pDst[n] = pSrc[n]; 0 <= n < blockSize.
* </pre>
*
* There are separate functions for floating point, Q31, Q15, and Q7 data types.
*/
/**
* @addtogroup copy
* @{
*/
/**
* @brief Copies the elements of a floating-point vector.
* @param[in] *pSrc points to input vector
* @param[out] *pDst points to output vector
* @param[in] blockSize length of the input vector
* @return none.
*
*/
void arm_copy_f32(
float32_t * pSrc,
float32_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t in1, in2, in3, in4;
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = A */
/* Copy and then store the results in the destination buffer */
in1 = *pSrc++;
in2 = *pSrc++;
in3 = *pSrc++;
in4 = *pSrc++;
*pDst++ = in1;
*pDst++ = in2;
*pDst++ = in3;
*pDst++ = in4;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = A */
/* Copy and then store the results in the destination buffer */
*pDst++ = *pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of BasicCopy group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/SupportFunctions/arm_copy_f32.c
|
C
|
apache-2.0
| 2,985
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_copy_q15.c
* Description: Copies the elements of a Q15 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupSupport
*/
/**
* @addtogroup copy
* @{
*/
/**
* @brief Copies the elements of a Q15 vector.
* @param[in] *pSrc points to input vector
* @param[out] *pDst points to output vector
* @param[in] blockSize length of the input vector
* @return none.
*
*/
void arm_copy_q15(
q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = A */
/* Read two inputs */
*__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
*__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = A */
/* Copy and then store the value in the destination buffer */
*pDst++ = *pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of BasicCopy group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/SupportFunctions/arm_copy_q15.c
|
C
|
apache-2.0
| 2,549
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_copy_q31.c
* Description: Copies the elements of a Q31 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupSupport
*/
/**
* @addtogroup copy
* @{
*/
/**
* @brief Copies the elements of a Q31 vector.
* @param[in] *pSrc points to input vector
* @param[out] *pDst points to output vector
* @param[in] blockSize length of the input vector
* @return none.
*
*/
void arm_copy_q31(
q31_t * pSrc,
q31_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4;
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = A */
/* Copy and then store the values in the destination buffer */
in1 = *pSrc++;
in2 = *pSrc++;
in3 = *pSrc++;
in4 = *pSrc++;
*pDst++ = in1;
*pDst++ = in2;
*pDst++ = in3;
*pDst++ = in4;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = A */
/* Copy and then store the value in the destination buffer */
*pDst++ = *pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of BasicCopy group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/SupportFunctions/arm_copy_q31.c
|
C
|
apache-2.0
| 2,686
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_copy_q7.c
* Description: Copies the elements of a Q7 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupSupport
*/
/**
* @addtogroup copy
* @{
*/
/**
* @brief Copies the elements of a Q7 vector.
* @param[in] *pSrc points to input vector
* @param[out] *pDst points to output vector
* @param[in] blockSize length of the input vector
* @return none.
*
*/
void arm_copy_q7(
q7_t * pSrc,
q7_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = A */
/* Copy and then store the results in the destination buffer */
/* 4 samples are copied and stored at a time using SIMD */
*__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = A */
/* Copy and then store the results in the destination buffer */
*pDst++ = *pSrc++;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of BasicCopy group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/SupportFunctions/arm_copy_q7.c
|
C
|
apache-2.0
| 2,608
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fill_f32.c
* Description: Fills a constant value into a floating-point vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupSupport
*/
/**
* @defgroup Fill Vector Fill
*
* Fills the destination vector with a constant value.
*
* <pre>
* pDst[n] = value; 0 <= n < blockSize.
* </pre>
*
* There are separate functions for floating point, Q31, Q15, and Q7 data types.
*/
/**
* @addtogroup Fill
* @{
*/
/**
* @brief Fills a constant value into a floating-point vector.
* @param[in] value input value to be filled
* @param[out] *pDst points to output vector
* @param[in] blockSize length of the output vector
* @return none.
*
*/
void arm_fill_f32(
float32_t value,
float32_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
float32_t in1 = value;
float32_t in2 = value;
float32_t in3 = value;
float32_t in4 = value;
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = value */
/* Fill the value in the destination buffer */
*pDst++ = in1;
*pDst++ = in2;
*pDst++ = in3;
*pDst++ = in4;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = value */
/* Fill the value in the destination buffer */
*pDst++ = value;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of Fill group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/SupportFunctions/arm_fill_f32.c
|
C
|
apache-2.0
| 2,940
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fill_q15.c
* Description: Fills a constant value into a Q15 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupSupport
*/
/**
* @addtogroup Fill
* @{
*/
/**
* @brief Fills a constant value into a Q15 vector.
* @param[in] value input value to be filled
* @param[out] *pDst points to output vector
* @param[in] blockSize length of the output vector
* @return none.
*
*/
void arm_fill_q15(
q15_t value,
q15_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t packedValue; /* value packed to 32 bits */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* Packing two 16 bit values to 32 bit value in order to use SIMD */
packedValue = __PKHBT(value, value, 16u);
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = value */
/* Fill the value in the destination buffer */
*__SIMD32(pDst)++ = packedValue;
*__SIMD32(pDst)++ = packedValue;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = value */
/* Fill the value in the destination buffer */
*pDst++ = value;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of Fill group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/SupportFunctions/arm_fill_q15.c
|
C
|
apache-2.0
| 2,757
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fill_q31.c
* Description: Fills a constant value into a Q31 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupSupport
*/
/**
* @addtogroup Fill
* @{
*/
/**
* @brief Fills a constant value into a Q31 vector.
* @param[in] value input value to be filled
* @param[out] *pDst points to output vector
* @param[in] blockSize length of the output vector
* @return none.
*
*/
void arm_fill_q31(
q31_t value,
q31_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1 = value;
q31_t in2 = value;
q31_t in3 = value;
q31_t in4 = value;
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = value */
/* Fill the value in the destination buffer */
*pDst++ = in1;
*pDst++ = in2;
*pDst++ = in3;
*pDst++ = in4;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = value */
/* Fill the value in the destination buffer */
*pDst++ = value;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of Fill group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/SupportFunctions/arm_fill_q31.c
|
C
|
apache-2.0
| 2,647
|
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_fill_q7.c
* Description: Fills a constant value into a Q7 vector
*
* $Date: 27. January 2017
* $Revision: V.1.5.1
*
* Target Processor: Cortex-M cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "arm_math.h"
/**
* @ingroup groupSupport
*/
/**
* @addtogroup Fill
* @{
*/
/**
* @brief Fills a constant value into a Q7 vector.
* @param[in] value input value to be filled
* @param[out] *pDst points to output vector
* @param[in] blockSize length of the output vector
* @return none.
*
*/
void arm_fill_q7(
q7_t value,
q7_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counter */
#if defined (ARM_MATH_DSP)
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t packedValue; /* value packed to 32 bits */
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* Packing four 8 bit values to 32 bit value in order to use SIMD */
packedValue = __PACKq7(value, value, value, value);
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while (blkCnt > 0u)
{
/* C = value */
/* Fill the value in the destination buffer */
*__SIMD32(pDst)++ = packedValue;
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #if defined (ARM_MATH_DSP) */
while (blkCnt > 0u)
{
/* C = value */
/* Fill the value in the destination buffer */
*pDst++ = value;
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of Fill group
*/
|
YifuLiu/AliOS-Things
|
hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/cmsis-dsp/Source/SupportFunctions/arm_fill_q7.c
|
C
|
apache-2.0
| 2,723
|