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module TBUFX8 ( Y, A, OE ); output Y; input A, OE; bufif1 I0 (Y, A, OE); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$OE$Y = 1.0, tphl$OE$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (OE *> Y) = (tplh$OE$Y, tphl$OE$Y); endspecify endmodule
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module TBUFXL ( Y, A, OE ); output Y; input A, OE; bufif1 I0 (Y, A, OE); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$OE$Y = 1.0, tphl$OE$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (OE *> Y) = (tplh$OE$Y, tphl$OE$Y); endspecify endmodule
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module BUFX2 ( Y, A ); output Y; input A; buf I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module BUFX8 ( Y, A ); output Y; input A; buf I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module BUFX16 ( Y, A ); output Y; input A; buf I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module BUFX20 ( Y, A ); output Y; input A; buf I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module INVXL ( Y, A ); output Y; input A; not I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module INVX1 ( Y, A ); output Y; input A; not I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module INVX2 ( Y, A ); output Y; input A; not I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module INVX3 ( Y, A ); output Y; input A; not I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module INVX4 ( Y, A ); output Y; input A; not I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module INVX6 ( Y, A ); output Y; input A; not I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module INVX8 ( Y, A ); output Y; input A; not I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module INVX12 ( Y, A ); output Y; input A; not I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module INVX16 ( Y, A ); output Y; input A; not I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module INVX20 ( Y, A ); output Y; input A; not I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module TBUFXL ( Y, A, OE ); output Y; input A, OE; bufif1 I0 (Y, A, OE); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$OE$Y = 1.0, tphl$OE$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (OE *> Y) = (tplh$OE$Y, tphl$OE$Y); endspecify endmodule
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module TBUFX1 ( Y, A, OE ); output Y; input A, OE; bufif1 I0 (Y, A, OE); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$OE$Y = 1.0, tphl$OE$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (OE *> Y) = (tplh$OE$Y, tphl$OE$Y); endspecify endmodule
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module TBUFX2 ( Y, A, OE ); output Y; input A, OE; bufif1 I0 (Y, A, OE); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$OE$Y = 1.0, tphl$OE$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (OE *> Y) = (tplh$OE$Y, tphl$OE$Y); endspecify endmodule
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module TBUFX6 ( Y, A, OE ); output Y; input A, OE; bufif1 I0 (Y, A, OE); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$OE$Y = 1.0, tphl$OE$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (OE *> Y) = (tplh$OE$Y, tphl$OE$Y); endspecify endmodule
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module TBUFX8 ( Y, A, OE ); output Y; input A, OE; bufif1 I0 (Y, A, OE); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$OE$Y = 1.0, tphl$OE$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (OE *> Y) = (tplh$OE$Y, tphl$OE$Y); endspecify endmodule
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module TBUFX12 ( Y, A, OE ); output Y; input A, OE; bufif1 I0 (Y, A, OE); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$OE$Y = 1.0, tphl$OE$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (OE *> Y) = (tplh$OE$Y, tphl$OE$Y); endspecify endmodule
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module TBUFX16 ( Y, A, OE ); output Y; input A, OE; bufif1 I0 (Y, A, OE); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$OE$Y = 1.0, tphl$OE$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (OE *> Y) = (tplh$OE$Y, tphl$OE$Y); endspecify endmodule
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module TBUFX20 ( Y, A, OE ); output Y; input A, OE; bufif1 I0 (Y, A, OE); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$OE$Y = 1.0, tphl$OE$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (OE *> Y) = (tplh$OE$Y, tphl$OE$Y); endspecify endmodule
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module AND2X1 ( Y, A, B ); output Y; input A, B; and (Y, A, B); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); endspecify endmodule
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module AND2X2 ( Y, A, B ); output Y; input A, B; and (Y, A, B); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); endspecify endmodule
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module MX2X8 ( Y, A, B, S0 ); output Y; input A, B, S0; udp_mux2( Y, A, B, S0 ); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0, tplh$S0$Y = 1.0, tphl$S0$Y = 1.0; // path delays if ((A == 1'b1) && (B == 1'b0)) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); if ((A == 1'b0) && (B == 1'b1)) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module MXI2X1 ( Y, A, B, S0 ); output Y; input A, B, S0; udp_mux2( YN, A, B, S0 ); not (Y, YN); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0, tplh$S0$Y = 1.0, tphl$S0$Y = 1.0; // path delays if ((A == 1'b1) && (B == 1'b0)) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); if ((A == 1'b0) && (B == 1'b1)) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module MXI2X2 ( Y, A, B, S0 ); output Y; input A, B, S0; udp_mux2( YN, A, B, S0 ); not (Y, YN); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0, tplh$S0$Y = 1.0, tphl$S0$Y = 1.0; // path delays if ((A == 1'b1) && (B == 1'b0)) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); if ((A == 1'b0) && (B == 1'b1)) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module MXI2X8 ( Y, A, B, S0 ); output Y; input A, B, S0; udp_mux2( YN, A, B, S0 ); not (Y, YN); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0, tplh$S0$Y = 1.0, tphl$S0$Y = 1.0; // path delays if ((A == 1'b1) && (B == 1'b0)) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); if ((A == 1'b0) && (B == 1'b1)) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module MXI3X4 ( Y, A, B, C, S0, S1 ); output Y; input A, B, C, S0, S1; udp_mux4( YN, A, B, C, C, S0, S1 ); not (Y, YN); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0, tplh$C$Y = 1.0, tphl$C$Y = 1.0, tplh$S0$Y = 1.0, tphl$S0$Y = 1.0, tplh$S1$Y = 1.0, tphl$S1$Y = 1.0; // path delays if (A == 1'b1 && C == 1'b0 && S0 == 1'b0) (S1 *> Y) = (tplh$S1$Y, tphl$S1$Y); if (A == 1'b0 && C == 1'b1 && S0 == 1'b0) (S1 *> Y) = (tplh$S1$Y, tphl$S1$Y); if (B == 1'b1 && C == 1'b0 && S0 == 1'b1) (S1 *> Y) = (tplh$S1$Y, tphl$S1$Y); if (B == 1'b0 && C == 1'b1 && S0 == 1'b1) (S1 *> Y) = (tplh$S1$Y, tphl$S1$Y); if (A == 1'b1 && B == 1'b0 && S1 == 1'b0) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); if (A == 1'b0 && B == 1'b1 && S1 == 1'b0) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); if (C == 1'b1 && S1 == 1'b1) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); if (C == 1'b0 && S1 == 1'b1) (S0 *> Y) = (tplh$S0$Y, tphl$S0$Y); (C *> Y) = (tplh$C$Y, tphl$C$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module NAND2X1 ( Y, A, B ); output Y; input A, B; nand (Y, A, B); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); endspecify endmodule
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module NAND2X2 ( Y, A, B ); output Y; input A, B; nand (Y, A, B); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); endspecify endmodule
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module NOR2X1 ( Y, A, B ); output Y; input A, B; nor (Y, A, B); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); endspecify endmodule
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module NOR2X2 ( Y, A, B ); output Y; input A, B; nor (Y, A, B); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); endspecify endmodule
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module NOR2X6 ( Y, A, B ); output Y; input A, B; nor (Y, A, B); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); endspecify endmodule
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module NOR2X8 ( Y, A, B ); output Y; input A, B; nor (Y, A, B); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); endspecify endmodule
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module OR2X1 ( Y, A, B ); output Y; input A, B; or (Y, A, B); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); endspecify endmodule
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module OR2X2 ( Y, A, B ); output Y; input A, B; or (Y, A, B); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0, tplh$B$Y = 1.0, tphl$B$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); (B *> Y) = (tplh$B$Y, tphl$B$Y); endspecify endmodule
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module DLY1X1 ( Y, A ); output Y; input A; buf I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module DLY2X1 ( Y, A ); output Y; input A; buf I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module DLY4X1 ( Y, A ); output Y; input A; buf I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module DLY1X4 ( Y, A ); output Y; input A; buf I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module DLY2X4 ( Y, A ); output Y; input A; buf I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module DLY4X4 ( Y, A ); output Y; input A; buf I0 (Y, A); specify // delay parameters specparam tplh$A$Y = 1.0, tphl$A$Y = 1.0; // path delays (A *> Y) = (tplh$A$Y, tphl$A$Y); endspecify endmodule
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module TBUFX12 ( A, OE, Y ); input A; input OE; output Y; endmodule
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module TBUFX16 ( A, OE, Y ); input A; input OE; output Y; endmodule
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module TBUFX1 ( A, OE, Y ); input A; input OE; output Y; endmodule
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module TBUFX20 ( A, OE, Y ); input A; input OE; output Y; endmodule
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module TBUFX2 ( A, OE, Y ); input A; input OE; output Y; endmodule
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module TBUFX6 ( A, OE, Y ); input A; input OE; output Y; endmodule
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module TBUFX8 ( A, OE, Y ); input A; input OE; output Y; endmodule
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module TBUFXL ( A, OE, Y ); input A; input OE; output Y; endmodule
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module OR3X1 ( A, B, C, Y ); input A; input B; input C; output Y; endmodule
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module OR3X2 ( A, B, C, Y ); input A; input B; input C; output Y; endmodule
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module OR3X4 ( A, B, C, Y ); input A; input B; input C; output Y; endmodule
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module OR3X6 ( A, B, C, Y ); input A; input B; input C; output Y; endmodule
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module OR4X1 ( A, B, C, D, Y ); input A; input B; input C; input D; output Y; endmodule
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module OR4X2 ( A, B, C, D, Y ); input A; input B; input C; input D; output Y; endmodule
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module OR2X1 ( A, B, Y ); input A; input B; output Y; endmodule
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module OR2X2 ( A, B, Y ); input A; input B; output Y; endmodule
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module OR2X4 ( A, B, Y ); input A; input B; output Y; endmodule
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module OR2X6 ( A, B, Y ); input A; input B; output Y; endmodule
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module OR2X8 ( A, B, Y ); input A; input B; output Y; endmodule
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module OR4X4 ( A, B, C, D, Y ); input A; input B; input C; input D; output Y; endmodule
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module OR4X8 ( A, B, C, D, Y ); input A; input B; input C; input D; output Y; endmodule
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module MXI2X8 ( A, B, S0, Y ); input A; input B; input S0; output Y; endmodule
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module MXI3X4 ( A, B, C, S0, S1, Y ); input A; input B; input C; input S0; input S1; output Y; endmodule
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module NAND2X1 ( A, B, Y ); input A; input B; output Y; endmodule
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module NAND2X2 ( A, B, Y ); input A; input B; output Y; endmodule
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module INVX12 ( A, Y ); input A; output Y; endmodule
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module INVX16 ( A, Y ); input A; output Y; endmodule
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module NOR2X1 ( A, B, Y ); input A; input B; output Y; endmodule
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module NOR2X2 ( A, B, Y ); input A; input B; output Y; endmodule
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module NOR2X6 ( A, B, Y ); input A; input B; output Y; endmodule
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module NOR2X8 ( A, B, Y ); input A; input B; output Y; endmodule
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module MX4XL ( A, B, C, D, S0, S1, Y ); input A; input B; input C; input D; input S0; input S1; output Y; endmodule
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module MXI2X1 ( A, B, S0, Y ); input A; input B; input S0; output Y; endmodule
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module MXI2X2 ( A, B, S0, Y ); input A; input B; input S0; output Y; endmodule
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module MX2X1 ( A, B, S0, Y ); input A; input B; input S0; output Y; endmodule
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module MX2X2 ( A, B, S0, Y ); input A; input B; input S0; output Y; endmodule
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module MX2X6 ( A, B, S0, Y ); input A; input B; input S0; output Y; endmodule
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module MX2X8 ( A, B, S0, Y ); input A; input B; input S0; output Y; endmodule
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module MX2XL ( A, B, S0, Y ); input A; input B; input S0; output Y; endmodule
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module MX3X4 ( A, B, C, S0, S1, Y ); input A; input B; input C; input S0; input S1; output Y; endmodule
6.586148
module MX4X1 ( A, B, C, D, S0, S1, Y ); input A; input B; input C; input D; input S0; input S1; output Y; endmodule
6.640411
module MX4X2 ( A, B, C, D, S0, S1, Y ); input A; input B; input C; input D; input S0; input S1; output Y; endmodule
6.944092
module MX4X4 ( A, B, C, D, S0, S1, Y ); input A; input B; input C; input D; input S0; input S1; output Y; endmodule
6.605168
module DLY1X1 ( A, Y ); input A; output Y; endmodule
6.803121
module DLY1X4 ( A, Y ); input A; output Y; endmodule
6.769339
module DLY2X1 ( A, Y ); input A; output Y; endmodule
6.888716
module DLY2X4 ( A, Y ); input A; output Y; endmodule
6.784512
module DLY4X1 ( A, Y ); input A; output Y; endmodule
6.836106
module DLY4X4 ( A, Y ); input A; output Y; endmodule
6.727196
module BUFX16 ( A, Y ); input A; output Y; endmodule
7.017424
module INVX20 ( A, Y ); input A; output Y; endmodule
7.664121
module INVX2 ( A, Y ); input A; output Y; endmodule
7.319964
module INVX4 ( A, Y ); input A; output Y; endmodule
6.802616
module INVX6 ( A, Y ); input A; output Y; endmodule
6.803256
module INVX8 ( A, Y ); input A; output Y; endmodule
7.257742